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panel_set_pwm_signal_to_open_drain panel_set_pwm_sync_whole_mode panel_set_pwm_vsync_rise_count panel_set_reg_up panel_set_spread_enable panel_set_spread_freq panel_set_spread_ratio panel_set_tcon_bist_cfg panel_set_tcon_force_sdlock panel_set_tcon_init_done panel_set_tcon_io_enable panel_set_tcon_patnum panel_set_tcon_pol_frm_inv panel_set_tcon_reg_def_val_init panel_set_tcon_reset panel_set_tcon_sel_rupd panel_set_tconbist_en panel_set_txpll_ssc_divsel panel_set_txpll_ssc_enble panel_set_txpll_test panel_set_vbo_dphy_sel panel_set_vdp_dhd_status vbo_get_cdr_lock_status vbo_get_enable vbo_set_byte_num vbo_set_channel_sel vbo_set_color_bar vbo_set_data_mode vbo_set_enable vbo_set_lane_num vbo_set_lane_swap vbo_set_left_internal_swap vbo_set_lockn_high vbo_set_lockn_sw_mode vbo_set_pn_swap vbo_set_right_internal_swap vbo_set_test_mode vbo_set_test_mode_enable vbo_set_vbo_msb_mode vbo_set_vbo_partiton_sel vdp_tcon_dither_set_dither_data_in vdp_tcon_dither_set_dither_data_out vdp_tcon_dither_set_dither_domain_mode vdp_tcon_dither_set_dither_en vdp_tcon_dither_set_dither_mode vdp_tcon_dither_set_dither_round vdp_tcon_dither_set_dither_round_unlim vdp_tcon_dither_set_dither_sed_u0 vdp_tcon_dither_set_dither_sed_u1 vdp_tcon_dither_set_dither_sed_u2 vdp_tcon_dither_set_dither_sed_u3 vdp_tcon_dither_set_dither_sed_v0 vdp_tcon_dither_set_dither_sed_v1 vdp_tcon_dither_set_dither_sed_v2 vdp_tcon_dither_set_dither_sed_v3 vdp_tcon_dither_set_dither_sed_w0 vdp_tcon_dither_set_dither_sed_w1 vdp_tcon_dither_set_dither_sed_w2 vdp_tcon_dither_set_dither_sed_w3 vdp_tcon_dither_set_dither_sed_y0 vdp_tcon_dither_set_dither_sed_y1 vdp_tcon_dither_set_dither_sed_y2 vdp_tcon_dither_set_dither_sed_y3 vdp_tcon_dither_set_dither_tap_mode vdp_tcon_dither_set_dither_thr_max vdp_tcon_dither_set_dither_thr_min osal_udelay panel_combotx_reg panel_get_dphy_ssc_set panel_get_dphy_ssc_span panel_reg_read panel_reg_write panel_select_high_power_mode panel_select_low_power_mode g_pst_panel_combo_tx_reg g_pst_panel_tcon_reg g_pst_vdp_panel_reg g_pu32_gpio_reg g_pu32_other_reg osal_ioremap_nocache osal_iounmap panel_other_reg panel_tcon_reg panel_tcon_reg_cfg_check vdp_panel_reg panel_set_dim_hor_scl_ratio panel_set_dim_lcd_comp0dk_value panel_set_dim_led_num panel_set_dim_seg_norm_unit panel_set_dim_segment_size panel_set_dim_state_size panel_set_dim_ver_scl_ratio lvds_set_lvds_eve_odd_fixed lvds_set_lvds_rgb_swap g_pst_reg_crg g_pst_reg_peri panel_set3d_sg_mode g_p_spi_cs_reg g_pst_com_spi_reg g_pst_ldm_spi_reg spi_reg_addr_ioremap panel_set_tcon_bar_width panel_set_tcon_bist_coef panel_set_tcon_bist_gy0 panel_set_tcon_bist_gy1 panel_set_tcon_bist_ha panel_set_tcon_bist_ht panel_set_tcon_bist_pre_vst panel_set_tcon_bist_v_gy0 panel_set_tcon_bist_v_gy1 panel_set_tcon_bist_va panel_set_tcon_bist_vst panel_set_tcon_bist_vt panel_set_tcon_ckb_width panel_set_tcon_gray_max_value panel_set_tcon_gray_value panel_set_tcon_h_less1024 vbo_set_lane0_swap vbo_set_lane10_swap vbo_set_lane11_swap vbo_set_lane12_swap vbo_set_lane13_swap vbo_set_lane14_swap vbo_set_lane15_swap vbo_set_lane1_swap vbo_set_lane2_swap vbo_set_lane3_swap vbo_set_lane4_swap vbo_set_lane5_swap vbo_set_lane6_swap vbo_set_lane7_swap vbo_set_lane8_swap vbo_set_lane9_swap vbo_set_lr_swap libsec_shared.z.so libhi_soc.z.so libhi_msp.so libdrvsys.z.so libc.so libpanel.z.so
panel_drv_alloc_mmz 46.87_k_hz 26.786_k_hz 46.875_k_hz 23.4375_k_hz 18.75_k_hz 93.75_k_hz 31.25_k_hz 37.5_k_hz 62.5_k_hz 23.43_k_hz 20.833_k_hz panel_drv_pwm_set_duty panel_drv_pwm_proc_set_duty panel_set_pwm_duty panel_get_pwm_duty panel_drv_update_pwm_duty hi_drv_panel_set_power_on_recovery panel_drv_get_power_on_recovery panel_drv_check_lvds_phy panel_drv_check_vbo_phy dolby panel_drv_power_set_delay panel_drv_check_tconio_delay int_on_delay bl_on_delay int_of_delay tco_of_delay panel_drv_parse_pinmux panel_drv_set_io_pin_mux panel_drv_get_0d_dim_ctx hi_drv_panel_get_panel_ctx panel_drv_update_panel_ctx drv_panel_ioctl_set_index hi_drv_panel_set_index panel_drv_pdm_get_tcon_index panel_drv_pdm_get_panel_index cut_idx bl_max low vsync_w hsync_w signal_inv clk_div other_vt ldm_spi_set_signal_out_put vsync_out hsync_out but butt hi_drv_panel_ldm_regist panel_drv_proc_set_tconbist panel_drv_proc_set_dobly_en_test panel_drv_proc_set_dobly_level_test panel_set_dphy_port_sort panel_drv_bubble_sort panel_drv_is_timming_gradual_change_support 8_port 6_port 4_port 12_port 1_port panel_drv_pwm_set_signal_invert panel_drv_proc_set_de_invert panel_drv_proc_set_vsync_invert panel_drv_proc_set_hsync_invert panel_drv_proc_set_lvds_data_invert isr_start panel_dim_gradule_change_step_print panel_drv_check_lvds_phy_drv_current drv_panel_ioctl_set_drv_current panel_drv_proc_set_drv_current drv_panel_ioctl_get_drv_current hi_drv_panel_get_drv_current panel_drv_check_lvds_attr_drv_current (hi_u32)vbo_attr_p->vbo_current (hi_u32)intf_attr_p->vbo_current panel_drv_check_current fun_call_cnt cdr_unlk_cnt instant panel_drv_check_lvds_attr_lvds_fmt panel_drv_pwm_init 0d_dim_init hi_drv_panel_init panel_hal_init panel_reg_init ldm_spi_reg_init panel_drv_proc_set_dbg_timming_re_init panel_drv_pwm_de_init hi_drv_panel_de_init panel_reg_de_init ldm_spi_reg_de_init panel_drv_mod_init pfn_gpio_dir_set_bit pfn_gpio_write_bit pfn_gpio_read_bit 8_bit 16_bit 12_bit 10_bit 8bit 10bit panel_drv_proc_set_dbg_timming_height other_ht hi_drv_panel_get_panel_ctx_and_offset panel_drv_check_panel_rect panel_drv_get_panel_aspect cdr_stat panel_drv_proc_set_lvds_data_format panel_drv_pmoc_func_process panel_drv_get_time_stamp_ms drv_panel_ioctl_set_emphasis panel_drv_proc_set_emphasis drv_panel_ioctl_get_emphasis hi_drv_panel_get_emphasis (hi_u32)vbo_attr_p->vbo_emphasis (hi_u32)intf_attr_p->vbo_emphasis panel_drv_check_pre_emphasis memcpy_s %s four panel_drv_check_lvds_attr panel_drv_check_vbo_attr panel_drv_set_pwm_attr hi_drv_panel_set_pwm_attr panel_drv_pwm_proc_set_pwm_attr panel_drv_get_pwm_attr hi_drv_panel_get_pwm_attr panel_drv_check_pwm_attr drv_panel_ioctl_get_panel_attr hi_drv_panel_get_panel_attr drv_panel_ioctl_set_intf_attr hi_drv_panel_set_intf_attr drv_panel_ioctl_get_intf_attr hi_drv_panel_get_intf_attr panel_drv_check_intf_attr str 6_pair 3_pair 2_pair 1_pair drv_panel_ioctl_set_backlight_power hi_drv_panel_set_backlight_power panel_drv_proc_set_backlight_power drv_panel_ioctl_get_backlight_power hi_drv_panel_get_backlight_power panel_drv_set_mlvds_power panel_drv_get_mlvds_power hi_drv_panel_set_tcon_power panel_drv_proc_set_tcon_power hi_drv_panel_get_tcon_power panel_drv_set_panel_tcon_power panel_drv_get_panel_tcon_power panel_drv_set_panel_power panel_drv_proc_set_panel_power panel_drv_set_panel_bl_power panel_drv_get_panel_bl_power panel_drv_set_intf_power hi_drv_panel_set_intf_power panel_drv_proc_set_intf_power drv_panel_ioctl_set_black_light_driver hi_drv_panel_set_black_light_driver drv_panel_export_fun_register panel_drv_set_bl_d_river_power_timer panel_drv_set_panel_bl_power_timer panel_drv_set_intf_power_timer panel_drv_custom_send_panel_i2c_timer (hi_u32)base_info->support_other sup_other uhd_other fhd_other Colorbar panel_drv_proc_set_vbo_color_bar panel_drv_pwm_set_freq panel_drv_pwm_proc_set_freq other_freq real_sp_freq panel_set_pwm_freq panel_get_pwm_freq ldm_spi_set_clk_freq panel_drv_check_dimming_freq panel_drv_check_lvds_phy_spread_freq panel_hal_set_spread_freq panel_drv_check_lvds_attr_spread_freq (hi_u32)vbo_attr_p->vbo_spread_freq (hi_u32)intf_attr_p->vbo_spread_freq panel_drv_proc_set_spead_freq panel_drv_proc_set_real_spead_freq panel_drv_proc_set_mapping_spead_freq panel_drv_check_ssc_freq 60_freq 50_freq tim_chg_stp other_vfp other_hfp panel_drv_proc_set_dbg_timming_vsync_fp panel_drv_proc_set_dbg_timming_hsync_fp vsync_bp hsync_bp panel_drv_swap lr_swap panel_drv_proc_set_phy_port_pn_swap l_swap panel_drv_proc_set_lvds_link_map panel_drv_pq_set_ldm_data_map array_p two panel_drv_proc_set_dbg_hor_timming_auto panel_drv_proc_set_dbg_ver_timming_auto sp_ratio panel_drv_check_lvds_phy_spread_ratio panel_drv_check_lvds_attr_spread_ratio vbo_attr_p->vbo_spread_ratio intf_attr_p->vbo_spread_ratio panel_drv_proc_set_spead_ratio panel_drv_check_ssc_ratio panel_set_lane_to_gpio panel_drv_custom_pull_gpio panel_drv_pq_set_backlight_info drv_panel_ioctl_get_status_info hi_drv_panel_get_status_info panel_drv_check_disp_info panel_drv_check_advance_gpio_info panel_drv_check_panel_combo_info drv_panel_ioctl_get_bin_version_info hi_drv_panel_get_bin_version_info panel_drv_get_default_panel_info drv_panel_ioctl_set_panel_info hi_drv_panel_set_panel_info drv_panel_ioctl_get_panel_info hi_drv_panel_get_panel_info hi_drv_panel_check_panel_info panel_drv_pdm_get_default_bl_info panel_drv_check_de_bl_info link_info drv_panel_ioctl_get_dim_strength_info hi_drv_panel_get_dim_strength_info panel_drv_update_panel_vir_reg_base_timing_info drv_panel_ioctl_get_config_info hi_drv_panel_get_config_info panel_drv_updata_panel_cfg_info panel_drv_refresh_cfg_info panel_drv_update_frm_rate_info panel_drv_pdm_get_panel_base_info panel_drv_check_panel_base_info panel_drv_get_image_info panel_drv_pdm_get_panel_advance_info panel_drv_check_advance_info panel_drv_check_advance_i2c_info panel_drv_parse_combo panel_drv_disp_register_fun cmp_fun swap_fun panel_drv_search_misc_resolution panel_drv_decide_misc_resolution panel_drv_get_pq_export_function panel_drv_get_gpio_function panel_drv_get_chip_version drv_panel_ioctl_set_ldm_partition_dimension tcon_pow_on drv_panel_ioctl_set_power_on hi_drv_panel_set_power_on panel_drv_get_power_on drv_panel_ioctl_get_power_on hi_drv_panel_get_power_on bl_min panel_drv_parse_tcon_bin hi_drv_panel_isr_main panel_drv_check_timming_align Horizontal gradient gray of Green Vertical gradient gray of Green panel_drv_check_inv_en 0d_dim_en spread_en panel_drv_check_ssc_en tot_num drv_panel_ioctl_get_total_num hi_drv_panel_get_total_num panel_drv_proc_set_vbo_byte_num (hi_u32)vbo_attr_p->vbo_byte_num panel_drv_kmalloc_mem panel_drv_pq_get_dci_histram panel_drv_pdm_get_tcon_param panel_drv_pdm_get_tcon_module_param panel_drv_set_gpio_output_vol panel_drv_get_gpio_output_vol com_vol dolby_level panel_drv_set_backlight_level drv_panel_ioctl_set_backlight_level hi_drv_panel_set_backlight_level panel_drv_proc_set_backlight_level drv_panel_ioctl_get_backlight_level hi_drv_panel_get_backlight_level panel_drv_get_0d_dim_bl_level 0d_bl_level panel_drv_set_dim_strength_level drv_panel_ioctl_set_dim_strength_level hi_drv_panel_set_dim_strength_level drv_panel_ioctl_get_dim_strength_level hi_drv_panel_get_dim_strength_level panel_drv_set_0d_dim_strength_level panel_drv_get_0d_dim_strength_level panel_drv_custom_set_ldm_strength_level panel_drv_get_0d_dim_ctx_and_level (hi_u32)spi_sel hi_panel panel_drv_parse_panel v_gradual clk_gradual h_gradual panel_drv_proc_set_dbg_timming_vtotal panel_drv_proc_set_dbg_timming_htotal hi_drv_panel_set3d_fs_signal panel_hal_set_current_control_signal panel_hal_set_pre_emp_control_signal panel_drv_is_timming_legal 8_link 16_link 4_link 2_link 1_link panel_tcon_delay_to_blank panel_drv_set_lvds_phy_clk panel_drv_set_vbo_phy_clk other_clk panel_drv_proc_set_dbg_timming_clk 60_clk 50_clk unlock panel_drv_proc_set_tcon_force_sdlock panel_drv_check_phy_pll_lock panel_check_phy_pll_lock panel_tcon_reg_cfg_check White edge with black Black panel_drv_proc_set_misc_fhd4_k panel_drv_proc_set_misc4_k panel_drv_pq_set_ldm_data_ori panel_drv_check_name_length panel_drv_proc_set_lvds_bitwidth panel_drv_proc_set_vbo_bit_width (hi_u32)base_info->panel_bit_width panel_drv_check_bit_width res_width base_info->panel_width panel_drv_proc_set_dbg_timming_width panel_drv_proc_set_dbg_timming_vsync_width panel_drv_proc_set_dbg_timming_hsync_width isr_finish res_high bit0_at_h panel_drv_get_display_timming panel_drv_3d_scene_adjust_timming panel_drv_isr_check_panel_timming panel_drv_check_timming panel_drv_print_misc_timming panel_drv_get_misc_panel_timing panel_drv_parse2d_timing panel_drv_parse_panel_img hw_config panel_drv_set_pwm_cfg panel_drv_set_0d_dim_cfg panel_drv_set_crg_cfg panel_drv_set_intf_cfg hi_drv_panel_resume_cfg panel_hal_get_dphy_ssc_cfg drv_panel_ioctl_set_combo_virtual_reg hi_drv_panel_set_combo_virtual_reg drv_panel_ioctl_get_combo_virtual_reg hi_drv_panel_get_combo_virtual_reg vsyn_neg hsyn_neg de_neg panel_drv_proc_set_vbo_lockn_dbg panel_drv_check_signal_flag off Off bl_def module_size data_size bin_header.size pwm_postive hi_drv_panel_get_back_light_value Horizontal gradient gray of Blue Vertical gradient gray of Blue 5_byte 4_byte 3_byte panel_drv_i2_c_write Horizontal gradient gray of White Vertical gradient gray of White panel_drv_pq_get_ldm_send_state panel_drv_search_out_frmrate panel_drv_check_support_other_framerate panel_drv_proc_set_fix_rate max_rate drv_panel_ioctl_set_fix_out_rate hi_drv_panel_set_fix_out_rate drv_panel_ioctl_get_fix_out_rate hi_drv_panel_get_fix_out_rate hi_drv_panel_set_out_frm_rate panel_drv_get_fix_scene_out_frm_rate panel_drv_get_panel_def_frm_rate drv_panel_ioctl_set_refresh_rate hi_drv_panel_set_refresh_rate panel_drv_proc_set_refresh_rate drv_panel_ioctl_get_refresh_rate hi_drv_panel_get_refresh_rate panel_drv_check_default_frame_rate (hi_u32)base_info->default_frame_rate panel_drv_check_frame_rate panel_drv_decide_frame_rate drv_panel_k_thread_create panel_drv_proc_set_dbg_timming_use vsync_raise panel_drv_config_hard_ware fix_type div_type res_type (hi_u32)base_info->panel_flip_type panel_drv_check_flip_type panel_drv_proc_set_division_type panel_drv_check_division_type (hi_u32)base_info->division_type pwm_type panel_drv_check_panel_link_type (hi_u32)base_info->panel_link_type panel_drv_decide_misc_link_type panel_drv_search_timming_type panel_drv_decide_misc_timming_type intf_type (hi_u32)base_info->panel_fix_rate_type panel_drv_check_fix_rate_type panel_drv_check_timming_change_type (hi_u32)base_info->disp_3d_type panel_drv_check_3d_type one_oe none panel_resume panel_name panel_drv_parse_tcon_file panel_drv_proc_set_lvds_sync_out_enable tst_enable panel_drv_pwm_set_enable panel_drv_pwm_proc_set_enable panel_drv_set_tcon_io_enable hi_drv_panel_set_pwm_enable hi_drv_panel_set_dim_enable panel_drv_proc_set_dim_enable panel_drv_set_0d_dim_enable panel_drv_get_0d_dim_enable drv_panel_ioctl_set_ldm_enable drv_panel_ioctl_get_ldm_enable hi_drv_panel_get_ldm_enable drv_panel_ioctl_set_dynamic_bl_enable hi_drv_panel_set_dynamic_bl_enable drv_panel_ioctl_get_dynamic_bl_enable hi_drv_panel_get_dynamic_bl_enable panel_drv_proc_set_dbg_timming_enable panel_drv_check_lvds_phy_intf_enable panel_drv_i2c_send_and_set_delay_after_intf_enable panel_drv_i2c_send_and_set_delay_before_intf_enable (hi_u32)intf_attr_p->intf_enable panel_drv_check_lvds_phy_spread_enable panel_drv_proc_set_spread_enable (hi_u32)intf_attr_p->spread_enable drv_panel_ioctl_get_drv_current_range hi_drv_panel_get_drv_current_range panel_drv_proc_set_backlight_range drv_panel_ioctl_get_emphasis_range hi_drv_panel_get_emphasis_range panel_drv_get_0d_dim_strength_range drv_panel_ioctl_get_com_voltage_range hi_drv_panel_get_com_voltage_range drv_panel_ioctl_get_spread_range hi_drv_panel_get_spread_range panel_drv_check_com_vlotage panel_drv_proc_set_voltage panel_drv_check_lvds_phy_com_voltage drv_panel_ioctl_set_com_voltage panel_set_com_voltage drv_panel_ioctl_get_com_voltage hi_drv_panel_get_com_voltage panel_drv_check_lvds_attr_com_voltage panel_drv_proc_set_vbo_test_mode panel_drv_check_port_mode panel_hal_set_lvds_bit_mode panel_drv_check_pair_mode panel_drv_custom_set_ldm_demo_mode drv_panel_ioctl_set_ldm_demo_mode hi_drv_panel_set_ldm_demo_mode drv_panel_ioctl_get_ldm_demo_mode hi_drv_panel_get_ldm_demo_mode panel_drv_custom_get_parse_param_mode panel_drv_custom_set_panel_mode hi_drv_panel_set_panel_mode panel_drv_proc_set_lvds_link_mode panel_drv_pwm_set_sync_whole_mode panel_drv_pwm_set_dynamic_mode panel_drv_get_pwm_dynamic_mode panel_drv_update_pwm_dynamic_mode panel_drv_proc_set_vbo_data_mode (hi_u32)vbo_attr_p->data_mode (hi_u32)data_mode hardware mode panel_drv_parse_interface chessboard sync_who_mod tim_chg_mod dynamic_mod hi_drv_panel_suspend ldm_spi_set_signal_always_valid Horizontal gradient gray of Red Vertical gradient gray of Red panel_drv_proc_add panel_drv_set_spread drv_panel_ioctl_set_spread hi_drv_panel_set_spread drv_panel_ioctl_get_spread hi_drv_panel_get_spread panel_drv_check_spread panel_drv_resume_cfg_k_thread panel_drv_i2_c_read current hsync_fp = %d, hsync_fp_maxn = %d panel_drv_proc_set_misc panel_drv_custom_get_custom_func convert_data_str_to_dec panel_drv_custom_send_panel_i2c panel_drv_get_aphy_div_fb panel_drv_set_intf_power_for_data over_turn_data drv_panel_ioctl_get_ldm_data panel_drv_get_cfg_step_ctrl_data panel_drv_tcon_peri_data increase_data prbs10_data K28.5-data K28.5+data vesa jeida byte_num_p[byte_num] bit_width_p[value] vb1_test_mode[value] data_mode_p[data_mode] SDK_VERSION:[HiDPTAndroidV600R001C00HiDPTAndroidV600R001C00SPC070] Build Time:[, ] 23.438KHZ 46.87KHZ 26.7857KHZ 26P786KHZ 37P5KHZ 62P5KHZ 93P875KHZ 46.875KHZ 23.4375KHZ 18.75KHZ 93.75KHZ 31.25KHZ 37.5KHZ 62.5KHZ 23.44KHZ 23.43KHZ 20P833KHZ UHD48HZ FHD48HZ UHD25HZ UHD24HZ UHD30HZ 650MV 550MV 450MV 350MV 1250MV 1150MV 900MV 800MV 700MV 600MV 1500MV 1400MV 1300MV 1200MV 1100MV 1000MV 60VT 50VT BUTT LDEPT GDEPT USIT 8BIT 6BIT 12BIT 10BIT 60HT 50HT LRGLASS FS MLVDS CEDS FLIP_MIRROR PR_LR LDM_SPI_MIN_FREQ ISP FLIP 60VFP 50VFP 60HFP 50HFP VBO base_info->frame_rate_max * OUT_FRAME_RATE_PRECISION PR_RL Get pwm attr point is NULL HI_PANEL FPK 8LINK 4LINK 2LINK 1LINK 8K 5K2K CSPI CMPI CHPI EPI CHPI_H SBSH SBSF TRUE FALSE UHD FHD 2D LRSYNC 9DB 8DB 7DB 6DB 5DB 4DB 3DB 2DB 1DB 0DB TAB VESA JEIDA panel_drv_check_lvds_attr_link4 18BIT444 36BIT444 24BIT444 30BIT444 18B444 36B444 24B444 30B444 pixel3 panel_drv_check_lvds_attr_link3 PWM3 PIXEL3 panel_drv_tcon_peri_data_group2 pixel2 panel_drv_check_lvds_attr_link2 PWM2 PIXEL2 16BIT422 24BIT422 20BIT422 16B422 24B422 20B422 panel_drv_tcon_peri_data_group1 pixel1 panel_drv_check_lvds_attr_link1 PWM1 PIXEL1 pixel0 PWM0 PIXEL0 FHD4K60 UHD60 FHD60 8K4K3060 FHD4K3060 UHD50 FHD50 FHD4K30 2019-12-13,10:00:00 sizeof(drv_reg_panel_info) strlen(base_info->name) res(W/H) com_voltage length is out of range! PANEL CUSTOM get custom function failed! get_pdm_func failed! send panel i2c failed! pull panel special GPIO failed,panel_index=%d! PANEL get custom function,members HI_NULL! please check spread_type!! 37.5KHZ %-12s:%-12s|%-12s:%-12s|%-12s:%-12s|%-12s:%-12s| %-12s:%-12d|%-12s:%-12s|%-12s:%-12s|%-12s:%-12s| %-12s:%-12s|%-12s:%-12d|%-12s:%-12s|%-12s:%-12s| %-12s:%-12d|%-12s:%-12d|%-12s:%-12s|%-12s:%-12s| %-12s:%-12s|%-12s:%-12d|%-12s:%-12d|%-12s:%-12s| %-12s:%-12d|%-12s:%-12d|%-12s:%-12d|%-12s:%-12s| %-12s:%-12d|%-12s:%-12d|%-12s:%-12s|%-10s:%-12s| %-12s:%-90s| %-12s:%-12s|%-12s:%-12s|%-12s:%-12s|%-12s:%-12d| %-12s:%-12s|%-12s:%-12d|%-12s:%-12d|%-12s:%-12d| %-12s:%-6d%-6d|%-12s:%-12d|%-12s:%-12d|%-12s:%-12d| %-12s:%-12d|%-12s:%-12d|%-12s:%-12d|%-12s:%-12d| fixrate to UHD@25_hz fixrate to UHD@24_hz fixrate to UHD@60_hz fixrate to FHD@60_hz fix type search out frmrate failed, default to 60_hz fix_rate_type is other, but support other flag is FALSE, default to 60_hz fixrate to 60_hz fixrate to UHD@50_hz fixrate to FHD@50_hz fixrate to 50_hz fixrate to UHD@30_hz echo refreshrate [60/120] >/proc/msp/panel Set out frame from 120Hz to 60hz PANEL frame_rate_max is not 120Hz Select pwm type fail, invalid pwm type is 0x%x Set pwm enable fail, enable is 0x%x cur_delay: %d, pre_delay: %d, val: %x, i: %d, address: %x, value: %x, eg_mask: %x LVDS or VBO spread_freq is out of range,spread_freq=%u spread_freq is out of range, spread_freq=%u %s = %u timing first data first used lane:%x max than %x, not support panel lowpower exit start panel lowpower enter start echo dbgtimreint 1 >/proc/msp/panel set debug timming reinit dbgtimreint success: debug timming reinit echo dbgvtotal [height~] >/proc/msp/panel set debug vtotal, must bigger than resolution height offset_addr is incorrect 60_hz timming not align, display not correct 50_hz timming not align, display not correct intf type is not correct drvcurrent success: drvcurrent=%s emphasis success: emphasis=%s spread_freq success:spread_freq=%s spread_freq success: spread_freq=%s lockndbg success: lockndbg=%s division success: panel division_type=%s pwm_type not init, please init first,wm_type=%s voltage success: voltage=%s ldatafmt success: lvds map:%s llink map success: lvds link map:%s lbitwidth success: lvds bitwidth:%s llink success: lvds link mode:%s tcon bist success: bist type is %s %s = %s fixrate to other echo colorbar [0/1] >/proc/msp/panel set colorbar enabel (0:disable colorbar 1:enable colorbar echo pnswap [0/1] >/proc/msp/panel set pnswap (0:normal 1:swap pn_swap success: value=%d? swap : not swap %s = %p echo dbgvsfpaut 1 >/proc/msp/panel set debug vsync_fp auto echo dbghsfpaut 1 >/proc/msp/panel set debug hsync_fp auto echo command para1 para2 path explanation parse tcon_bin vbyte success: vbo byte number=byte_num local_dimming dolby_vison enable, not allow to set level echo dbgvsfp [0~vtotal] >/proc/msp/panel set debug vsync_fp, must smaller than vtotal echo dbgvswidth [0~vtotal] >/proc/msp/panel set debug vsync_width, must smaller than vtotal echo dbgheight [0~vtotal] >/proc/msp/panel set debug width, must smaller than vtotal echo dbghsfp [0~htotal] >/proc/msp/panel set debug hsync_fp, must smaller than htotal echo dbghswidth [0~htotal] >/proc/msp/panel set debug hsync_width, must smaller than htotal echo dbgwidth [0~htotal] >/proc/msp/panel set debug width, must smaller than htotal datainv success: lvds data invert:%d? invert: normal deinv success: de invert:%d? invert : normal syncinv success: vsync invert:%d? invert : normal syncinv success: hsync invert:%d? invert : normal param attr is illegal 60_hz timming illegal 50_hz timming illegal panel suspend ok echo sdlock [0/1] >/proc/msp/panel set sdlock (0:not sdlock 1:sdlock sdlock success: value=%d? sdlock : not sdlock param is illegal,please give right bit_width echo dbghtotal [width~] >/proc/msp/panel set debug htotal, must bigger than resolution width parse panel_img fixrate success: off set_vbo_bit_width success: vbo_bit_width=value local_dimming dolby_vison enable, not allow to set localdimming enable state set_color_bar success: color_bar value? open: close syncout success: syncout=%d? enable: disable pwm duty is out of range bit width is out of range flip type is out of range division type is out of range link type is out of range fix_rate type is out of range def_frm_rate type is out of range 3D type is our of range vdata success: vbo data mode=data_mode vtstmd success: vbo test mode panel lowpower exit end panel lowpower enter end dimming freq 60hz invalid dimming freq 50hz invalid disp_info expect_height=%d or expect_width=%d or src_frm_rate=%d is invalid dimming freq other invalid link type invalid clk_freq_pfd = 0, invalid panel_drv_pmoc_func_process failed panel_drv_set_vbo_phy_clk memcpy_s is failed ERR: memcpy_s is failed panel_drv_pwm_de_init memset_s is failed snprintf_s failed panel_drv_proc_set_real_spead_freq failed panel_drv_proc_set_mapping_spead_freq failed Panel get PMOC function failed panel_drv_ldm_spi_proc_set_clk_phase failed osal_exportfunc_register PANEL failed dphy pll unlocked pwm duty is out of range,pwm_duty=%d max frame_rate is out of range!frame_rate_max=%d vsync output must 0 or 1, v_sync_output=%d hsync output must 0 or 1,h_sync_output=%d lvds drv_current is out of range,lvds_drv_current=%d lvds format is out of range,lvds_fmt=%d panel_height is illegal,panel_height=%d tcon success: tconpower=%d pwm freq is out of range,pwm_freq=%d lvds spread freq is out of range,lvds_spread_freq=%d hsync_fp must align to align_mode,hsync_fp=%d lvds spread ratio is out of range,lvds_spread_ratio=%d spread_ratio success: spread_ratio=%d resolution type is out of range,resolution=%d htotal must align to align_mode,htotal=%d panel_width is illegal,panel_width=%d panel_width must align to align_mode,panel_width=%d htotal must bigger than panel width.htotal=%d,panel_width=%d hsync_width must align to align_mode,hsync_width=%d pwm postive must 0 or 1,pwm_postive=%d de negative must 0 or 1,de_negative=%d vsync negative must 0 or 1,v_sync_negative=%d hsync negative must 0 or 1,h_sync_negative=%d dbgtimuse success: debug timming use=%d pwm_type iis out of range,pwm_type=%d pwm_type is out of range,pwm_type=%d intf type is invalid,intf_type=%d tim_change_type is out of range,tim_change_type=%d tim_change_type is invalid,tim_change_type=%d blen success: backlight_power enable=%d dbgtimen success: debug timming enable=%d intf success: intfenable enable=%d lvds comvaltage is out of range,lvds_com_voltage=%d lvds link4 is out of range,link4=%d lvds link3 is out of range,link3=%d lvds link2 is out of range,link2=%d lvds link1 is out of range,link1=%d --------------dim_change_step:%d pwm_type:%d ivalid, pwm_type must be less than:%d dobly_level success: dobly_level:%d set_bl_level success: bl_level:%d bTconEnable:%d bIntfEnable:%d bBackLightEnable:%d set_bl_range success: bl_min is:%d, bl_max is %d pwm signal invert must TRUE or FALSE,current cfg is %d pwm enable must TRUE or FALSE,current cfg is %d pwm sync_whole_mode must TRUE or FALSE,current cfg is %d pwm dynamic_mode must TRUE or FALSE,current cfg is %d pwm vsync raise must TRUE or FALSE,,current cfg is %d parameter ERROR, correct range is 0 to %d vsync_fp=%d not in range 0 to %d hsync_fp=%d not in range 0 to %d vsync_width=%d not in range 0 to %d hsync_width=%d not in range 0 to %d current vsync_fp = %d, max = %d dbgheight success: debug timming height = %d spread_enable success: spread status = %d image_info's name copy wrong, err = %d memcpy_s failed, err = %d memset_s failed, err = %d ssp_freq is invalid,ssp_freq = %d dbgvsfp success: debug timming vsyncfp = %d dbghsfp success: debug timming hsyncfp = %d ssp_ratio is invalid,ssp_ratio = %d spread_ratio success: spread_ratio = %d ssc_en is invalid,ssc_en = %d ssc_set = %d, ssc_step = %d, ssc_span = %d dbgvtotal success: debug timming vtotal = %d dbghtotal success: debug timming htotal = %d dbgclk success: debug timming clk = %d dbgvswidth success: debug timming vsyncwidth = %d dbghswidth success: debug timming hsyncwidth = %d dbgwidth success: debug timming width = %d set panel power:value = %d port_mode is invalid,port_mode = %d pair_mode is invali,pair_mode = %d tconio_delay is out of range,tconio_delay[%d] = %d au32_drv_current is invalid,au32_drv_current[%d] = %d au32_pre_emphasis is invalid,au32_pre_emphasis[%d] = %d com_vlotage is invalid,com_vlotage[%d] = %d cur_delay: %d, pre_delay: %d, i: %d <===[Exit] target str out of range! find_type_str [%s] ===>[Enter] error: vbo spread ratio invalid, must in range[0, PANEL_SPREAD_RATIO_MAX] Call %s Failed, Error Code: [0x%08X] echo dbgclk [0~600M] >/proc/msp/panel set debug timming clk [0~600M] parameter ERROR Set panel pwm attr is NULL param attr is NULL dobly_en_test success: dobly_en_test:%d? TRUE : FALSE dimen success: dimming enable:%d ? TRUE : FALSE dphy PLL LOCKED comb reg info:<addr:%p, reg_num:%u> backlight on,intf enable to backlight on delay: <%d ms.> start to send I2C cmd,tcon poweron to I2C cmd sending delay: <%d ms.> intf enable, tcon poweron to intf enable delay: <%d ms.> ============================================panel proc info============================================= =========================================== panel pwm info =========================================== =========================================== 0d_dim info state ========================================== PANEL start power_on: info name len larger than 48 inv_28s_enable is invalid, must 0 or 1 support_other flag invalid, must 0 or 1 port or pair is incorrect!port_mode=%u,pair_mode=%u. spi_sel reg addr init success. set refresh rate success. parameter ERROR, min_level must less than max_level. sort type out off range. spi_sel reg addr init already inited. panel_drv_pwm_init failed. drv_panel_init failed. panel_drv_set_pwm_attr failed. panel_drv_get_pwm_attr failed. panel_drv_set_pwm_cfg failed. register PANEL failed. vtotal must bigger than panel height.vtotal=%d,panel_height=%d. pwm_type is out of range,pwm_type=%d. parameter_error, the max = %d, the conf is %d. parameter_error, correct range is 8 to %d. parameter ERROR, correct range is 8 to %d. parameter ERROR, correct range is 0 to %d. parameter ERROR, cfg should higher than %d. parameter_error, correct range [0~9]. parameter ERROR, TCON correct range [2~8]. parameter ERROR, correct range [0~7]. parameter ERROR, correct range [0~6]. parameter RROR, correct range [0~6]. parameter ERROR, Correct range [0~16]. parameter ERROR, correct range [3~5]. parameter_error, LVDS correct range [2~5]. parameter ERROR, TCON correct range [2~5]. parameter ERROR, correct range [0~5]. parameter ERROR, bl level range [0-255]. parameter ERROR, correct range link[1~4]. parameter ERROR, correct range [0~4]. fix_rate_type parameter ERROR, correct range [0~3]. parameter ERROR, correct range [0~2]. parameter ERROR, correct range [0~1]. parameter[%d] ERROR, correct range [0~1]. parameter ERROR, correct range [0~31]. parameter ERROR, correct range [0~11]. parameter ERROR, VBONE correct range [2~10]. level ERROR, info <set_level=%u, bit_width=%s, map_level=%u, min=%u, max=%u>. parameter ERROR, correct range and align 8. parameter ERROR, correct range is 32 to %d, and align 8. parameter ERROR, Correct range 60 or 120. ---intf power--- ---set backlight on--- ---set backlight on timer:%d--- ---send I2C--- ------set backlight on done---- --------------------------------------panel commit time %s----------------------------- -------------------------------------------panel power stats-------------------------------------------- --------------------------------------------disp expect info-------------------------------------------- ---------------------------------------------intf attr info--------------------------------------------- ---------------------------------------------panel cfg info--------------------------------------------- -----------------------------------------------intf info------------------------------------------------ ----------------------------------------------TIM DBG------------------------------------------------------- ---------------------------------------------other CMD------------------------------------------------------- ---------------------------------------------LVDS CMD------------------------------------------------------- ----------------------------------------------VBO CMD------------------------------------------------------- ---------------------------------------------TCON CMD------------------------------------------------------- ------------------------------------------------PANEL--------------------------------------------------------- ------------------------------------------------- pwm_help --------------------------------------------------- echo misc [0~7] >/proc/msp/panel fix misc_all frm_rate (0:off 1:fhd50_hz 2:fhd60_hz 3:4_k24_hz 4:4_k25_hz 5:4_k30_hz 6:4_k50_hz 7:4_k60_hz) echo misc4k [0-5] >/proc/msp/panel fix misc4_k frm_rate (0:off 1:4_k24_hz 2:4_k25_hz 3:4_k30_hz 4:4_k50_hz 5:4_k60_hz) echo miscfhd4k [0~4] >/proc/msp/panel fix misc_fhd 4K frm_rate (0:off 1:fhd50_hz 2:fhd60_hz 3:4_k50_hz 4:4_k60_hz) echo pwminvert [0~3] [0/1] >/proc/msp/panel set pwm freq (0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0:positive 1:invert) echo vbitwidth [0/1] >/proc/msp/panel set vbo bitwidth (0:8bit 1:10bit) load hi_panel.ko success. (%s) echo division [0~3] >/proc/msp/panel set division type (0:one_oe 1:one 2:two 3:four) echo fixrate [0~3] >/proc/msp/panel fix out frm_rate (0:off 1:50_hz 2:60_hz 3:other) echo power [0/1] >/proc/msp/panel set panel power on/off (0:power off 1:power on) echo vsyncinv [0/1] >/proc/msp/panel set vsync signal invert (0:invert 1:normal) echo hsyncinv [0/1] >/proc/msp/panel set hsync signal invert (0:invert 1:normal) echo deinv [0/1] >/proc/msp/panel set de signal invert (0:invert 1:normal) echo ldatainv [0/1] >/proc/msp/panel set lvds data invert (0:invert 1:normal) echo cfgstat [0/1/2] >/proc/msp/panel set dim strength (0:weak 1:mid 2:strong) echo dbgtimuse [0/1] >/proc/msp/panel set use debug timming info(0:not use 1:use) echo pwmdymode [0~3] [0/1] >/proc/msp/panel set pwm dynamic_mode (0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0:disable 1:enable) echo pwmen [0~3] [0/1] >/proc/msp/panel set pwm enable (0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0:disable 1:enable) echo dbgtimen [0/1] >/proc/msp/panel set debug timming enable (0:disable 1:enable) echo spreaden [0/1] >/proc/msp/panel set spread enable (0:disable 1:enable) echo lsyncout [0/1] >/proc/msp/panel set lvds syncout enable (0:disable 1:enable) echo vlockndbg [0/1] >/proc/msp/panel set vbo LOCKN high (0:sw_low 1:sw_high 2:hw_mode) echo syncwhole [0~3] [0/1] >/proc/msp/panel set pwm sync_whole_mod(0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0:sync_whole 1:sync_vsync) (5:5db 6:6db 7:7db 8:8db 9:9db) echo emp [0~9] >/proc/msp/panel set emphasis (0:0db 1:1db 2:2db 3:3db 4:4db) (3:K28.5-data 4:increase_data 5:prbs10_data) echo vtstmd [0~5] >/proc/msp/panel set vbo test mode (0:off 1:over_turn_data 2:K28.5+data) echo sfreq [2~5] >/proc/msp/panel set spreadfreq ([2~5]) echo sratio [0~31] >/proc/msp/panel set spreadratio ([1~31]) echo voltage [0~14] >/proc/msp/panel set voltage (0:400MV 1:450MV 2:500MV 3:550MV) echo current [0~6] >/proc/msp/panel set drvcurrent (0:200MV 1:250MV 2:300MV 3:350MV) (8:900MV 9:1000MV 10:1100MV 11:1150MV) (4:600MV 5:650MV 6:700MV 7:800MV) (4:400MV 5:450MV 6:500MV) (12:1200MV 13:1250MV 14:1300MV) error: VBO current invalid, must in range[0, HI_DRV_PANEL_CURRENT_BUTT) error: VBO spread freq invalid must in range[HI_DRV_PANEL_VBO_SSFREQ_46P875KHZ, HI_DRV_PANEL_VBO_SSFREQ_BUTT) error: VBO emphasis invalid, must in range[0, HI_DRV_PANEL_EMP_BUTT) error: VBO byte num invalid, must in range[HI_DRV_PANEL_VBO_BYTE_NUM_3, HI_DRV_PANEL_VBO_BYTE_NUM_BUTT) pwm_type ivalid, must in range[HI_DRV_PANEL_PWM_TYPE_PWM, HI_DRV_PANEL_PWM_TYPE_BUTT) error: VBO data_mode invalid, must in range[0, HI_DRV_PANEL_VBO_DATAMODE_BUTT) echo pwmfreq [0~3] [0~999]>/proc/msp/panel set pwm freq (0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0~999) (tcon range from 2 to 8) echo pwmduty [0~3] [0~255]>/proc/msp/panel set pwm duty (0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0~255) echo sfreq [2~8] >/proc/msp/panel set spreadfreq (lvds and vbone range from 2 to 5) echo vdatamod [0~6] >/proc/msp/panel set vbo data mode (0:30bit444 1:36bit444 2:24bit444 3:18bit444) echo llinkmap [1~4] [0~3] >/proc/msp/panel set lvds link map (1:link1, 2:link2, 3:link3, 4:link4)(0:pixel0, 1:pixel1, 2:pixel2, 3:pixel3) ##panel_drv_set_mlvds_power 20ms## get misc panel timing failed, use default timing60_hz! change to 4_k_60_hz! change to fhd_60_hz! change to 4_k_30_hz! spread_ratio is not legal, spread_ratio=%u! panel PWM level illegal, def_level=%u, mix_level=%u, max_level=%u! 3D type, timming not need to adjust! update_pwm_duty failed, please init first! update pwm dynamic mode failed, please init first! please init 0D dim first! please init panel first! please config 0D dim hardware first! user spread freq param illegal, not support! step ctrl data str len %d is max than range, not support! bl_driver config start! chip_type or chip_version is NULL point! pfn_ldm_strength_level is NULL point! parse_mode is NULL point! spi_sel already deinit! vcnt check times is out of limit! COMBO VIRTUAL REG HEAD is incorrect! pwm_type not init, please init first,pwm_type=%s! pwm_type not init, please init first,pwm_type is %s! current have not mlvds attr! current have not P2P attr! covert str to dec, buf character is err! step ctrl data str have not number character, err! panel_drv_get_backlight_power error! panel_drv_get_tcon_power error! panel already unioreamp! not set default framerate, default to def_frm_rate_p! current panel not 3D FS, not support set 3D sync info! panel init failure, set panel power_down! no FRC funtion! ldm_spi clk too small, not support, min! panel_0d_dim_ctx is null! PANEL proc register fail! invalid ldm spi sel! timming gradual change not support, parameter illgal! panel advance info GPIO group temp_gpio_num=%u is illegal! param is illegal! get 0D dim strength param illegal! set 0D dim enable param illegal! get 0D dim enable param illegal! get 0D dim strength range param illegal! 0D dim strength illegal! other timming illegal! panel advance info i2c send time illegal! Current Illegal! Emphasis Illegal! emp_registor Illegal! clock change to pixel_clk! ldm_spi clk div not odd, please check! only VBO support to change bitwidth! tcon_param offset is 0! use default timing! other_hz timing caculate framerate, larger than max framerate! 60_hz timing caculate framerate, larger than max framerate! 50_hz timing caculate framerate, larger than max framerate! fix_frame_rate param illegal, default to def_frm_rate! fix_frame_rate set other, but support other flag is FALSE, default to def_frm_rate! resolution type illegal, default 60_hz out frame rate! read group2 data from peri failure! read group1 data from peri failure! panel_drv_tcon_peri_data_group1 failure! unknow timming type %d, not change link type! search timming type use rect and frame_rate failed, default 4K@60_hz timming type! not support interface type! panel intf_type is not tcon scene! panel can not init multiple! search misc resolution failed, fix_type=%d is not in table! search out frmrate failed, fix_type=%d is not in table! ldm scene, not support 0D dim enable! search timming type use rect and frame_rate failed, frm_rate=%d is out of range! search misc resolution failed,fix_type=%d is out of range! search out frmrate failed, fix_type=%d is out of range! timming gradual change not support, default to intance change! VBO intf enableinvalid! VBO current invalid! VBO emphasis invalid! i2c cfg is invalid! VBO spread freq invalid! VBO spread ratio invalid! panel advance info i2c flag invalid! panel advance info GPIO flag invalid! VBO spread enable invalid! panel already ioreamped! PANEL drv_update_panel_ctx failed! pdm_func pdm_map_phyaddr_to_viraddr_ptr failed! pdm_func pdm_get_phyaddr_by_name_ptr failed! ldm regist fun to disp failed! panel ioreamp failed! hi_drv_mmz_alloc_and_map failed! update ldm_data_map failed! panel_drv_get_default_panel_info failed! PANEL drv_get_image_info failed! get gpio export function failed! get dci_histram failed! set PQ dim strength level failed! set FRC ldm strength level failed! set BL level failed! update ldm_data_ori failed! panel_drv_get_display_timming failed! get ldm data send state failed! panel k_thread create failed! PANEL drv_config_hard_ware failed! call custom set_panel_mode failed! set FRC ldm mode failed! get parse param mode failed! panel add proc failed! get_pdm_func failed! get pdm_func failed! get_i2c_func failed! write i2c_func failed! get custom func failed! PANEL panel_drv_set_timing_for_graphic failed! write i2c data failed! read i2c data failed! get module function GPIO failed! get panel current_index from PDM failed! get panel total_index from PDM failed! get tcon_idx from PDM failed! get panel base info from PDM failed! get panel advance info from PDM failed! get tcon_param from PDM failed! get PWM range and level from PDM failed! LVDS driver current invalid,lvds_drv_current=%d! get default panel info failed, index=%d is larger than param_cnt=%d! u8_pwm_using_cnt is out of range,u8_pwm_using_cnt=%d! search timming type failed, condition not support,frm_rate=%d,width=%d,height=%d! LVDS spread freq invalid,lvds_spread_freq=%d! LVDS spread ratio invalid,lvds_spread_ratio=%d! get panel index illegal,cur_index=%d,total_num=%d! kmalloc size memory failed,size=%d! pwm_type not init, please init first,pwm_type=%d! LVDS intf enable invalid,intf_enable=%d! LVDS spread enable invalid,spread_enable=%d! LVDS comvaltage invalid,lvds_com_voltage=%d! parameter ERROR, correct range is 0 to %d! start panel_drv_tcon_peri_data! parameter ERROR, correct range [0~3]! parameter ERROR, correct range [0~2]! parameter ERROR, correct range [0~1]! call panel CMD_PANEL_SET_INDEX! call panel CMD_PANEL_SET_DRVCURRENT! call panel CMD_PANEL_GET_DRVCURRENT! call panel CMD_PANEL_SET_EMPHASIS! call panel CMD_PANEL_GET_EMPHASIS! call panel CMD_PANEL_GET_PANEL_ATTR! call panel CMD_PANEL_SET_INTF_ATTR! call panel CMD_PANEL_GET_INTF_ATTR! call panel CMD_PANEL_SET_INFO! call panel CMD_PANEL_GET_INFO! call panel CMD_PANEL_GET_STATUS_INFO! call panel CMD_PANEL_GET_DIM_STRGTH_INFO! call panel CMD_PANEL_GET_CONFIG_INFO! call panel CMD_PANEL_GET_BININFO! call panel CMD_PANEL_SET_POWERON! call panel CMD_PANEL_GET_POWERON! call panel CMD_PANEL_SET_LDMDIMENSION! call panel CMD_PANEL_SET_BACKLIGHT_EN! call panel CMD_PANEL_GET_BACKLIGHT_EN! call panel CMD_PANEL_GET_TOTOAL_NUM! panel_0d_dim_ctx is NULL! get default panel info failed, point is NULL! g_pst_pq_func->get_ldm_param_status is NULL! g_pst_pq_func->update_ldm_data_map is NULL! panel_ctx_p is NULL! g_pst_pq_func->get_dci_histram is NULL! g_pst_pq_func->set_backlight_level is NULL! g_pst_pq_func->set_dim_level is NULL! g_pst_pq_func->update_ldm_data is NULL! call panel CMD_PANEL_SET_BACKLIGHT_LEVEL! call panel CMD_PANEL_GET_BACKLIGHT_LEVEL! call panel CMD_PANEL_SET_DIM_STRGTH_LEVEL! call panel CMD_PANEL_GET_DIM_STRGTH_LEVEL! call panel CMD_PANEL_SET_BLDRIVER_REG! call panel CMD_PANEL_SET_COMBO_VIRTUAL_REG! call panel CMD_PANEL_GET_COMBO_VIRTUAL_REG! call panel CMD_PANEL_SET_REFRESH_RATE! call panel CMD_PANEL_GET_REFRESH_RATE! call panel CMD_PANEL_SET_FIX_OUTRATE! call panel CMD_PANEL_GET_FIX_OUTRATE! fix_rate_type is other, but support other flag is FALSE! call panel CMD_PANEL_LDM_GET_ENABLE! call panel CMD_PANEL_LDM_ENABLE! call panel CMD_PANEL_SET_DYNAMICBL_ENABLE! call panel CMD_PANEL_GET_DYNAMICBL_ENABLE! call panel CMD_PANEL_GET_DRVCURRENT_RANGE! call panel CMD_PANEL_GET_VOLTAGE_RANGE! call panel CMD_PANEL_GET_SPREAD_RANGE! call panel CMD_PANEL_SET_VOLTAGE! call panel CMD_PANEL_GET_VOLTAGE! call panel CMD_PANEL_SET_DIM_DEMO_MODE! call panel CMD_PANEL_GET_DIM_DEMO_MODE! call panel CMD_PANEL_SET_SPREAD! call panel CMD_PANEL_GET_SPREAD! call panel CMD_PANEL_GET_LDM_DATA! |HT(%d) * VT(%d)* frm_rate(%d) - pix_clk(%d)| > TOLERENCE(%d)! malloc tcon pinmux reg info error!! malloc tcon combo reg info error!! malloc 2d timing reg info error!! malloc tcon intf reg info error!! tcon pinmux reg data_size error!! tcon combo reg data_size error!! tcon 2d timing reg data_size error!! tcon interface reg data_size error!! malloc tcon tabel data error!! parse pinmux failure!! parse combo failure!! parse panel failure!! parse 2D timing failure!! parse intf failure!! panel moudle not init!!! get combo module_param error ! get pinmux module param error ! get panel module param error ! get 2D timing module param error ! get intf module param error ! [boottime] panel loader %d finished ! Get panel pwm freq fail, invalid freq value is 0x%x Set panel pwm duty fail, invalid pwm type is 0x%x Get panel pwm duty fail, invalid pwm type is 0x%x Set panel pwm freq fail, invalid pwm type is 0x%x Get panel pwm freq fail, invalid pwm type is 0x%x Set panel pwm enable fail, invalid pwm type is 0x%x spread_enable is invalid spread_freq para invalid ssc_span para invalid aphy_div_fb para invalid panel spread set failed target str not exist! find_type_str [%s] echo blrange [min_level~255] [0~max_level] >/proc/msp/panel set backlight min and max range [0~255] echo bllevel [0~max] >/proc/msp/panel set backlight level range [0~255] echo lbitwidth [0/1] >/proc/msp/panel set lvds bitwidth (0:10bit 1:8bit) echo vbyte [3/4/5] >/proc/msp/panel set vbo byte number (3:8bit 4:10bit 5:12bit) echo ldatafmt [0/1/2/3] >/proc/msp/panel set lvds map (0:VESA 1:JEIDA 2:FP 3:other) echo tconbist [0/16] >/proc/msp/panel Set Tcon bist (0:disable 1~16 pattern) echo tcon [0/1] >/proc/msp/panel set tcon power (0:power off 1:power on) echo llinkmod [0~3] >/proc/msp/panel set lvds linkmode (0:1link 1:2link 2:4link 3:8link) echo intf [0/1] >/proc/msp/panel set VBO/LVDS intf enable (0:disable 1:enable) echo dimen [0/1] >/proc/msp/panel set 0D/local dim enable (0:disable 1:enable) echo blenable [0/1] >/proc/msp/panel set backlight enable (0:disable 1:enable) (4:24bit422 5:20bit422 6:16bit422) |HT * VT* frm_rate - pix_clk| > TOLERENCE! panel not init!! panel height is invalid,it is 0!! p N p ] p a p 0u p p P p ` P ` 8 w 8 8 p w p p ] a 0u 8 N 8 ] 8 a 8 0u 8 8 P 8 ` 8 w 8 8 p p P p ` X X P X ` P ` P ` 8 8 8 8 p p p p p p p P ` ] a 0u P ` l I 8 h V , J] 8 h ' V , J] 8 , 8 , p ! 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panel_drv_alloc_mmz 46.87_k_hz 26.786_k_hz 46.875_k_hz 23.4375_k_hz 18.75_k_hz 93.75_k_hz 31.25_k_hz 37.5_k_hz 62.5_k_hz 23.43_k_hz 20.833_k_hz panel_drv_pwm_set_duty panel_drv_pwm_proc_set_duty panel_set_pwm_duty panel_get_pwm_duty panel_drv_update_pwm_duty hi_drv_panel_set_power_on_recovery panel_drv_get_power_on_recovery panel_drv_check_lvds_phy panel_drv_check_vbo_phy dolby panel_drv_power_set_delay panel_drv_check_tconio_delay int_on_delay bl_on_delay int_of_delay tco_of_delay panel_drv_parse_pinmux panel_drv_set_io_pin_mux panel_drv_get_0d_dim_ctx hi_drv_panel_get_panel_ctx panel_drv_update_panel_ctx drv_panel_ioctl_set_index hi_drv_panel_set_index panel_drv_pdm_get_tcon_index panel_drv_pdm_get_panel_index cut_idx bl_max low vsync_w hsync_w signal_inv clk_div other_vt ldm_spi_set_signal_out_put vsync_out hsync_out but butt hi_drv_panel_ldm_regist panel_drv_proc_set_tconbist panel_drv_proc_set_dobly_en_test panel_drv_proc_set_dobly_level_test panel_set_dphy_port_sort panel_drv_bubble_sort panel_drv_is_timming_gradual_change_support 8_port 6_port 4_port 12_port 1_port panel_drv_pwm_set_signal_invert panel_drv_proc_set_de_invert panel_drv_proc_set_vsync_invert panel_drv_proc_set_hsync_invert panel_drv_proc_set_lvds_data_invert isr_start panel_dim_gradule_change_step_print panel_drv_check_lvds_phy_drv_current drv_panel_ioctl_set_drv_current panel_drv_proc_set_drv_current drv_panel_ioctl_get_drv_current hi_drv_panel_get_drv_current panel_drv_check_lvds_attr_drv_current (hi_u32)vbo_attr_p->vbo_current (hi_u32)intf_attr_p->vbo_current panel_drv_check_current fun_call_cnt cdr_unlk_cnt instant panel_drv_check_lvds_attr_lvds_fmt panel_drv_pwm_init 0d_dim_init hi_drv_panel_init panel_hal_init panel_reg_init ldm_spi_reg_init panel_drv_proc_set_dbg_timming_re_init panel_drv_pwm_de_init hi_drv_panel_de_init panel_reg_de_init ldm_spi_reg_de_init panel_drv_mod_init pfn_gpio_dir_set_bit pfn_gpio_write_bit pfn_gpio_read_bit 8_bit 16_bit 12_bit 10_bit 8bit 10bit panel_drv_proc_set_dbg_timming_height other_ht hi_drv_panel_get_panel_ctx_and_offset panel_drv_check_panel_rect panel_drv_get_panel_aspect cdr_stat panel_drv_proc_set_lvds_data_format panel_drv_pmoc_func_process panel_drv_get_time_stamp_ms drv_panel_ioctl_set_emphasis panel_drv_proc_set_emphasis drv_panel_ioctl_get_emphasis hi_drv_panel_get_emphasis (hi_u32)vbo_attr_p->vbo_emphasis (hi_u32)intf_attr_p->vbo_emphasis panel_drv_check_pre_emphasis memcpy_s %s four panel_drv_check_lvds_attr panel_drv_check_vbo_attr panel_drv_set_pwm_attr hi_drv_panel_set_pwm_attr panel_drv_pwm_proc_set_pwm_attr panel_drv_get_pwm_attr hi_drv_panel_get_pwm_attr panel_drv_check_pwm_attr drv_panel_ioctl_get_panel_attr hi_drv_panel_get_panel_attr drv_panel_ioctl_set_intf_attr hi_drv_panel_set_intf_attr drv_panel_ioctl_get_intf_attr hi_drv_panel_get_intf_attr panel_drv_check_intf_attr str 6_pair 3_pair 2_pair 1_pair drv_panel_ioctl_set_backlight_power hi_drv_panel_set_backlight_power panel_drv_proc_set_backlight_power drv_panel_ioctl_get_backlight_power hi_drv_panel_get_backlight_power panel_drv_set_mlvds_power panel_drv_get_mlvds_power hi_drv_panel_set_tcon_power panel_drv_proc_set_tcon_power hi_drv_panel_get_tcon_power panel_drv_set_panel_tcon_power panel_drv_get_panel_tcon_power panel_drv_set_panel_power panel_drv_proc_set_panel_power panel_drv_set_panel_bl_power panel_drv_get_panel_bl_power panel_drv_set_intf_power hi_drv_panel_set_intf_power panel_drv_proc_set_intf_power drv_panel_ioctl_set_black_light_driver hi_drv_panel_set_black_light_driver drv_panel_export_fun_register panel_drv_set_bl_d_river_power_timer panel_drv_set_panel_bl_power_timer panel_drv_set_intf_power_timer panel_drv_custom_send_panel_i2c_timer (hi_u32)base_info->support_other sup_other uhd_other fhd_other Colorbar panel_drv_proc_set_vbo_color_bar panel_drv_pwm_set_freq panel_drv_pwm_proc_set_freq other_freq real_sp_freq panel_set_pwm_freq panel_get_pwm_freq ldm_spi_set_clk_freq panel_drv_check_dimming_freq panel_drv_check_lvds_phy_spread_freq panel_hal_set_spread_freq panel_drv_check_lvds_attr_spread_freq (hi_u32)vbo_attr_p->vbo_spread_freq (hi_u32)intf_attr_p->vbo_spread_freq panel_drv_proc_set_spead_freq panel_drv_proc_set_real_spead_freq panel_drv_proc_set_mapping_spead_freq panel_drv_check_ssc_freq 60_freq 50_freq tim_chg_stp other_vfp other_hfp panel_drv_proc_set_dbg_timming_vsync_fp panel_drv_proc_set_dbg_timming_hsync_fp vsync_bp hsync_bp panel_drv_swap lr_swap panel_drv_proc_set_phy_port_pn_swap l_swap panel_drv_proc_set_lvds_link_map panel_drv_pq_set_ldm_data_map array_p two panel_drv_proc_set_dbg_hor_timming_auto panel_drv_proc_set_dbg_ver_timming_auto sp_ratio panel_drv_check_lvds_phy_spread_ratio panel_drv_check_lvds_attr_spread_ratio vbo_attr_p->vbo_spread_ratio intf_attr_p->vbo_spread_ratio panel_drv_proc_set_spead_ratio panel_drv_check_ssc_ratio panel_set_lane_to_gpio panel_drv_custom_pull_gpio panel_drv_pq_set_backlight_info drv_panel_ioctl_get_status_info hi_drv_panel_get_status_info panel_drv_check_disp_info panel_drv_check_advance_gpio_info panel_drv_check_panel_combo_info drv_panel_ioctl_get_bin_version_info hi_drv_panel_get_bin_version_info panel_drv_get_default_panel_info drv_panel_ioctl_set_panel_info hi_drv_panel_set_panel_info drv_panel_ioctl_get_panel_info hi_drv_panel_get_panel_info hi_drv_panel_check_panel_info panel_drv_pdm_get_default_bl_info panel_drv_check_de_bl_info link_info drv_panel_ioctl_get_dim_strength_info hi_drv_panel_get_dim_strength_info panel_drv_update_panel_vir_reg_base_timing_info drv_panel_ioctl_get_config_info hi_drv_panel_get_config_info panel_drv_updata_panel_cfg_info panel_drv_refresh_cfg_info panel_drv_update_frm_rate_info panel_drv_pdm_get_panel_base_info panel_drv_check_panel_base_info panel_drv_get_image_info panel_drv_pdm_get_panel_advance_info panel_drv_check_advance_info panel_drv_check_advance_i2c_info panel_drv_parse_combo panel_drv_disp_register_fun cmp_fun swap_fun panel_drv_search_misc_resolution panel_drv_decide_misc_resolution panel_drv_get_pq_export_function panel_drv_get_gpio_function panel_drv_get_chip_version drv_panel_ioctl_set_ldm_partition_dimension tcon_pow_on drv_panel_ioctl_set_power_on hi_drv_panel_set_power_on panel_drv_get_power_on drv_panel_ioctl_get_power_on hi_drv_panel_get_power_on bl_min panel_drv_parse_tcon_bin hi_drv_panel_isr_main panel_drv_check_timming_align Horizontal gradient gray of Green Vertical gradient gray of Green panel_drv_check_inv_en 0d_dim_en spread_en panel_drv_check_ssc_en tot_num drv_panel_ioctl_get_total_num hi_drv_panel_get_total_num panel_drv_proc_set_vbo_byte_num (hi_u32)vbo_attr_p->vbo_byte_num panel_drv_kmalloc_mem panel_drv_pq_get_dci_histram panel_drv_pdm_get_tcon_param panel_drv_pdm_get_tcon_module_param panel_drv_set_gpio_output_vol panel_drv_get_gpio_output_vol com_vol dolby_level panel_drv_set_backlight_level drv_panel_ioctl_set_backlight_level hi_drv_panel_set_backlight_level panel_drv_proc_set_backlight_level drv_panel_ioctl_get_backlight_level hi_drv_panel_get_backlight_level panel_drv_get_0d_dim_bl_level 0d_bl_level panel_drv_set_dim_strength_level drv_panel_ioctl_set_dim_strength_level hi_drv_panel_set_dim_strength_level drv_panel_ioctl_get_dim_strength_level hi_drv_panel_get_dim_strength_level panel_drv_set_0d_dim_strength_level panel_drv_get_0d_dim_strength_level panel_drv_custom_set_ldm_strength_level panel_drv_get_0d_dim_ctx_and_level (hi_u32)spi_sel hi_panel panel_drv_parse_panel v_gradual clk_gradual h_gradual panel_drv_proc_set_dbg_timming_vtotal panel_drv_proc_set_dbg_timming_htotal hi_drv_panel_set3d_fs_signal panel_hal_set_current_control_signal panel_hal_set_pre_emp_control_signal panel_drv_is_timming_legal 8_link 16_link 4_link 2_link 1_link panel_tcon_delay_to_blank panel_drv_set_lvds_phy_clk panel_drv_set_vbo_phy_clk other_clk panel_drv_proc_set_dbg_timming_clk 60_clk 50_clk unlock panel_drv_proc_set_tcon_force_sdlock panel_drv_check_phy_pll_lock panel_check_phy_pll_lock panel_tcon_reg_cfg_check White edge with black Black panel_drv_proc_set_misc_fhd4_k panel_drv_proc_set_misc4_k panel_drv_pq_set_ldm_data_ori panel_drv_check_name_length panel_drv_proc_set_lvds_bitwidth panel_drv_proc_set_vbo_bit_width (hi_u32)base_info->panel_bit_width panel_drv_check_bit_width res_width base_info->panel_width panel_drv_proc_set_dbg_timming_width panel_drv_proc_set_dbg_timming_vsync_width panel_drv_proc_set_dbg_timming_hsync_width isr_finish res_high bit0_at_h panel_drv_get_display_timming panel_drv_3d_scene_adjust_timming panel_drv_isr_check_panel_timming panel_drv_check_timming panel_drv_print_misc_timming panel_drv_get_misc_panel_timing panel_drv_parse2d_timing panel_drv_parse_panel_img hw_config panel_drv_set_pwm_cfg panel_drv_set_0d_dim_cfg panel_drv_set_crg_cfg panel_drv_set_intf_cfg hi_drv_panel_resume_cfg panel_hal_get_dphy_ssc_cfg drv_panel_ioctl_set_combo_virtual_reg hi_drv_panel_set_combo_virtual_reg drv_panel_ioctl_get_combo_virtual_reg hi_drv_panel_get_combo_virtual_reg vsyn_neg hsyn_neg de_neg panel_drv_proc_set_vbo_lockn_dbg panel_drv_check_signal_flag off Off bl_def module_size data_size bin_header.size pwm_postive hi_drv_panel_get_back_light_value Horizontal gradient gray of Blue Vertical gradient gray of Blue 5_byte 4_byte 3_byte panel_drv_i2_c_write Horizontal gradient gray of White Vertical gradient gray of White panel_drv_pq_get_ldm_send_state panel_drv_search_out_frmrate panel_drv_check_support_other_framerate panel_drv_proc_set_fix_rate max_rate drv_panel_ioctl_set_fix_out_rate hi_drv_panel_set_fix_out_rate drv_panel_ioctl_get_fix_out_rate hi_drv_panel_get_fix_out_rate hi_drv_panel_set_out_frm_rate panel_drv_get_fix_scene_out_frm_rate panel_drv_get_panel_def_frm_rate drv_panel_ioctl_set_refresh_rate hi_drv_panel_set_refresh_rate panel_drv_proc_set_refresh_rate drv_panel_ioctl_get_refresh_rate hi_drv_panel_get_refresh_rate panel_drv_check_default_frame_rate (hi_u32)base_info->default_frame_rate panel_drv_check_frame_rate panel_drv_decide_frame_rate drv_panel_k_thread_create panel_drv_proc_set_dbg_timming_use vsync_raise panel_drv_config_hard_ware fix_type div_type res_type (hi_u32)base_info->panel_flip_type panel_drv_check_flip_type panel_drv_proc_set_division_type panel_drv_check_division_type (hi_u32)base_info->division_type pwm_type panel_drv_check_panel_link_type (hi_u32)base_info->panel_link_type panel_drv_decide_misc_link_type panel_drv_search_timming_type panel_drv_decide_misc_timming_type intf_type (hi_u32)base_info->panel_fix_rate_type panel_drv_check_fix_rate_type panel_drv_check_timming_change_type (hi_u32)base_info->disp_3d_type panel_drv_check_3d_type one_oe none panel_resume panel_name panel_drv_parse_tcon_file panel_drv_proc_set_lvds_sync_out_enable tst_enable panel_drv_pwm_set_enable panel_drv_pwm_proc_set_enable panel_drv_set_tcon_io_enable hi_drv_panel_set_pwm_enable hi_drv_panel_set_dim_enable panel_drv_proc_set_dim_enable panel_drv_set_0d_dim_enable panel_drv_get_0d_dim_enable drv_panel_ioctl_set_ldm_enable drv_panel_ioctl_get_ldm_enable hi_drv_panel_get_ldm_enable drv_panel_ioctl_set_dynamic_bl_enable hi_drv_panel_set_dynamic_bl_enable drv_panel_ioctl_get_dynamic_bl_enable hi_drv_panel_get_dynamic_bl_enable panel_drv_proc_set_dbg_timming_enable panel_drv_check_lvds_phy_intf_enable panel_drv_i2c_send_and_set_delay_after_intf_enable panel_drv_i2c_send_and_set_delay_before_intf_enable (hi_u32)intf_attr_p->intf_enable panel_drv_check_lvds_phy_spread_enable panel_drv_proc_set_spread_enable (hi_u32)intf_attr_p->spread_enable drv_panel_ioctl_get_drv_current_range hi_drv_panel_get_drv_current_range panel_drv_proc_set_backlight_range drv_panel_ioctl_get_emphasis_range hi_drv_panel_get_emphasis_range panel_drv_get_0d_dim_strength_range drv_panel_ioctl_get_com_voltage_range hi_drv_panel_get_com_voltage_range drv_panel_ioctl_get_spread_range hi_drv_panel_get_spread_range panel_drv_check_com_vlotage panel_drv_proc_set_voltage panel_drv_check_lvds_phy_com_voltage drv_panel_ioctl_set_com_voltage panel_set_com_voltage drv_panel_ioctl_get_com_voltage hi_drv_panel_get_com_voltage panel_drv_check_lvds_attr_com_voltage panel_drv_proc_set_vbo_test_mode panel_drv_check_port_mode panel_hal_set_lvds_bit_mode panel_drv_check_pair_mode panel_drv_custom_set_ldm_demo_mode drv_panel_ioctl_set_ldm_demo_mode hi_drv_panel_set_ldm_demo_mode drv_panel_ioctl_get_ldm_demo_mode hi_drv_panel_get_ldm_demo_mode panel_drv_custom_get_parse_param_mode panel_drv_custom_set_panel_mode hi_drv_panel_set_panel_mode panel_drv_proc_set_lvds_link_mode panel_drv_pwm_set_sync_whole_mode panel_drv_pwm_set_dynamic_mode panel_drv_get_pwm_dynamic_mode panel_drv_update_pwm_dynamic_mode panel_drv_proc_set_vbo_data_mode (hi_u32)vbo_attr_p->data_mode (hi_u32)data_mode hardware mode panel_drv_parse_interface chessboard sync_who_mod tim_chg_mod dynamic_mod hi_drv_panel_suspend ldm_spi_set_signal_always_valid Horizontal gradient gray of Red Vertical gradient gray of Red panel_drv_proc_add panel_drv_set_spread drv_panel_ioctl_set_spread hi_drv_panel_set_spread drv_panel_ioctl_get_spread hi_drv_panel_get_spread panel_drv_check_spread panel_drv_resume_cfg_k_thread panel_drv_i2_c_read current hsync_fp = %d, hsync_fp_maxn = %d panel_drv_proc_set_misc panel_drv_custom_get_custom_func convert_data_str_to_dec panel_drv_custom_send_panel_i2c panel_drv_get_aphy_div_fb panel_drv_set_intf_power_for_data over_turn_data drv_panel_ioctl_get_ldm_data panel_drv_get_cfg_step_ctrl_data panel_drv_tcon_peri_data increase_data prbs10_data K28.5-data K28.5+data vesa jeida byte_num_p[byte_num] bit_width_p[value] vb1_test_mode[value] data_mode_p[data_mode] SDK_VERSION:[HiDPTAndroidV600R001C00HiDPTAndroidV600R001C00SPC070] Build Time:[, ] 23.438KHZ 46.87KHZ 26.7857KHZ 26P786KHZ 37P5KHZ 62P5KHZ 93P875KHZ 46.875KHZ 23.4375KHZ 18.75KHZ 93.75KHZ 31.25KHZ 37.5KHZ 62.5KHZ 23.44KHZ 23.43KHZ 20P833KHZ UHD48HZ FHD48HZ UHD25HZ UHD24HZ UHD30HZ 650MV 550MV 450MV 350MV 1250MV 1150MV 900MV 800MV 700MV 600MV 1500MV 1400MV 1300MV 1200MV 1100MV 1000MV 60VT 50VT BUTT LDEPT GDEPT USIT 8BIT 6BIT 12BIT 10BIT 60HT 50HT LRGLASS FS MLVDS CEDS FLIP_MIRROR PR_LR LDM_SPI_MIN_FREQ ISP FLIP 60VFP 50VFP 60HFP 50HFP VBO base_info->frame_rate_max * OUT_FRAME_RATE_PRECISION PR_RL Get pwm attr point is NULL HI_PANEL FPK 8LINK 4LINK 2LINK 1LINK 8K 5K2K CSPI CMPI CHPI EPI CHPI_H SBSH SBSF TRUE FALSE UHD FHD 2D LRSYNC 9DB 8DB 7DB 6DB 5DB 4DB 3DB 2DB 1DB 0DB TAB VESA JEIDA panel_drv_check_lvds_attr_link4 18BIT444 36BIT444 24BIT444 30BIT444 18B444 36B444 24B444 30B444 pixel3 panel_drv_check_lvds_attr_link3 PWM3 PIXEL3 panel_drv_tcon_peri_data_group2 pixel2 panel_drv_check_lvds_attr_link2 PWM2 PIXEL2 16BIT422 24BIT422 20BIT422 16B422 24B422 20B422 panel_drv_tcon_peri_data_group1 pixel1 panel_drv_check_lvds_attr_link1 PWM1 PIXEL1 pixel0 PWM0 PIXEL0 FHD4K60 UHD60 FHD60 8K4K3060 FHD4K3060 UHD50 FHD50 FHD4K30 2019-12-13,10:00:00 sizeof(drv_reg_panel_info) strlen(base_info->name) res(W/H) com_voltage length is out of range! PANEL CUSTOM get custom function failed! get_pdm_func failed! send panel i2c failed! pull panel special GPIO failed,panel_index=%d! PANEL get custom function,members HI_NULL! please check spread_type!! 37.5KHZ %-12s:%-12s|%-12s:%-12s|%-12s:%-12s|%-12s:%-12s| %-12s:%-12d|%-12s:%-12s|%-12s:%-12s|%-12s:%-12s| %-12s:%-12s|%-12s:%-12d|%-12s:%-12s|%-12s:%-12s| %-12s:%-12d|%-12s:%-12d|%-12s:%-12s|%-12s:%-12s| %-12s:%-12s|%-12s:%-12d|%-12s:%-12d|%-12s:%-12s| %-12s:%-12d|%-12s:%-12d|%-12s:%-12d|%-12s:%-12s| %-12s:%-12d|%-12s:%-12d|%-12s:%-12s|%-10s:%-12s| %-12s:%-90s| %-12s:%-12s|%-12s:%-12s|%-12s:%-12s|%-12s:%-12d| %-12s:%-12s|%-12s:%-12d|%-12s:%-12d|%-12s:%-12d| %-12s:%-6d%-6d|%-12s:%-12d|%-12s:%-12d|%-12s:%-12d| %-12s:%-12d|%-12s:%-12d|%-12s:%-12d|%-12s:%-12d| fixrate to UHD@25_hz fixrate to UHD@24_hz fixrate to UHD@60_hz fixrate to FHD@60_hz fix type search out frmrate failed, default to 60_hz fix_rate_type is other, but support other flag is FALSE, default to 60_hz fixrate to 60_hz fixrate to UHD@50_hz fixrate to FHD@50_hz fixrate to 50_hz fixrate to UHD@30_hz echo refreshrate [60/120] >/proc/msp/panel Set out frame from 120Hz to 60hz PANEL frame_rate_max is not 120Hz Select pwm type fail, invalid pwm type is 0x%x Set pwm enable fail, enable is 0x%x cur_delay: %d, pre_delay: %d, val: %x, i: %d, address: %x, value: %x, eg_mask: %x LVDS or VBO spread_freq is out of range,spread_freq=%u spread_freq is out of range, spread_freq=%u %s = %u timing first data first used lane:%x max than %x, not support panel lowpower exit start panel lowpower enter start echo dbgtimreint 1 >/proc/msp/panel set debug timming reinit dbgtimreint success: debug timming reinit echo dbgvtotal [height~] >/proc/msp/panel set debug vtotal, must bigger than resolution height offset_addr is incorrect 60_hz timming not align, display not correct 50_hz timming not align, display not correct intf type is not correct drvcurrent success: drvcurrent=%s emphasis success: emphasis=%s spread_freq success:spread_freq=%s spread_freq success: spread_freq=%s lockndbg success: lockndbg=%s division success: panel division_type=%s pwm_type not init, please init first,wm_type=%s voltage success: voltage=%s ldatafmt success: lvds map:%s llink map success: lvds link map:%s lbitwidth success: lvds bitwidth:%s llink success: lvds link mode:%s tcon bist success: bist type is %s %s = %s fixrate to other echo colorbar [0/1] >/proc/msp/panel set colorbar enabel (0:disable colorbar 1:enable colorbar echo pnswap [0/1] >/proc/msp/panel set pnswap (0:normal 1:swap pn_swap success: value=%d? swap : not swap %s = %p echo dbgvsfpaut 1 >/proc/msp/panel set debug vsync_fp auto echo dbghsfpaut 1 >/proc/msp/panel set debug hsync_fp auto echo command para1 para2 path explanation parse tcon_bin vbyte success: vbo byte number=byte_num local_dimming dolby_vison enable, not allow to set level echo dbgvsfp [0~vtotal] >/proc/msp/panel set debug vsync_fp, must smaller than vtotal echo dbgvswidth [0~vtotal] >/proc/msp/panel set debug vsync_width, must smaller than vtotal echo dbgheight [0~vtotal] >/proc/msp/panel set debug width, must smaller than vtotal echo dbghsfp [0~htotal] >/proc/msp/panel set debug hsync_fp, must smaller than htotal echo dbghswidth [0~htotal] >/proc/msp/panel set debug hsync_width, must smaller than htotal echo dbgwidth [0~htotal] >/proc/msp/panel set debug width, must smaller than htotal datainv success: lvds data invert:%d? invert: normal deinv success: de invert:%d? invert : normal syncinv success: vsync invert:%d? invert : normal syncinv success: hsync invert:%d? invert : normal param attr is illegal 60_hz timming illegal 50_hz timming illegal panel suspend ok echo sdlock [0/1] >/proc/msp/panel set sdlock (0:not sdlock 1:sdlock sdlock success: value=%d? sdlock : not sdlock param is illegal,please give right bit_width echo dbghtotal [width~] >/proc/msp/panel set debug htotal, must bigger than resolution width parse panel_img fixrate success: off set_vbo_bit_width success: vbo_bit_width=value local_dimming dolby_vison enable, not allow to set localdimming enable state set_color_bar success: color_bar value? open: close syncout success: syncout=%d? enable: disable pwm duty is out of range bit width is out of range flip type is out of range division type is out of range link type is out of range fix_rate type is out of range def_frm_rate type is out of range 3D type is our of range vdata success: vbo data mode=data_mode vtstmd success: vbo test mode panel lowpower exit end panel lowpower enter end dimming freq 60hz invalid dimming freq 50hz invalid disp_info expect_height=%d or expect_width=%d or src_frm_rate=%d is invalid dimming freq other invalid link type invalid clk_freq_pfd = 0, invalid panel_drv_pmoc_func_process failed panel_drv_set_vbo_phy_clk memcpy_s is failed ERR: memcpy_s is failed panel_drv_pwm_de_init memset_s is failed snprintf_s failed panel_drv_proc_set_real_spead_freq failed panel_drv_proc_set_mapping_spead_freq failed Panel get PMOC function failed panel_drv_ldm_spi_proc_set_clk_phase failed osal_exportfunc_register PANEL failed dphy pll unlocked pwm duty is out of range,pwm_duty=%d max frame_rate is out of range!frame_rate_max=%d vsync output must 0 or 1, v_sync_output=%d hsync output must 0 or 1,h_sync_output=%d lvds drv_current is out of range,lvds_drv_current=%d lvds format is out of range,lvds_fmt=%d panel_height is illegal,panel_height=%d tcon success: tconpower=%d pwm freq is out of range,pwm_freq=%d lvds spread freq is out of range,lvds_spread_freq=%d hsync_fp must align to align_mode,hsync_fp=%d lvds spread ratio is out of range,lvds_spread_ratio=%d spread_ratio success: spread_ratio=%d resolution type is out of range,resolution=%d htotal must align to align_mode,htotal=%d panel_width is illegal,panel_width=%d panel_width must align to align_mode,panel_width=%d htotal must bigger than panel width.htotal=%d,panel_width=%d hsync_width must align to align_mode,hsync_width=%d pwm postive must 0 or 1,pwm_postive=%d de negative must 0 or 1,de_negative=%d vsync negative must 0 or 1,v_sync_negative=%d hsync negative must 0 or 1,h_sync_negative=%d dbgtimuse success: debug timming use=%d pwm_type iis out of range,pwm_type=%d pwm_type is out of range,pwm_type=%d intf type is invalid,intf_type=%d tim_change_type is out of range,tim_change_type=%d tim_change_type is invalid,tim_change_type=%d blen success: backlight_power enable=%d dbgtimen success: debug timming enable=%d intf success: intfenable enable=%d lvds comvaltage is out of range,lvds_com_voltage=%d lvds link4 is out of range,link4=%d lvds link3 is out of range,link3=%d lvds link2 is out of range,link2=%d lvds link1 is out of range,link1=%d --------------dim_change_step:%d pwm_type:%d ivalid, pwm_type must be less than:%d dobly_level success: dobly_level:%d set_bl_level success: bl_level:%d bTconEnable:%d bIntfEnable:%d bBackLightEnable:%d set_bl_range success: bl_min is:%d, bl_max is %d pwm signal invert must TRUE or FALSE,current cfg is %d pwm enable must TRUE or FALSE,current cfg is %d pwm sync_whole_mode must TRUE or FALSE,current cfg is %d pwm dynamic_mode must TRUE or FALSE,current cfg is %d pwm vsync raise must TRUE or FALSE,,current cfg is %d parameter ERROR, correct range is 0 to %d vsync_fp=%d not in range 0 to %d hsync_fp=%d not in range 0 to %d vsync_width=%d not in range 0 to %d hsync_width=%d not in range 0 to %d current vsync_fp = %d, max = %d dbgheight success: debug timming height = %d spread_enable success: spread status = %d image_info's name copy wrong, err = %d memcpy_s failed, err = %d memset_s failed, err = %d ssp_freq is invalid,ssp_freq = %d dbgvsfp success: debug timming vsyncfp = %d dbghsfp success: debug timming hsyncfp = %d ssp_ratio is invalid,ssp_ratio = %d spread_ratio success: spread_ratio = %d ssc_en is invalid,ssc_en = %d ssc_set = %d, ssc_step = %d, ssc_span = %d dbgvtotal success: debug timming vtotal = %d dbghtotal success: debug timming htotal = %d dbgclk success: debug timming clk = %d dbgvswidth success: debug timming vsyncwidth = %d dbghswidth success: debug timming hsyncwidth = %d dbgwidth success: debug timming width = %d set panel power:value = %d port_mode is invalid,port_mode = %d pair_mode is invali,pair_mode = %d tconio_delay is out of range,tconio_delay[%d] = %d au32_drv_current is invalid,au32_drv_current[%d] = %d au32_pre_emphasis is invalid,au32_pre_emphasis[%d] = %d com_vlotage is invalid,com_vlotage[%d] = %d cur_delay: %d, pre_delay: %d, i: %d <===[Exit] target str out of range! find_type_str [%s] ===>[Enter] error: vbo spread ratio invalid, must in range[0, PANEL_SPREAD_RATIO_MAX] Call %s Failed, Error Code: [0x%08X] echo dbgclk [0~600M] >/proc/msp/panel set debug timming clk [0~600M] parameter ERROR Set panel pwm attr is NULL param attr is NULL dobly_en_test success: dobly_en_test:%d? TRUE : FALSE dimen success: dimming enable:%d ? TRUE : FALSE dphy PLL LOCKED comb reg info:<addr:%p, reg_num:%u> backlight on,intf enable to backlight on delay: <%d ms.> start to send I2C cmd,tcon poweron to I2C cmd sending delay: <%d ms.> intf enable, tcon poweron to intf enable delay: <%d ms.> ============================================panel proc info============================================= =========================================== panel pwm info =========================================== =========================================== 0d_dim info state ========================================== PANEL start power_on: info name len larger than 48 inv_28s_enable is invalid, must 0 or 1 support_other flag invalid, must 0 or 1 port or pair is incorrect!port_mode=%u,pair_mode=%u. spi_sel reg addr init success. set refresh rate success. parameter ERROR, min_level must less than max_level. sort type out off range. spi_sel reg addr init already inited. panel_drv_pwm_init failed. drv_panel_init failed. panel_drv_set_pwm_attr failed. panel_drv_get_pwm_attr failed. panel_drv_set_pwm_cfg failed. register PANEL failed. vtotal must bigger than panel height.vtotal=%d,panel_height=%d. pwm_type is out of range,pwm_type=%d. parameter_error, the max = %d, the conf is %d. parameter_error, correct range is 8 to %d. parameter ERROR, correct range is 8 to %d. parameter ERROR, correct range is 0 to %d. parameter ERROR, cfg should higher than %d. parameter_error, correct range [0~9]. parameter ERROR, TCON correct range [2~8]. parameter ERROR, correct range [0~7]. parameter ERROR, correct range [0~6]. parameter RROR, correct range [0~6]. parameter ERROR, Correct range [0~16]. parameter ERROR, correct range [3~5]. parameter_error, LVDS correct range [2~5]. parameter ERROR, TCON correct range [2~5]. parameter ERROR, correct range [0~5]. parameter ERROR, bl level range [0-255]. parameter ERROR, correct range link[1~4]. parameter ERROR, correct range [0~4]. fix_rate_type parameter ERROR, correct range [0~3]. parameter ERROR, correct range [0~2]. parameter ERROR, correct range [0~1]. parameter[%d] ERROR, correct range [0~1]. parameter ERROR, correct range [0~31]. parameter ERROR, correct range [0~11]. parameter ERROR, VBONE correct range [2~10]. level ERROR, info <set_level=%u, bit_width=%s, map_level=%u, min=%u, max=%u>. parameter ERROR, correct range and align 8. parameter ERROR, correct range is 32 to %d, and align 8. parameter ERROR, Correct range 60 or 120. ---intf power--- ---set backlight on--- ---set backlight on timer:%d--- ---send I2C--- ------set backlight on done---- --------------------------------------panel commit time %s----------------------------- -------------------------------------------panel power stats-------------------------------------------- --------------------------------------------disp expect info-------------------------------------------- ---------------------------------------------intf attr info--------------------------------------------- ---------------------------------------------panel cfg info--------------------------------------------- -----------------------------------------------intf info------------------------------------------------ ----------------------------------------------TIM DBG------------------------------------------------------- ---------------------------------------------other CMD------------------------------------------------------- ---------------------------------------------LVDS CMD------------------------------------------------------- ----------------------------------------------VBO CMD------------------------------------------------------- ---------------------------------------------TCON CMD------------------------------------------------------- ------------------------------------------------PANEL--------------------------------------------------------- ------------------------------------------------- pwm_help --------------------------------------------------- echo misc [0~7] >/proc/msp/panel fix misc_all frm_rate (0:off 1:fhd50_hz 2:fhd60_hz 3:4_k24_hz 4:4_k25_hz 5:4_k30_hz 6:4_k50_hz 7:4_k60_hz) echo misc4k [0-5] >/proc/msp/panel fix misc4_k frm_rate (0:off 1:4_k24_hz 2:4_k25_hz 3:4_k30_hz 4:4_k50_hz 5:4_k60_hz) echo miscfhd4k [0~4] >/proc/msp/panel fix misc_fhd 4K frm_rate (0:off 1:fhd50_hz 2:fhd60_hz 3:4_k50_hz 4:4_k60_hz) echo pwminvert [0~3] [0/1] >/proc/msp/panel set pwm freq (0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0:positive 1:invert) echo vbitwidth [0/1] >/proc/msp/panel set vbo bitwidth (0:8bit 1:10bit) load hi_panel.ko success. (%s) echo division [0~3] >/proc/msp/panel set division type (0:one_oe 1:one 2:two 3:four) echo fixrate [0~3] >/proc/msp/panel fix out frm_rate (0:off 1:50_hz 2:60_hz 3:other) echo power [0/1] >/proc/msp/panel set panel power on/off (0:power off 1:power on) echo vsyncinv [0/1] >/proc/msp/panel set vsync signal invert (0:invert 1:normal) echo hsyncinv [0/1] >/proc/msp/panel set hsync signal invert (0:invert 1:normal) echo deinv [0/1] >/proc/msp/panel set de signal invert (0:invert 1:normal) echo ldatainv [0/1] >/proc/msp/panel set lvds data invert (0:invert 1:normal) echo cfgstat [0/1/2] >/proc/msp/panel set dim strength (0:weak 1:mid 2:strong) echo dbgtimuse [0/1] >/proc/msp/panel set use debug timming info(0:not use 1:use) echo pwmdymode [0~3] [0/1] >/proc/msp/panel set pwm dynamic_mode (0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0:disable 1:enable) echo pwmen [0~3] [0/1] >/proc/msp/panel set pwm enable (0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0:disable 1:enable) echo dbgtimen [0/1] >/proc/msp/panel set debug timming enable (0:disable 1:enable) echo spreaden [0/1] >/proc/msp/panel set spread enable (0:disable 1:enable) echo lsyncout [0/1] >/proc/msp/panel set lvds syncout enable (0:disable 1:enable) echo vlockndbg [0/1] >/proc/msp/panel set vbo LOCKN high (0:sw_low 1:sw_high 2:hw_mode) echo syncwhole [0~3] [0/1] >/proc/msp/panel set pwm sync_whole_mod(0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0:sync_whole 1:sync_vsync) (5:5db 6:6db 7:7db 8:8db 9:9db) echo emp [0~9] >/proc/msp/panel set emphasis (0:0db 1:1db 2:2db 3:3db 4:4db) (3:K28.5-data 4:increase_data 5:prbs10_data) echo vtstmd [0~5] >/proc/msp/panel set vbo test mode (0:off 1:over_turn_data 2:K28.5+data) echo sfreq [2~5] >/proc/msp/panel set spreadfreq ([2~5]) echo sratio [0~31] >/proc/msp/panel set spreadratio ([1~31]) echo voltage [0~14] >/proc/msp/panel set voltage (0:400MV 1:450MV 2:500MV 3:550MV) echo current [0~6] >/proc/msp/panel set drvcurrent (0:200MV 1:250MV 2:300MV 3:350MV) (8:900MV 9:1000MV 10:1100MV 11:1150MV) (4:600MV 5:650MV 6:700MV 7:800MV) (4:400MV 5:450MV 6:500MV) (12:1200MV 13:1250MV 14:1300MV) error: VBO current invalid, must in range[0, HI_DRV_PANEL_CURRENT_BUTT) error: VBO spread freq invalid must in range[HI_DRV_PANEL_VBO_SSFREQ_46P875KHZ, HI_DRV_PANEL_VBO_SSFREQ_BUTT) error: VBO emphasis invalid, must in range[0, HI_DRV_PANEL_EMP_BUTT) error: VBO byte num invalid, must in range[HI_DRV_PANEL_VBO_BYTE_NUM_3, HI_DRV_PANEL_VBO_BYTE_NUM_BUTT) pwm_type ivalid, must in range[HI_DRV_PANEL_PWM_TYPE_PWM, HI_DRV_PANEL_PWM_TYPE_BUTT) error: VBO data_mode invalid, must in range[0, HI_DRV_PANEL_VBO_DATAMODE_BUTT) echo pwmfreq [0~3] [0~999]>/proc/msp/panel set pwm freq (0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0~999) (tcon range from 2 to 8) echo pwmduty [0~3] [0~255]>/proc/msp/panel set pwm duty (0:pwm0 1:pwm1 2:pwm2 3:pwm3)(0~255) echo sfreq [2~8] >/proc/msp/panel set spreadfreq (lvds and vbone range from 2 to 5) echo vdatamod [0~6] >/proc/msp/panel set vbo data mode (0:30bit444 1:36bit444 2:24bit444 3:18bit444) echo llinkmap [1~4] [0~3] >/proc/msp/panel set lvds link map (1:link1, 2:link2, 3:link3, 4:link4)(0:pixel0, 1:pixel1, 2:pixel2, 3:pixel3) ##panel_drv_set_mlvds_power 20ms## get misc panel timing failed, use default timing60_hz! change to 4_k_60_hz! change to fhd_60_hz! change to 4_k_30_hz! spread_ratio is not legal, spread_ratio=%u! panel PWM level illegal, def_level=%u, mix_level=%u, max_level=%u! 3D type, timming not need to adjust! update_pwm_duty failed, please init first! update pwm dynamic mode failed, please init first! please init 0D dim first! please init panel first! please config 0D dim hardware first! user spread freq param illegal, not support! step ctrl data str len %d is max than range, not support! bl_driver config start! chip_type or chip_version is NULL point! pfn_ldm_strength_level is NULL point! parse_mode is NULL point! spi_sel already deinit! vcnt check times is out of limit! COMBO VIRTUAL REG HEAD is incorrect! pwm_type not init, please init first,pwm_type=%s! pwm_type not init, please init first,pwm_type is %s! current have not mlvds attr! current have not P2P attr! covert str to dec, buf character is err! step ctrl data str have not number character, err! panel_drv_get_backlight_power error! panel_drv_get_tcon_power error! panel already unioreamp! not set default framerate, default to def_frm_rate_p! current panel not 3D FS, not support set 3D sync info! panel init failure, set panel power_down! no FRC funtion! ldm_spi clk too small, not support, min! panel_0d_dim_ctx is null! PANEL proc register fail! invalid ldm spi sel! timming gradual change not support, parameter illgal! panel advance info GPIO group temp_gpio_num=%u is illegal! param is illegal! get 0D dim strength param illegal! set 0D dim enable param illegal! get 0D dim enable param illegal! get 0D dim strength range param illegal! 0D dim strength illegal! other timming illegal! panel advance info i2c send time illegal! Current Illegal! Emphasis Illegal! emp_registor Illegal! clock change to pixel_clk! ldm_spi clk div not odd, please check! only VBO support to change bitwidth! tcon_param offset is 0! use default timing! other_hz timing caculate framerate, larger than max framerate! 60_hz timing caculate framerate, larger than max framerate! 50_hz timing caculate framerate, larger than max framerate! fix_frame_rate param illegal, default to def_frm_rate! fix_frame_rate set other, but support other flag is FALSE, default to def_frm_rate! resolution type illegal, default 60_hz out frame rate! read group2 data from peri failure! read group1 data from peri failure! panel_drv_tcon_peri_data_group1 failure! unknow timming type %d, not change link type! search timming type use rect and frame_rate failed, default 4K@60_hz timming type! not support interface type! panel intf_type is not tcon scene! panel can not init multiple! search misc resolution failed, fix_type=%d is not in table! search out frmrate failed, fix_type=%d is not in table! ldm scene, not support 0D dim enable! search timming type use rect and frame_rate failed, frm_rate=%d is out of range! search misc resolution failed,fix_type=%d is out of range! search out frmrate failed, fix_type=%d is out of range! timming gradual change not support, default to intance change! VBO intf enableinvalid! VBO current invalid! VBO emphasis invalid! i2c cfg is invalid! VBO spread freq invalid! VBO spread ratio invalid! panel advance info i2c flag invalid! panel advance info GPIO flag invalid! VBO spread enable invalid! panel already ioreamped! PANEL drv_update_panel_ctx failed! pdm_func pdm_map_phyaddr_to_viraddr_ptr failed! pdm_func pdm_get_phyaddr_by_name_ptr failed! ldm regist fun to disp failed! panel ioreamp failed! hi_drv_mmz_alloc_and_map failed! update ldm_data_map failed! panel_drv_get_default_panel_info failed! PANEL drv_get_image_info failed! get gpio export function failed! get dci_histram failed! set PQ dim strength level failed! set FRC ldm strength level failed! set BL level failed! update ldm_data_ori failed! panel_drv_get_display_timming failed! get ldm data send state failed! panel k_thread create failed! PANEL drv_config_hard_ware failed! call custom set_panel_mode failed! set FRC ldm mode failed! get parse param mode failed! panel add proc failed! get_pdm_func failed! get pdm_func failed! get_i2c_func failed! write i2c_func failed! get custom func failed! PANEL panel_drv_set_timing_for_graphic failed! write i2c data failed! read i2c data failed! get module function GPIO failed! get panel current_index from PDM failed! get panel total_index from PDM failed! get tcon_idx from PDM failed! get panel base info from PDM failed! get panel advance info from PDM failed! get tcon_param from PDM failed! get PWM range and level from PDM failed! LVDS driver current invalid,lvds_drv_current=%d! get default panel info failed, index=%d is larger than param_cnt=%d! u8_pwm_using_cnt is out of range,u8_pwm_using_cnt=%d! search timming type failed, condition not support,frm_rate=%d,width=%d,height=%d! LVDS spread freq invalid,lvds_spread_freq=%d! LVDS spread ratio invalid,lvds_spread_ratio=%d! get panel index illegal,cur_index=%d,total_num=%d! kmalloc size memory failed,size=%d! pwm_type not init, please init first,pwm_type=%d! LVDS intf enable invalid,intf_enable=%d! LVDS spread enable invalid,spread_enable=%d! LVDS comvaltage invalid,lvds_com_voltage=%d! parameter ERROR, correct range is 0 to %d! start panel_drv_tcon_peri_data! parameter ERROR, correct range [0~3]! parameter ERROR, correct range [0~2]! parameter ERROR, correct range [0~1]! call panel CMD_PANEL_SET_INDEX! call panel CMD_PANEL_SET_DRVCURRENT! call panel CMD_PANEL_GET_DRVCURRENT! call panel CMD_PANEL_SET_EMPHASIS! call panel CMD_PANEL_GET_EMPHASIS! call panel CMD_PANEL_GET_PANEL_ATTR! call panel CMD_PANEL_SET_INTF_ATTR! call panel CMD_PANEL_GET_INTF_ATTR! call panel CMD_PANEL_SET_INFO! call panel CMD_PANEL_GET_INFO! call panel CMD_PANEL_GET_STATUS_INFO! call panel CMD_PANEL_GET_DIM_STRGTH_INFO! call panel CMD_PANEL_GET_CONFIG_INFO! call panel CMD_PANEL_GET_BININFO! call panel CMD_PANEL_SET_POWERON! call panel CMD_PANEL_GET_POWERON! call panel CMD_PANEL_SET_LDMDIMENSION! call panel CMD_PANEL_SET_BACKLIGHT_EN! call panel CMD_PANEL_GET_BACKLIGHT_EN! call panel CMD_PANEL_GET_TOTOAL_NUM! panel_0d_dim_ctx is NULL! get default panel info failed, point is NULL! g_pst_pq_func->get_ldm_param_status is NULL! g_pst_pq_func->update_ldm_data_map is NULL! panel_ctx_p is NULL! g_pst_pq_func->get_dci_histram is NULL! g_pst_pq_func->set_backlight_level is NULL! g_pst_pq_func->set_dim_level is NULL! g_pst_pq_func->update_ldm_data is NULL! call panel CMD_PANEL_SET_BACKLIGHT_LEVEL! call panel CMD_PANEL_GET_BACKLIGHT_LEVEL! call panel CMD_PANEL_SET_DIM_STRGTH_LEVEL! call panel CMD_PANEL_GET_DIM_STRGTH_LEVEL! call panel CMD_PANEL_SET_BLDRIVER_REG! call panel CMD_PANEL_SET_COMBO_VIRTUAL_REG! call panel CMD_PANEL_GET_COMBO_VIRTUAL_REG! call panel CMD_PANEL_SET_REFRESH_RATE! call panel CMD_PANEL_GET_REFRESH_RATE! call panel CMD_PANEL_SET_FIX_OUTRATE! call panel CMD_PANEL_GET_FIX_OUTRATE! fix_rate_type is other, but support other flag is FALSE! call panel CMD_PANEL_LDM_GET_ENABLE! call panel CMD_PANEL_LDM_ENABLE! call panel CMD_PANEL_SET_DYNAMICBL_ENABLE! call panel CMD_PANEL_GET_DYNAMICBL_ENABLE! call panel CMD_PANEL_GET_DRVCURRENT_RANGE! call panel CMD_PANEL_GET_VOLTAGE_RANGE! call panel CMD_PANEL_GET_SPREAD_RANGE! call panel CMD_PANEL_SET_VOLTAGE! call panel CMD_PANEL_GET_VOLTAGE! call panel CMD_PANEL_SET_DIM_DEMO_MODE! call panel CMD_PANEL_GET_DIM_DEMO_MODE! call panel CMD_PANEL_SET_SPREAD! call panel CMD_PANEL_GET_SPREAD! call panel CMD_PANEL_GET_LDM_DATA! |HT(%d) * VT(%d)* frm_rate(%d) - pix_clk(%d)| > TOLERENCE(%d)! malloc tcon pinmux reg info error!! malloc tcon combo reg info error!! malloc 2d timing reg info error!! malloc tcon intf reg info error!! tcon pinmux reg data_size error!! tcon combo reg data_size error!! tcon 2d timing reg data_size error!! tcon interface reg data_size error!! malloc tcon tabel data error!! parse pinmux failure!! parse combo failure!! parse panel failure!! parse 2D timing failure!! parse intf failure!! panel moudle not init!!! get combo module_param error ! get pinmux module param error ! get panel module param error ! get 2D timing module param error ! get intf module param error ! [boottime] panel loader %d finished ! Get panel pwm freq fail, invalid freq value is 0x%x Set panel pwm duty fail, invalid pwm type is 0x%x Get panel pwm duty fail, invalid pwm type is 0x%x Set panel pwm freq fail, invalid pwm type is 0x%x Get panel pwm freq fail, invalid pwm type is 0x%x Set panel pwm enable fail, invalid pwm type is 0x%x spread_enable is invalid spread_freq para invalid ssc_span para invalid aphy_div_fb para invalid panel spread set failed target str not exist! find_type_str [%s] echo blrange [min_level~255] [0~max_level] >/proc/msp/panel set backlight min and max range [0~255] echo bllevel [0~max] >/proc/msp/panel set backlight level range [0~255] echo lbitwidth [0/1] >/proc/msp/panel set lvds bitwidth (0:10bit 1:8bit) echo vbyte [3/4/5] >/proc/msp/panel set vbo byte number (3:8bit 4:10bit 5:12bit) echo ldatafmt [0/1/2/3] >/proc/msp/panel set lvds map (0:VESA 1:JEIDA 2:FP 3:other) echo tconbist [0/16] >/proc/msp/panel Set Tcon bist (0:disable 1~16 pattern) echo tcon [0/1] >/proc/msp/panel set tcon power (0:power off 1:power on) echo llinkmod [0~3] >/proc/msp/panel set lvds linkmode (0:1link 1:2link 2:4link 3:8link) echo intf [0/1] >/proc/msp/panel set VBO/LVDS intf enable (0:disable 1:enable) echo dimen [0/1] >/proc/msp/panel set 0D/local dim enable (0:disable 1:enable) echo blenable [0/1] >/proc/msp/panel set backlight enable (0:disable 1:enable) (4:24bit422 5:20bit422 6:16bit422) |HT * VT* frm_rate - pix_clk| > TOLERENCE! panel not init!! panel height is invalid,it is 0!! p N p ] p a p 0u p p P p ` P ` 8 w 8 8 p w p p ] a 0u 8 N 8 ] 8 a 8 0u 8 8 P 8 ` 8 w 8 8 p p P p ` X X P X ` P ` P ` 8 8 8 8 p p p p p p p P ` ] a 0u P ` l I 8 h V , J] 8 h ' V , J] 8 , 8 , p ! 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