1 /*
2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16 #include "app_main.h"
17
18 #include <hi3861_platform.h>
19 #include <hi_mdm.h>
20 #include <hi_flash.h>
21 #include <hi_nv.h>
22 #include <hi_lowpower.h>
23 #include <hi_diag.h>
24 #include <hi_crash.h>
25 #include <hi_sal.h>
26 #include <hi_shell.h>
27 #include <ohos_init.h>
28 #if defined(CONFIG_AT_COMMAND) || defined(CONFIG_FACTORY_TEST_MODE)
29 #include <hi_at.h>
30 #endif
31 #include <hi_fs.h>
32 #include <hi_partition_table.h>
33 #include <hi_ver.h>
34 #include <hi_cpu.h>
35 #include <hi_crash.h>
36 #ifdef CONFIG_DMA_SUPPORT
37 #include <hi_dma.h>
38 #endif
39 #ifdef CONFIG_I2C_SUPPORT
40 #include <hi_i2c.h>
41 #endif
42 #ifdef CONFIG_I2S_SUPPORT
43 #include <hi_i2s.h>
44 #endif
45 #ifdef CONFIG_SPI_SUPPORT
46 #include <hi_spi.h>
47 #endif
48 #ifdef CONFIG_PWM_SUPPORT
49 #include <hi_pwm.h>
50 #endif
51 #ifdef CONFIG_SDIO_SUPPORT
52 #include <hi_sdio_device.h>
53 #include <hi_watchdog.h>
54 #include <app_demo_sdio_device.h>
55 #endif
56 #include <hi_early_debug.h>
57 #include <hi_tsensor.h>
58
59 #ifndef CONFIG_FACTORY_TEST_MODE
60 #include "lwip/opt.h"
61 #include "lwip/ip_addr.h"
62 #include "lwip/netifapi.h"
63 #endif
64
65 #include "app_demo_upg_verify.h"
66 #include "hi_wifi_api.h"
67 #ifdef CONFIG_HILINK
68 #include "hilink.h"
69 #endif
70
71 #include <hi_tsensor.h>
72 #include <app_io_init.h>
73
74 #define APP_DEMO_RELEASE_MEM_TASK_SIZE 0x200
75 /*
76 * Should be a high priority(but priority can't lower than 3),
77 * because the memory of app_main task needs to free as soon as possible.
78 */
79 #define APP_DEMO_RELEASE_MEM_TASK_PRIO 0x3
80
81 #ifndef CONFIG_QUICK_SEND_MODE
82
83 #define APP_INIT_VAP_NUM 2
84 #ifdef CONFIG_MESH_SUPPORT
85 #define APP_INIT_USR_NUM 6
86 #else
87 #define APP_INIT_USR_NUM 2
88 #endif
89
90 #else
91 #define APP_INIT_VAP_NUM 1
92 #define APP_INIT_USR_NUM 1
93 #endif
94
95 #define APP_INIT_EVENT_NUM 7
96
97 #define PERIPHERAL_INIT_ERR_FLASH (1 << 0)
98 #define PERIPHERAL_INIT_ERR_UART0 (1 << 1)
99 #define PERIPHERAL_INIT_ERR_UART1 (1 << 2)
100 #define PERIPHERAL_INIT_ERR_UART2 (1 << 3)
101 #define PERIPHERAL_INIT_ERR_IO (1 << 4)
102 #define PERIPHERAL_INIT_ERR_CIPHER (1 << 5)
103 #define PERIPHERAL_INIT_ERR_DMA (1 << 6)
104 #define PERIPHERAL_INIT_ERR_I2C (1 << 7)
105 #define PERIPHERAL_INIT_ERR_I2S (1 << 8)
106 #define PERIPHERAL_INIT_ERR_SPI (1 << 9)
107 #define PERIPHERAL_INIT_ERR_PWM (1 << 10)
108 #define PERIPHERAL_INIT_ERR_SDIO (1 << 11)
109
110 #ifndef IO_CTRL_REG_BASE_ADDR
111 #define IO_CTRL_REG_BASE_ADDR 0x904
112 #endif
113 #define iocfg_reg_addr(_x) (HI_IOCFG_REG_BASE + IO_CTRL_REG_BASE_ADDR + (_x) * 4)
114 #define IOCFG_LOWPOWER_CFG_VAL 0xF8
115
116 #ifdef CONFIG_SDIO_SUPPORT
117 #define APP_SDIO_INIT_TASK_SIZE 0x1000
118 #define APP_SDIO_INIT_TASK_PRIO 25
119
sdio_init_task_body(hi_void * param)120 static hi_void *sdio_init_task_body(hi_void *param)
121 {
122 printf("start sdio init\r\n");
123 hi_unref_param(param);
124 /* To prevent watchdog exceptions caused by SDIO host, disable the watchdog first. */
125 hi_watchdog_disable();
126 hi_u32 ret = hi_sdio_init();
127 if (ret != HI_ERR_SUCCESS) {
128 printf("sdio driver init fail\r\n");
129 }
130 hi_watchdog_enable();
131 app_demo_sdio_callback_init();
132 printf("finish sdio init\r\n");
133 return HI_NULL;
134 }
135
app_sdio_init(hi_void)136 hi_u32 app_sdio_init(hi_void)
137 {
138 /* Create a task to init sdio */
139 hi_u32 sdio_init_task_id = 0;
140 hi_task_attr attr = {0};
141 attr.stack_size = APP_SDIO_INIT_TASK_SIZE;
142 attr.task_prio = APP_SDIO_INIT_TASK_PRIO;
143 attr.task_name = (hi_char*)"sdio_init";
144 hi_u32 ret = hi_task_create(&sdio_init_task_id, &attr, sdio_init_task_body, HI_NULL);
145 if (ret != HI_ERR_SUCCESS) {
146 printf("Falied to create sdio init task!\n");
147 }
148 return ret;
149 }
150 #endif
151
152 #define CLKEN_I2C0 14
153 #define CLKEN_I2C1 15
154 #define CLKEN_SPI0 5
155 #define CLKEN_SPI1 0
156 #define CLKEN_MONITOR 6
157 #define CLKEN_DMA_WBUS 1
158 #define CLKEN1_PWM5 10
159 #define CLKEN1_PWM_BUS 6
160 #define CLKEN1_PWM 5
161 #define CLKEN1_PWM4 4
162 #define CLKEN1_PWM3 3
163 #define CLKEN1_PWM2 2
164 #define CLKEN1_PWM1 1
165 #define CLKEN1_PWM0 0
166 #define CLKEN1_PWM_ALL ((1 << (CLKEN1_PWM0)) | (1 << (CLKEN1_PWM1)) | (1 << (CLKEN1_PWM2)) | (1 << (CLKEN1_PWM3)) | \
167 (1 << (CLKEN1_PWM4)) | (1 << (CLKEN1_PWM5)))
168 #define CLKEN2_I2S_BUS 11
169 #define CLKEN2_I2S 10
170 #define CLKEN_UART2 6
171 #define CLKEN_UART2_BUS 9
172 #define CLKEN_TIMER1 7
173 #define CLKEN_TIMER2 8
174 #define CLKEN_SDIO_WBUS 4
175
peripheral_close_clken(hi_void)176 hi_void peripheral_close_clken(hi_void)
177 {
178 hi_u16 reg_val;
179 hi_reg_read16(CLDO_CTL_CLKEN_REG, reg_val);
180 reg_val &= ~((1 << CLKEN_I2C0) | (1 << CLKEN_I2C1));
181 reg_val &= ~((1 << CLKEN_SPI0) | (1 << CLKEN_SPI1));
182 reg_val &= ~((1 << CLKEN_DMA_WBUS) | (1 << CLKEN_MONITOR));
183 reg_val &= ~((1 << CLKEN_TIMER1) | (1 << CLKEN_TIMER2));
184 hi_reg_write16(CLDO_CTL_CLKEN_REG, reg_val); /* disable clken0 clk gate */
185
186 #ifndef CONFIG_PWM_HOLD_AFTER_REBOOT
187 hi_reg_read16(CLDO_CTL_CLKEN1_REG, reg_val);
188 reg_val &= ~CLKEN1_PWM_ALL;
189 reg_val &= ~((1 << CLKEN1_PWM_BUS) | (1 << CLKEN1_PWM));
190 hi_reg_write16(CLDO_CTL_CLKEN1_REG, reg_val); /* disable clken1 clk gate */
191 #endif
192
193 hi_reg_read16(CLDO_CTL_CLKEN2_REG, reg_val);
194 reg_val &= ~((1 << CLKEN2_I2S) | (1 << CLKEN2_I2S_BUS));
195 hi_reg_write16(CLDO_CTL_CLKEN2_REG, reg_val); /* disable clken2 clk gate */
196 hi_reg_read16(W_CTL_UART_MAC80M_CLKEN_REG, reg_val);
197 #ifdef CONFIG_SDIO_SUPPORT
198 reg_val &= ~((1 << CLKEN_UART2) | (1 << CLKEN_UART2_BUS));
199 #else
200 reg_val &= ~((1 << CLKEN_UART2) | (1 << CLKEN_UART2_BUS) | (1 << CLKEN_SDIO_WBUS));
201 #endif
202 hi_reg_write16(W_CTL_UART_MAC80M_CLKEN_REG, reg_val); /* disable uart_mac80m clk gate */
203 hi_reg_write16(PMU_CMU_CTL_CLK_960M_GT_REG, 0x1); /* disable 960m clk gate */
204 }
205
206 static hi_uart_attribute g_at_uart_cfg = {115200, 8, 1, 0, 0};
207
208 hi_bool g_have_inited = HI_FALSE;
209 static app_iocfg_backup g_iocfg_backup = {0};
210
peripheral_init(hi_void)211 hi_void peripheral_init(hi_void)
212 {
213 hi_u32 ret;
214 hi_u32 err_info = 0;
215 hi_cipher_set_clk_switch(HI_TRUE);
216 peripheral_close_clken();
217 hi_flash_deinit();
218 ret = hi_flash_init();
219 if (ret != HI_ERR_SUCCESS) {
220 err_info |= PERIPHERAL_INIT_ERR_FLASH;
221 }
222
223 if (g_have_inited == HI_FALSE) {
224 /* app_io_set_gpio2_clkout_enable(HI_TRUE); set gpio2 clock out */
225 ret = hi_uart_init(HI_UART_IDX_1, &g_at_uart_cfg, HI_NULL);
226 if (ret != HI_ERR_SUCCESS) {
227 err_info |= PERIPHERAL_INIT_ERR_UART1;
228 }
229 } else {
230 /* app_io_set_gpio2_clkout_enable(HI_TRUE); output clock after wakeup,
231 user also can output clock whenever needed */
232 ret = hi_uart_lp_restore(HI_UART_IDX_1);
233 if (ret != HI_ERR_SUCCESS) {
234 err_info |= PERIPHERAL_INIT_ERR_UART0;
235 }
236 ret = hi_uart_lp_restore(HI_UART_IDX_0);
237 if (ret != HI_ERR_SUCCESS) {
238 err_info |= PERIPHERAL_INIT_ERR_UART1;
239 }
240 ret = hi_uart_lp_restore(HI_UART_IDX_2);
241 if (ret != HI_ERR_SUCCESS) {
242 err_info |= PERIPHERAL_INIT_ERR_UART2;
243 }
244 hi_tsensor_lp_restore();
245 }
246 g_have_inited = HI_TRUE;
247
248 app_io_init();
249
250 ret = hi_cipher_init();
251 if (ret != HI_ERR_SUCCESS) {
252 err_info |= PERIPHERAL_INIT_ERR_CIPHER;
253 }
254
255 #ifdef CONFIG_DMA_SUPPORT
256 /* 如果需要使用UART/SPI的DMA功能，或者使用I2S驱动等，需要初始化DMA */
257 /* if product use dma in uart or spi, or use I2S driver, or DMA memory transfer,
258 should init DMA Driver here. */
259 ret = hi_dma_init();
260 if (ret != HI_ERR_SUCCESS) {
261 err_info |= PERIPHERAL_INIT_ERR_DMA;
262 }
263 #endif
264
265 #ifdef CONFIG_I2C_SUPPORT
266 ret = hi_i2c_deinit(HI_I2C_IDX_0); /* if wake_up from deep sleep, should deinit first */
267 ret |= hi_i2c_init(HI_I2C_IDX_0, 100000); /* baudrate: 100000 */
268 if (ret != HI_ERR_SUCCESS) {
269 err_info |= PERIPHERAL_INIT_ERR_I2C;
270 }
271 #endif
272
273 #ifdef CONFIG_I2S_SUPPORT
274 ret = hi_i2s_deinit(); /* if wake_up from deep sleep, should deinit first */
275 hi_i2s_attribute i2s_cfg = {
276 .sample_rate = HI_I2S_SAMPLE_RATE_8K,
277 .resolution = HI_I2S_RESOLUTION_16BIT,
278 };
279 ret |= hi_i2s_init(&i2s_cfg);
280 if (ret != HI_ERR_SUCCESS) {
281 err_info |= PERIPHERAL_INIT_ERR_I2S;
282 }
283 #endif
284
285 #ifdef CONFIG_SPI_SUPPORT
286 ret = hi_spi_deinit(HI_SPI_ID_0); /* if wake_up from deep sleep, should deinit first */
287 hi_spi_cfg_basic_info spi_cfg_basic_info;
288 spi_cfg_basic_info.cpha = 1;
289 spi_cfg_basic_info.cpol = 1;
290 spi_cfg_basic_info.data_width = HI_SPI_CFG_DATA_WIDTH_E_7BIT;
291 spi_cfg_basic_info.endian = 0;
292 spi_cfg_basic_info.fram_mode = 0;
293 spi_cfg_basic_info.freq = 2000000; /* set frequency 2000000 */
294 hi_spi_cfg_init_param spi_init_param = {0};
295 spi_init_param.is_slave = HI_FALSE;
296 ret |= hi_spi_init(HI_SPI_ID_0, spi_init_param, &spi_cfg_basic_info);
297 if (ret != HI_ERR_SUCCESS) {
298 err_info |= PERIPHERAL_INIT_ERR_SPI;
299 }
300 #endif
301
302 #ifdef CONFIG_PWM_SUPPORT
303 ret = hi_pwm_init(HI_PWM_PORT_PWM1);
304 if (ret != HI_ERR_SUCCESS) {
305 err_info |= PERIPHERAL_INIT_ERR_PWM;
306 }
307 #endif
308
309 #ifdef AT_DEBUG_CMD_SUPPORT
310 if (err_info != 0) {
311 hi_at_printf("peri_init:%x\r\n", err_info);
312 }
313 #endif
314 }
315
peripheral_init_no_sleep(hi_void)316 hi_void peripheral_init_no_sleep(hi_void)
317 {
318 /*
319 * Example: To initialize a peripheral that does not need to be reinitialized
320 * during deep sleep wakeup, call this API.
321 */
322 #ifdef CONFIG_SDIO_SUPPORT
323 hi_sdio_set_powerdown_when_deep_sleep(HI_FALSE);
324 hi_u32 ret = app_sdio_init();
325 if (ret != HI_ERR_SUCCESS) {
326 printf("sdio init failed\r\n");
327 }
328 #endif
329 }
330
config_before_sleep(hi_void)331 hi_u32 config_before_sleep(hi_void)
332 {
333 /* Configured based on the actual I/O design to prevent current leakage during deep sleep */
334 if (hi_lpc_get_type() == HI_DEEP_SLEEP) {
335 #ifdef AT_DEBUG_CMD_SUPPORT
336 hi_at_printf("!");
337 #endif
338 /*
339 * You can set the parameters based on the actual I/O usage,
340 * such as no pull-up resistor, no pull-down resistor,
341 * and disabled input signal enable, to prevent current leakage. For details, see the chip manual.
342 */
343 hi_reg_read16(iocfg_reg_addr(HI_IO_NAME_GPIO_6), g_iocfg_backup.gpio6_cfg);
344 hi_reg_read16(iocfg_reg_addr(HI_IO_NAME_GPIO_8), g_iocfg_backup.gpio8_cfg);
345 hi_reg_read16(iocfg_reg_addr(HI_IO_NAME_GPIO_10), g_iocfg_backup.gpio10_cfg);
346 hi_reg_read16(iocfg_reg_addr(HI_IO_NAME_GPIO_11), g_iocfg_backup.gpio11_cfg);
347 hi_reg_read16(iocfg_reg_addr(HI_IO_NAME_GPIO_12), g_iocfg_backup.gpio12_cfg);
348 hi_reg_read16(iocfg_reg_addr(HI_IO_NAME_GPIO_13), g_iocfg_backup.gpio13_cfg);
349 hi_reg_read16(iocfg_reg_addr(HI_IO_NAME_SFC_CSN), g_iocfg_backup.sfc_csn_cfg);
350
351 hi_reg_write16(iocfg_reg_addr(HI_IO_NAME_GPIO_6), IOCFG_LOWPOWER_CFG_VAL);
352 hi_reg_write16(iocfg_reg_addr(HI_IO_NAME_GPIO_8), IOCFG_LOWPOWER_CFG_VAL);
353 hi_reg_write16(iocfg_reg_addr(HI_IO_NAME_GPIO_10), IOCFG_LOWPOWER_CFG_VAL);
354 hi_reg_write16(iocfg_reg_addr(HI_IO_NAME_GPIO_11), IOCFG_LOWPOWER_CFG_VAL);
355 hi_reg_write16(iocfg_reg_addr(HI_IO_NAME_GPIO_12), IOCFG_LOWPOWER_CFG_VAL);
356 hi_reg_write16(iocfg_reg_addr(HI_IO_NAME_GPIO_13), IOCFG_LOWPOWER_CFG_VAL);
357 hi_reg_write16(iocfg_reg_addr(HI_IO_NAME_SFC_CSN), IOCFG_LOWPOWER_CFG_VAL);
358 hi_uart_lp_save(HI_UART_IDX_0);
359 hi_uart_lp_save(HI_UART_IDX_1);
360 hi_uart_lp_save(HI_UART_IDX_2);
361 hi_tsensor_lp_save();
362
363 /* app_io_set_gpio2_clkout_enable(HI_FALSE); set gpio2 input disable for lowpower */
364 }
365 return HI_ERR_SUCCESS;
366 }
367
config_after_sleep(hi_void)368 hi_u32 config_after_sleep(hi_void)
369 {
370 /* Restore the I/O status based on the actual I/O design to prevent current leakage during deep sleep. */
371 if (hi_lpc_get_type() == HI_DEEP_SLEEP) {
372 /* Restore the configuration based on the actual I/O usage. */
373 hi_reg_write16(iocfg_reg_addr(HI_IO_NAME_GPIO_6), g_iocfg_backup.gpio6_cfg);
374 hi_reg_write16(iocfg_reg_addr(HI_IO_NAME_GPIO_8), g_iocfg_backup.gpio8_cfg);
375 hi_reg_write16(iocfg_reg_addr(HI_IO_NAME_GPIO_10), g_iocfg_backup.gpio10_cfg);
376 hi_reg_write16(iocfg_reg_addr(HI_IO_NAME_GPIO_11), g_iocfg_backup.gpio11_cfg);
377 hi_reg_write16(iocfg_reg_addr(HI_IO_NAME_GPIO_12), g_iocfg_backup.gpio12_cfg);
378 hi_reg_write16(iocfg_reg_addr(HI_IO_NAME_GPIO_13), g_iocfg_backup.gpio13_cfg);
379 hi_reg_write16(iocfg_reg_addr(HI_IO_NAME_SFC_CSN), g_iocfg_backup.sfc_csn_cfg);
380 #ifdef AT_DEBUG_CMD_SUPPORT
381 hi_at_printf("@\r\n");
382 #endif
383 }
384 return HI_ERR_SUCCESS;
385 }
386
app_demo_task_second_body(hi_void * param)387 static hi_void *app_demo_task_second_body(hi_void *param)
388 {
389 /* Releases the app_main stack memory. */
390 hi_unref_param(param);
391 return HI_NULL;
392 }
393
app_demo_task_body(hi_void * param)394 static hi_void *app_demo_task_body(hi_void *param)
395 {
396 /* Releases the app_main stack memory. */
397 hi_unref_param(param);
398
399 hi_u32 task_id = 0;
400 hi_task_attr attr = {0};
401 attr.stack_size = APP_DEMO_RELEASE_MEM_TASK_SIZE;
402 attr.task_prio = APP_DEMO_RELEASE_MEM_TASK_PRIO;
403 attr.task_name = (hi_char*)"app_demo_second";
404 hi_u32 ret = hi_task_create(&task_id, &attr, app_demo_task_second_body, HI_NULL);
405 if (ret != HI_ERR_SUCCESS) {
406 printf("Falied to create app_demo_second task:0x%x\n", ret);
407 }
408 return HI_NULL;
409 }
410
app_demo_task_release_mem(hi_void)411 hi_void app_demo_task_release_mem(hi_void)
412 {
413 /* Releases the app_main stack memory. */
414 hi_u32 task_id = 0;
415 hi_task_attr attr = {0};
416 attr.stack_size = APP_DEMO_RELEASE_MEM_TASK_SIZE;
417 attr.task_prio = APP_DEMO_RELEASE_MEM_TASK_PRIO;
418 attr.task_name = (hi_char*)"app_demo";
419 hi_u32 ret = hi_task_create(&task_id, &attr, app_demo_task_body, HI_NULL);
420 if (ret != HI_ERR_SUCCESS) {
421 printf("Falied to create app_demo task:0x%x\n", ret);
422 }
423 return;
424 }
425
426 #ifndef CONFIG_QUICK_SEND_MODE
app_main(hi_void)427 hi_void app_main(hi_void)
428 {
429 (hi_void)hi_event_init(APP_INIT_EVENT_NUM, HI_NULL);
430 #ifdef CONFIG_FACTORY_TEST_MODE
431 printf("factory test mode!\r\n");
432 #endif
433
434 const hi_char* sdk_ver = hi_get_sdk_version();
435 printf("sdk ver:%s\r\n", sdk_ver);
436
437 hi_flash_partition_table *ptable = HI_NULL;
438
439 peripheral_init();
440 peripheral_init_no_sleep();
441
442 #ifndef CONFIG_FACTORY_TEST_MODE
443 hi_lpc_register_wakeup_entry(peripheral_init);
444 #endif
445
446 hi_u32 ret = hi_factory_nv_init(HI_FNV_DEFAULT_ADDR, HI_NV_DEFAULT_TOTAL_SIZE, HI_NV_DEFAULT_BLOCK_SIZE);
447 if (ret != HI_ERR_SUCCESS) {
448 printf("factory nv init fail\r\n");
449 }
450
451 /* partion table should init after factory nv init. */
452 ret = hi_flash_partition_init();
453 if (ret != HI_ERR_SUCCESS) {
454 printf("flash partition table init fail:0x%x \r\n", ret);
455 }
456 ptable = hi_get_partition_table();
457
458 ret = hi_nv_init(ptable->table[HI_FLASH_PARTITON_NORMAL_NV].addr, ptable->table[HI_FLASH_PARTITON_NORMAL_NV].size,
459 HI_NV_DEFAULT_BLOCK_SIZE);
460 if (ret != HI_ERR_SUCCESS) {
461 printf("nv init fail\r\n");
462 }
463
464 #ifndef CONFIG_FACTORY_TEST_MODE
465 hi_upg_init();
466 #endif
467
468 /* if not use file system, there is no need init it */
469 hi_fs_init();
470
471 hi_sal_init();
472 /*
473 * If this parameter is set to TRUE, the PC value during reset is displayed when the watchdog is reset.
474 * However,the reset may be incomplete.
475 * Therefore, you must set this parameter to FALSE for the mass production version.
476 */
477 hi_syserr_watchdog_debug(HI_FALSE);
478 /* 默认记录宕机信息到FLASH，根据应用场景，可不记录，避免频繁异常宕机情况损耗FLASH寿命 */
479 /* By default, breakdown information is recorded in the flash memory. You can choose not to record breakdown
480 * information based on the application scenario to prevent flash servicelife loss caused by frequent breakdown. */
481 hi_syserr_record_crash_info(HI_TRUE);
482
483 hi_lpc_init();
484 hi_lpc_register_hw_handler(config_before_sleep, config_after_sleep);
485
486 #if defined(CONFIG_AT_COMMAND) || defined(CONFIG_FACTORY_TEST_MODE)
487 ret = hi_at_init();
488 if (ret == HI_ERR_SUCCESS) {
489 hi_at_sys_cmd_register();
490 }
491 #endif
492
493 /* 如果不需要使用Histudio查看WIFI驱动运行日志等，无需初始化diag */
494 /* if not use histudio for diagnostic, diag initialization is unnecessary */
495 /* Shell and Diag use the same uart port, only one of them can be selected */
496 #ifndef CONFIG_FACTORY_TEST_MODE
497
498 #ifndef ENABLE_SHELL_DEBUG
499 #ifdef CONFIG_DIAG_SUPPORT
500 (hi_void)hi_diag_init();
501 #endif
502 #else
503 (hi_void)hi_shell_init();
504 #endif
505
506 /*
507 * If the diag and shell are not started, this interface is invoked to reallocate the serial port number
508 * for outputting debug logs based on the NV configuration.
509 * hi_printf_alloc_uart_by_nv();
510 * You can also invoke the change_uart interface in serial_dw.h to forcibly change the serial port number
511 * for outputting debug logs.
512 * change_uart((hi_uart)uart_id, default_uart_param);
513 */
514 tcpip_init(NULL, NULL);
515 #endif
516
517 ret = hi_wifi_init(APP_INIT_VAP_NUM, APP_INIT_USR_NUM);
518 if (ret != HISI_OK) {
519 printf("wifi init failed!\n");
520 } else {
521 printf("wifi init success!\n");
522 }
523 app_demo_task_release_mem(); /* Task used to release the system stack memory. */
524 InitWifiGlobalLock();
525
526 #ifndef CONFIG_FACTORY_TEST_MODE
527 app_demo_upg_init();
528 #ifdef CONFIG_HILINK
529 ret = hilink_main();
530 if (ret != HISI_OK) {
531 printf("hilink init failed!\n");
532 } else {
533 printf("hilink init success!\n");
534 }
535 #endif
536 #endif
537 printf("\n app_main test\n");
538 MODULE_INIT(bsp);
539 MODULE_INIT(device);
540 MODULE_INIT(core);
541 SYS_INIT(service);
542 SYS_INIT(feature);
543 MODULE_INIT(run);
544 printf("\n app_main INIT_TEST_CALL\n");
545 }
546