1 /** 2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 * 15 * Description: Provides flash common information. \n 16 * 17 * History: \n 18 * 2022-11-15， Create file. \n 19 */ 20 #ifndef FLASH_INFORMATION_H 21 #define FLASH_INFORMATION_H 22 23 /** 24 * @defgroup drivers_driver_flash_config_info Flash Config Info 25 * @ingroup drivers_driver_flash 26 * @{ 27 */ 28 #include "flash_mxic_config.h" 29 #include "flash_others_config.h" 30 #include "flash_winbond_config.h" 31 #include "flash_dosilicon_config.h" 32 #include "flash_gigadevice_config.h" 33 34 static const flash_cmd_exe_t g_w25q64_lock_image_region_cmd[] = { 35 { FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_QUAD, 1, { FLASH_WREN_CMD } }, /* Write enable. */ 36 { FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_QUAD, 2, { 0x01, 0x1C } }, /* Write status reg1. */ 37 { FLASH_CMD_TYPE_PROCESSING, HAL_SPI_FRAME_FORMAT_QUAD, 3, { FLASH_RDSR1_CMD, 0, 0 } }, /* Wait config done. */ 38 { FLASH_CMD_TYPE_END, HAL_SPI_FRAME_FORMAT_MAX_NUM, 0, { 0 } } 39 }; 40 41 static const flash_cmd_exe_t g_w25q64_unlock_image_region_cmd[] = { 42 { FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_QUAD, 1, { FLASH_WREN_CMD } }, /* Write enable. */ 43 { FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_QUAD, 2, { 0x01, 0x00 } }, /* Write status reg1. */ 44 { FLASH_CMD_TYPE_PROCESSING, HAL_SPI_FRAME_FORMAT_QUAD, 3, { FLASH_RDSR1_CMD, 0, 0 } }, /* Wait config done. */ 45 { FLASH_CMD_TYPE_END, HAL_SPI_FRAME_FORMAT_MAX_NUM, 0, { 0 } } 46 }; 47 48 /** 49 * @if Eng 50 * @brief Flash adaptation table. 51 * @else 52 * @brief flash 适配表。 53 * @endif 54 */ 55 typedef struct flash_device_parameter { 56 uint32_t manufacturer_id; /*!< @if Eng Flash manufacturer id. 57 @else Flash 制造id。@endif */ 58 uint32_t flash_size; /*!< @if Eng Flash size. 59 @else Flash 大小。@endif */ 60 uint8_t enter_xip; /*!< @if Eng Enter xip cmd. 61 @else 进xip命令。@endif */ 62 uint8_t exit_xip; /*!< @if Eng Exit xip cmd. 63 @else 退xip命令。@endif */ 64 uint8_t read_dummy_clk; /*!< @if Eng Read dummy cycle 65 @else 读虚拟字节。@endif */ 66 uint8_t security_reg_cmd; /*!< @if Eng Security reg cmd. 67 @else 安全寄存器命令。@endif */ 68 uint8_t suspend_cmd; /*!< @if Eng Suspend cmd. 69 @else 休眠命令。@endif */ 70 uint8_t resume_cmd; /*!< @if Eng Resume cmd. 71 @else 唤醒命令。@endif */ 72 flash_cmd_exe_t *enter_qspi_mode_cmd; /*!< @if Eng Enter qspi mode cmd. 73 @else 进qspi模式命令。@endif */ 74 flash_cmd_exe_t *enter_xip_mode_cmd; /*!< @if Eng Enter xip mode wait cycle. 75 @else 进xip模式命令。@endif */ 76 flash_qspi_xip_config_t *enter_xip_mode_config; /*!< @if Eng Enter xip mode config. 77 @else 进xip模式配置。@endif */ 78 } flash_device_parameter_t; 79 80 static const flash_device_parameter_t g_flash_device_parameter[FLASH_MANUFACTURER_MAX] = { 81 { FLASH_MANUFACTURER_MXIC_MX25R32, FLASH_SIZE_4MB, 0xA5, 0xAA, WAIT_CYCLES_4, 0x2B, 0xB0, 0x30, 82 g_mxic_mx25rxx_enter_qspi_mode_cmd, NULL, &g_mxic_mx25rxx_config }, 83 { FLASH_MANUFACTURER_MXIC_MX25R64, FLASH_SIZE_8MB, 0xA5, 0xAA, WAIT_CYCLES_4, 0x2B, 0xB0, 0x30, 84 g_mxic_mx25rxx_enter_qspi_mode_cmd, NULL, &g_mxic_mx25rxx_config }, 85 { FLASH_MANUFACTURER_MXIC_MX25U64, FLASH_SIZE_8MB, 0xA5, 0xAA, WAIT_CYCLES_4, 0x2B, 0xB0, 0x30, 86 g_mxic_mx25uxx_enter_qspi_mode_cmd, NULL, &g_mxic_mx25uxx_config }, 87 { FLASH_MANUFACTURER_MXIC_MX25U128, FLASH_SIZE_16MB, 0xA5, 0xAA, WAIT_CYCLES_4, 0x2B, 0xB0, 0x30, 88 g_mxic_mx25uxx_enter_qspi_mode_cmd, NULL, &g_mxic_mx25uxx_config }, 89 { FLASH_MANUFACTURER_WINBOND_W25Q32, FLASH_SIZE_4MB, 0x20, 0xFF, WAIT_CYCLES_4, 0x05, 0x75, 0x7A, 90 g_winbond_w25qxx_enter_qspi_mode_cmd, NULL, &g_winbond_w25qxx_config }, 91 { FLASH_MANUFACTURER_WINBOND_W25Q64, FLASH_SIZE_8MB, 0x20, 0xFF, WAIT_CYCLES_4, 0x35, 0x75, 0x7A, 92 g_winbond_w25qxx_enter_qspi_mode_cmd, NULL, &g_winbond_w25qxx_config }, 93 { FLASH_MANUFACTURER_WINBOND_W25Q128, FLASH_SIZE_16MB, 0x20, 0xFF, WAIT_CYCLES_4, 0x05, 0x75, 0x7A, 94 g_winbond_w25qxx_enter_qspi_mode_cmd, NULL, &g_winbond_w25qxx_config }, 95 { FLASH_MANUFACTURER_WINBOND_W25Q128JW, FLASH_SIZE_16MB, 0x20, 0xFF, WAIT_CYCLES_4, 0x05, 0x75, 0x7A, 96 g_winbond_w25qxx_enter_qspi_mode_cmd, NULL, &g_winbond_w25qxx_config }, 97 { FLASH_MANUFACTURER_WINBOND_W25Q256, FLASH_SIZE_32MB, 0x20, 0xFF, WAIT_CYCLES_2, 0x05, 0x75, 0x7A, 98 g_winbond_w25q256_enter_qspi_mode_cmd, NULL, &g_winbond_w25q256_config }, 99 { FLASH_MANUFACTURER_MICRON_MT25QU128, FLASH_SIZE_16MB, 0x0, 0x10, WAIT_CYCLES_2, 0x70, 0x75, 0x7A, 100 g_micro_mt25qu128_enter_qspi_mode_cmd, g_micro_mt25qu128_enter_xip_mode_cmd, &g_micro_mt25qu128_config }, 101 { FLASH_MANUFACTURER_MICRON_MT25QU256, FLASH_SIZE_32MB, 0x0, 0x10, WAIT_CYCLES_4, 0x70, 0x75, 0x7A, 102 g_micro_mt25qu256_enter_qspi_mode_cmd, g_micro_mt25qu256_enter_xip_mode_cmd, &g_micro_mt25qu256_config }, 103 { FLASH_MANUFACTURER_GIGADEVICE_GD25WQ64, FLASH_SIZE_8MB, 0x20, 0x0, WAIT_CYCLES_4, 0x05, 0x75, 0x7A, 104 g_gigadevice_gd25wq64_enter_qspi_mode_cmd, NULL, &g_gigadevice_gd25wq64_config }, 105 { FLASH_MANUFACTURER_GIGADEVICE_GD25LE64EX, FLASH_SIZE_8MB, 0x20, 0x0, WAIT_CYCLES_4, 0x05, 0x75, 0x7A, 106 g_gigadevice_gd25wq64_enter_qspi_mode_cmd, NULL, &g_gigadevice_gd25le64_config }, 107 { FLASH_MANUFACTURER_GIGADEVICE_GD25LX128, FLASH_SIZE_16MB, 0x20, 0x0, WAIT_CYCLES_4, 0x05, 0x75, 0x7A, 108 g_gigadevice_gd25lq128_enter_qspi_mode_cmd, NULL, &g_gigadevice_gd25lx_config }, 109 { FLASH_MANUFACTURER_GIGADEVICE_GD25LQ256, FLASH_SIZE_32MB, 0x20, 0x0, WAIT_CYCLES_4, 0x05, 0x75, 0x7A, 110 g_gigadevice_gd25lq256_enter_qspi_mode_cmd, NULL, &g_gigadevice_gd25lq256_config }, 111 { FLASH_MANUFACTURER_DOSILICON_FM25M64, FLASH_SIZE_8MB, 0xA0, 0x00, WAIT_CYCLES_2, 0x35, 0x75, 0x7A, 112 g_dosilicon_fm25m64_enter_qspi_mode_cmd, NULL, &g_dosilicon_fm25m64_config }, 113 { FLASH_MANUFACTURER_GIGADEVICE_GD25LQ32D, FLASH_SIZE_4MB, 0x20, 0x0, WAIT_CYCLES_4, 0x05, 0x75, 0x7A, 114 g_gigadevice_gd25lq32d_enter_qspi_mode_cmd, NULL, &g_gigadevice_gd25lx_config }, 115 { FLASH_MANUFACTURER_DOSILICON_FM25M4AA, FLASH_SIZE_16MB, 0xA0, 0x00, WAIT_CYCLES_2, 0x35, 0x75, 0x7A, 116 g_dosilicon_fm25m64_enter_qspi_mode_cmd, NULL, &g_dosilicon_fm25m4aa_config }, 117 { FLASH_MANUFACTURER_PUYA_P25Q32LX, FLASH_SIZE_32MB, 0x20, 0xFF, WAIT_CYCLES_4, 0x05, 0x75, 0x7A, 118 g_puya_p25q32lc_enter_qspi_mode_cmd, NULL, &g_puya_p25q32lc_config }, 119 { FLASH_MANUFACTURER_ADESTO_AT25SL128A, FLASH_SIZE_16MB, 0xA0, 0x00, WAIT_CYCLES_2, 0x35, 0x75, 0x7A, 120 g_adesto_at25sl128a_enter_qspi_mode_cmd, NULL, &g_adesto_at25sl128a_config }, 121 { FLASH_MANUFACTURER_MXIC_MX25U32, FLASH_SIZE_4MB, 0xA5, 0xAA, WAIT_CYCLES_4, 0x2B, 0xB0, 0x30, 122 g_mxic_mx25u32_enter_qspi_mode_cmd, NULL, &g_mxic_mx25u32_config }, 123 { FLASH_MANUFACTURER_MXIC_MX25U12843, FLASH_SIZE_16MB, 0xA5, 0xAA, WAIT_CYCLES_4, 0x2B, 0xB0, 0x30, 124 g_mxic_mx25uxx_enter_qspi_mode_cmd, NULL, &g_mxic_mx25uxx_config }, 125 { FLASH_MANUFACTURER_ELITE_EN25SX128A, FLASH_SIZE_16MB, 0x20, 0x0, WAIT_CYCLES_4, 0x05, 0x75, 0x7A, 126 g_mxic_en25sxxa_enter_qspi_mode_cmd, NULL, &g_mxic_en25sxxa_config }, 127 { FLASH_MANUFACTURER_DOSILICON_DS25M4AB, FLASH_SIZE_16MB, 0x20, 0xFF, WAIT_CYCLES_4, 0x05, 0x75, 0x7A, 128 g_dosilicon_ds25m4ab_enter_qspi_mode_cmd, NULL, &g_dosilicon_ds25m4ab_config }, 129 { FLASH_MANUFACTURER_ELITE_EN25S32A, FLASH_SIZE_4MB, 0x20, 0x0, WAIT_CYCLES_4, 0x05, 0x75, 0x7A, 130 g_mxic_en25sxxa_enter_qspi_mode_cmd, NULL, &g_mxic_en25sxxa_config }, 131 { FLASH_MANUFACTURER_XTX_XT25Q64D, FLASH_SIZE_8MB, 0x20, 0x0, WAIT_CYCLES_6, 0x35, 0x75, 0x7A, 132 g_xtx_xt25qxxd_enter_qspi_mode_cmd, NULL, &g_xtx_xt25qxxd_config }, 133 { FLASH_MANUFACTURER_XTX_XT25Q128D, FLASH_SIZE_16MB, 0x20, 0x0, WAIT_CYCLES_6, 0x35, 0x75, 0x7A, 134 g_xtx_xt25qxxd_enter_qspi_mode_cmd, NULL, &g_xtx_xt25qxxd_config }, 135 { FLASH_MANUFACTURER_PUYA_P25Q64SL, FLASH_SIZE_8MB, 0x20, 0xFF, WAIT_CYCLES_4, 0x05, 0x75, 0x7A, 136 g_puya_p25q32lc_enter_qspi_mode_cmd, NULL, &g_puya_p25q32lc_config }, 137 { FLASH_MANUFACTURER_MXIC_MX25U256, FLASH_SIZE_32MB, 0xA5, 0xAA, WAIT_CYCLES_4, 0x2B, 0xB0, 0x30, 138 g_mxic_mx25uxx_enter_qspi_mode_cmd, NULL, &g_mxic_mx25uxx_config }, 139 { FLASH_MANUFACTURER_MXIC_MX25R80, FLASH_SIZE_8MB, 0xA5, 0xAA, WAIT_CYCLES_4, 0x2B, 0xB0, 0x30, 140 g_mxic_mx25rxx_enter_qspi_mode_cmd, NULL, &g_mxic_mx25rxx_config }, 141 }; 142 143 static const uint32_t g_xip_use_cmd_mode[] = { 144 FLASH_MANUFACTURER_GIGADEVICE_GD25LX128, 145 FLASH_MANUFACTURER_GIGADEVICE_GD25LQ32D, 146 FLASH_MANUFACTURER_GIGADEVICE_GD25LE64EX, 147 FLASH_MANUFACTURER_GIGADEVICE_GD25WQ64, 148 FLASH_MANUFACTURER_DOSILICON_FM25M4AA, 149 FLASH_MANUFACTURER_PUYA_P25Q32LX, 150 FLASH_MANUFACTURER_ADESTO_AT25SL128A, 151 FLASH_MANUFACTURER_MXIC_MX25U32, 152 FLASH_MANUFACTURER_ELITE_EN25SX128A, 153 FLASH_MANUFACTURER_DOSILICON_FM25M64, 154 FLASH_MANUFACTURER_ELITE_EN25S32A, 155 FLASH_MANUFACTURER_DOSILICON_DS25M4AB, 156 FLASH_MANUFACTURER_PUYA_P25Q64SL, 157 }; 158 159 static flash_cmd_exe_t g_winbond_w25qxx_set_qe_cmd[] = { 160 /* Check QE bit. */ 161 { FLASH_CMD_TYPE_CHECK, HAL_SPI_FRAME_FORMAT_STANDARD, 3, { FLASH_RDSR2_CMD, 0x1, 0x2 } }, 162 /* Write enable. */ 163 { FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_STANDARD, 1, { FLASH_WREN_CMD } }, 164 /* Write status register-2 to 0x2, set QE bit. */ 165 { FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_STANDARD, 2, { 0x31, 0x02 } }, 166 /* Wait until the configuration is complete. */ 167 { FLASH_CMD_TYPE_PROCESSING, HAL_SPI_FRAME_FORMAT_STANDARD, 3, { FLASH_RDSR1_CMD, 0, 0 } }, 168 /* Check QE bit. */ 169 { FLASH_CMD_TYPE_PROCESSING, HAL_SPI_FRAME_FORMAT_STANDARD, 3, { FLASH_RDSR2_CMD, 0x1, 0x2 } }, 170 /* The END command, will not be executed and need return. */ 171 { FLASH_CMD_TYPE_END, HAL_SPI_FRAME_FORMAT_MAX_NUM, 0, { 0 } } 172 }; 173 174 static flash_cmd_exe_t g_dosilicon_fm25m64_set_qe_cmd[] = { 175 /* Check QE bit. */ 176 { FLASH_CMD_TYPE_CHECK, HAL_SPI_FRAME_FORMAT_STANDARD, 3, { FLASH_RDSR2_CMD, 0x1, 0x2 } }, 177 /* Write enable. */ 178 { FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_STANDARD, 1, { FLASH_WREN_CMD } }, 179 /* Write status register-2 to 0x2, set QE bit. */ 180 { FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_STANDARD, 3, { 0x01, 0x00, 0x02 } }, 181 /* Wait until the configuration is complete. */ 182 { FLASH_CMD_TYPE_PROCESSING, HAL_SPI_FRAME_FORMAT_STANDARD, 3, { FLASH_RDSR1_CMD, 0, 0 } }, 183 /* Check QE bit. */ 184 { FLASH_CMD_TYPE_PROCESSING, HAL_SPI_FRAME_FORMAT_STANDARD, 3, { FLASH_RDSR2_CMD, 0x1, 0x2 } }, 185 /* The END command, will not be executed and need return. */ 186 { FLASH_CMD_TYPE_END, HAL_SPI_FRAME_FORMAT_MAX_NUM, 0, { 0 } } 187 }; 188 189 static flash_cmd_exe_t g_winbond_en25sx128a_set_qe_cmd[] = { 190 /* Check QE bit. */ 191 { FLASH_CMD_TYPE_CHECK, HAL_SPI_FRAME_FORMAT_STANDARD, 3, { FLASH_RDSR2_CMD, 0x1, 0x2 } }, 192 /* Write enable. */ 193 { FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_STANDARD, 1, { FLASH_WREN_CMD } }, 194 /* Write status register-2 to 0x2, set QE bit. */ 195 { FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_STANDARD, 2, { 0x31, 0x02 } }, 196 /* Wait until the configuration is complete. */ 197 { FLASH_CMD_TYPE_PROCESSING, HAL_SPI_FRAME_FORMAT_STANDARD, 3, { FLASH_RDSR1_CMD, 0, 0 } }, 198 /* Check QE bit. */ 199 { FLASH_CMD_TYPE_PROCESSING, HAL_SPI_FRAME_FORMAT_STANDARD, 3, { FLASH_RDSR2_CMD, 0x1, 0x2 } }, 200 /* The END command, will not be executed and need return. */ 201 { FLASH_CMD_TYPE_END, HAL_SPI_FRAME_FORMAT_MAX_NUM, 0, { 0 } } 202 }; 203 204 static flash_cmd_exe_t g_xtx_xt25q128d_set_qe_cmd[] = { 205 /* Check QE bit. */ 206 { FLASH_CMD_TYPE_CHECK, HAL_SPI_FRAME_FORMAT_STANDARD, 3, { FLASH_RDSR2_CMD, 0x1, 0x2 } }, 207 /* Write enable. */ 208 { FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_STANDARD, 1, { FLASH_WREN_CMD } }, 209 /* Write status register-2 to 0x2, set QE bit. */ 210 { FLASH_CMD_TYPE_CMD, HAL_SPI_FRAME_FORMAT_STANDARD, 2, { 0x31, 0x02 } }, 211 /* Wait until the configuration is complete. */ 212 { FLASH_CMD_TYPE_PROCESSING, HAL_SPI_FRAME_FORMAT_STANDARD, 3, { FLASH_RDSR1_CMD, 0, 0 } }, 213 /* Check QE bit. */ 214 { FLASH_CMD_TYPE_PROCESSING, HAL_SPI_FRAME_FORMAT_STANDARD, 3, { FLASH_RDSR2_CMD, 0x1, 0x2 } }, 215 /* The END command, will not be executed and need return. */ 216 { FLASH_CMD_TYPE_END, HAL_SPI_FRAME_FORMAT_MAX_NUM, 0, { 0 } } 217 }; 218 219 static const flash_qe_config_t g_flash_need_set_qe[] = { 220 {FLASH_MANUFACTURER_WINBOND_W25Q32, g_winbond_w25qxx_set_qe_cmd}, 221 {FLASH_MANUFACTURER_WINBOND_W25Q64, g_winbond_w25qxx_set_qe_cmd}, 222 {FLASH_MANUFACTURER_WINBOND_W25Q128, g_winbond_w25qxx_set_qe_cmd}, 223 {FLASH_MANUFACTURER_WINBOND_W25Q128JW, g_winbond_w25qxx_set_qe_cmd}, 224 {FLASH_MANUFACTURER_DOSILICON_FM25M64, g_dosilicon_fm25m64_set_qe_cmd}, 225 {FLASH_MANUFACTURER_DOSILICON_FM25M4AA, g_dosilicon_fm25m64_set_qe_cmd}, 226 {FLASH_MANUFACTURER_DOSILICON_DS25M4AB, g_winbond_w25qxx_set_qe_cmd}, 227 {FLASH_MANUFACTURER_ELITE_EN25SX128A, g_winbond_en25sx128a_set_qe_cmd}, 228 {FLASH_MANUFACTURER_XTX_XT25Q128D, g_xtx_xt25q128d_set_qe_cmd}, 229 }; 230 231 #define FLASH_WIP (bit(0)) 232 #define FLASH_WEL (bit(1)) 233 #define FLASH_MXIC_SUSPEND (bit(2) | bit(3)) 234 #define FLASH_MICRON_SUSPEND (bit(7)) 235 #define FLASH_WINBOND_SUSPEND (bit(7)) 236 #define FLASH_GIGADEVICE_SUSPEND (bit(0)) 237 #define FLASH_DOSILICON_SUSPEND (bit(7)) 238 239 /** 240 * @} 241 */ 242 #endif