1 /* 2 * 3 * Copyright (c) Fuzhou Rockchip Electronics Co.Ltd 4 * Authors: 5 * Mark Yao <yzq@rock-chips.com> 6 * 7 * base on exynos_drm.h 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 */ 14 15 #ifndef _UAPI_ROCKCHIP_DRM_H 16 #define _UAPI_ROCKCHIP_DRM_H 17 18 #include <drm/drm.h> 19 #include <drm/drm_file.h> 20 21 /* 22 * Send vcnt event instead of blocking, 23 * like _DRM_VBLANK_EVENT 24 */ 25 #define _DRM_ROCKCHIP_VCNT_EVENT 0x80000000 26 #define DRM_EVENT_ROCKCHIP_CRTC_VCNT 0xf 27 28 /* memory type definitions. */ 29 enum drm_rockchip_gem_mem_type { 30 /* Physically Continuous memory. */ 31 ROCKCHIP_BO_CONTIG = 1 << 0, 32 /* cachable mapping. */ 33 ROCKCHIP_BO_CACHABLE = 1 << 1, 34 /* write-combine mapping. */ 35 ROCKCHIP_BO_WC = 1 << 2, 36 ROCKCHIP_BO_SECURE = 1 << 3, 37 /* keep kmap for cma buffer or alloc kmap for other type memory */ 38 ROCKCHIP_BO_ALLOC_KMAP = 1 << 4, 39 ROCKCHIP_BO_MASK = 40 ROCKCHIP_BO_CONTIG | ROCKCHIP_BO_CACHABLE | ROCKCHIP_BO_WC | ROCKCHIP_BO_SECURE | ROCKCHIP_BO_ALLOC_KMAP, 41 }; 42 43 /** 44 * User-desired buffer creation information structure. 45 * 46 * @size: user-desired memory allocation size. 47 * @flags: user request for setting memory type or cache attributes. 48 * @handle: returned a handle to created gem object. 49 * - this handle will be set by gem module of kernel side. 50 */ 51 struct drm_rockchip_gem_create { 52 uint64_t size; 53 uint32_t flags; 54 uint32_t handle; 55 }; 56 57 struct drm_rockchip_gem_phys { 58 uint32_t handle; 59 uint32_t phy_addr; 60 }; 61 62 /** 63 * A structure for getting buffer offset. 64 * 65 * @handle: a pointer to gem object created. 66 * @pad: just padding to be 64-bit aligned. 67 * @offset: relatived offset value of the memory region allocated. 68 * - this value should be set by user. 69 */ 70 struct drm_rockchip_gem_map_off { 71 uint32_t handle; 72 uint32_t pad; 73 uint64_t offset; 74 }; 75 76 /* acquire type definitions. */ 77 enum drm_rockchip_gem_cpu_acquire_type { 78 DRM_ROCKCHIP_GEM_CPU_ACQUIRE_SHARED = 0x0, 79 DRM_ROCKCHIP_GEM_CPU_ACQUIRE_EXCLUSIVE = 0x1, 80 }; 81 82 enum rockchip_crtc_feture { 83 ROCKCHIP_DRM_CRTC_FEATURE_ALPHA_SCALE, 84 ROCKCHIP_DRM_CRTC_FEATURE_HDR10, 85 ROCKCHIP_DRM_CRTC_FEATURE_NEXT_HDR, 86 }; 87 88 enum rockchip_plane_feture { 89 ROCKCHIP_DRM_PLANE_FEATURE_SCALE, 90 ROCKCHIP_DRM_PLANE_FEATURE_ALPHA, 91 ROCKCHIP_DRM_PLANE_FEATURE_HDR2SDR, 92 ROCKCHIP_DRM_PLANE_FEATURE_SDR2HDR, 93 ROCKCHIP_DRM_PLANE_FEATURE_AFBDC, 94 ROCKCHIP_DRM_PLANE_FEATURE_PDAF_POS, 95 ROCKCHIP_DRM_PLANE_FEATURE_MAX, 96 }; 97 98 enum rockchip_cabc_mode { 99 ROCKCHIP_DRM_CABC_MODE_DISABLE, 100 ROCKCHIP_DRM_CABC_MODE_NORMAL, 101 ROCKCHIP_DRM_CABC_MODE_LOWPOWER, 102 ROCKCHIP_DRM_CABC_MODE_USERSPACE, 103 }; 104 105 struct drm_rockchip_vcnt_event { 106 struct drm_pending_event base; 107 }; 108 109 #define DRM_ROCKCHIP_GEM_CREATE 0x00 110 #define DRM_ROCKCHIP_GEM_MAP_OFFSET 0x01 111 #define DRM_ROCKCHIP_GEM_CPU_ACQUIRE 0x02 112 #define DRM_ROCKCHIP_GEM_CPU_RELEASE 0x03 113 #define DRM_ROCKCHIP_GEM_GET_PHYS 0x04 114 #define DRM_ROCKCHIP_GET_VCNT_EVENT 0x05 115 116 #define DRM_IOCTL_ROCKCHIP_GEM_CREATE \ 117 DRM_IOWR(DRM_COMMAND_BASE + DRM_ROCKCHIP_GEM_CREATE, struct drm_rockchip_gem_create) 118 119 #define DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET \ 120 DRM_IOWR(DRM_COMMAND_BASE + DRM_ROCKCHIP_GEM_MAP_OFFSET, struct drm_rockchip_gem_map_off) 121 122 #define DRM_IOCTL_ROCKCHIP_GEM_CPU_ACQUIRE \ 123 DRM_IOWR(DRM_COMMAND_BASE + DRM_ROCKCHIP_GEM_CPU_ACQUIRE, struct drm_rockchip_gem_cpu_acquire) 124 125 #define DRM_IOCTL_ROCKCHIP_GEM_CPU_RELEASE \ 126 DRM_IOWR(DRM_COMMAND_BASE + DRM_ROCKCHIP_GEM_CPU_RELEASE, struct drm_rockchip_gem_cpu_release) 127 128 #define DRM_IOCTL_ROCKCHIP_GEM_GET_PHYS \ 129 DRM_IOWR(DRM_COMMAND_BASE + DRM_ROCKCHIP_GEM_GET_PHYS, struct drm_rockchip_gem_phys) 130 131 #define DRM_IOCTL_ROCKCHIP_GET_VCNT_EVENT \ 132 DRM_IOWR(DRM_COMMAND_BASE + DRM_ROCKCHIP_GET_VCNT_EVENT, union drm_wait_vblank) 133 134 #endif /* _UAPI_ROCKCHIP_DRM_H */ 135