1 /*
2 * Copyright (c) 2024 Huawei Device Co., Ltd.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16 #include "gpu_program_util.h"
17
18 #include <algorithm>
19 #include <cstdint>
20
21 #include <render/device/pipeline_layout_desc.h>
22 #include <render/namespace.h>
23
24 #include "util/log.h"
25
26 using namespace BASE_NS;
27
28 RENDER_BEGIN_NAMESPACE()
29 namespace GpuProgramUtil {
AddBindings(const DescriptorSetLayout & inDescriptorSetLayout,DescriptorSetLayout & outDescriptorSetLayout)30 bool AddBindings(const DescriptorSetLayout& inDescriptorSetLayout, DescriptorSetLayout& outDescriptorSetLayout)
31 {
32 const auto& inBindings = inDescriptorSetLayout.bindings;
33 auto& outBindings = outDescriptorSetLayout.bindings;
34 if (outBindings.size() < inBindings.size()) {
35 outBindings.reserve(inBindings.size());
36 }
37 bool validCombination = true;
38 for (const auto& inBinding : inDescriptorSetLayout.bindings) {
39 bool bindingAlreadyFound = false;
40 const uint32_t currBindingIndex = inBinding.binding;
41 for (auto& outRef : outBindings) {
42 if (currBindingIndex == outRef.binding) {
43 bindingAlreadyFound = true;
44 outRef.shaderStageFlags |= inBinding.shaderStageFlags;
45 if ((inBinding.descriptorType != outRef.descriptorType) ||
46 (inBinding.descriptorCount != outRef.descriptorCount)) {
47 validCombination = false;
48 PLUGIN_LOG_E(
49 "Invalid descriptor set combination with binding %u. Descriptor type %u = %u. Descriptor count "
50 "%u = %u",
51 currBindingIndex, inBinding.descriptorType, outRef.descriptorType, inBinding.descriptorCount,
52 outRef.descriptorCount);
53 // more error log printed in higher level with more info
54 }
55 }
56 }
57 if (!bindingAlreadyFound) {
58 outBindings.push_back(inBinding);
59 }
60 }
61 return validCombination;
62 }
63
CombinePipelineLayouts(const array_view<const PipelineLayout> inPl,PipelineLayout & outPl)64 void CombinePipelineLayouts(const array_view<const PipelineLayout> inPl, PipelineLayout& outPl)
65 {
66 auto& descriptorSetLayouts = outPl.descriptorSetLayouts;
67 for (const auto& plRef : inPl) {
68 for (uint32_t idx = 0; idx < PipelineLayoutConstants::MAX_DESCRIPTOR_SET_COUNT; ++idx) {
69 if (plRef.descriptorSetLayouts[idx].set != PipelineLayoutConstants::INVALID_INDEX) {
70 descriptorSetLayouts[idx].set = plRef.descriptorSetLayouts[idx].set;
71 const bool validComb =
72 GpuProgramUtil::AddBindings(plRef.descriptorSetLayouts[idx], descriptorSetLayouts[idx]);
73 if (!validComb) {
74 PLUGIN_LOG_E(
75 "Invalid shader module descriptor set combination for shader program. Descriptor set %u.", idx);
76 }
77 }
78 }
79 outPl.pushConstant.shaderStageFlags |= plRef.pushConstant.shaderStageFlags;
80 outPl.pushConstant.byteSize = Math::max(outPl.pushConstant.byteSize, plRef.pushConstant.byteSize);
81 }
82
83 uint32_t descriptorSetCount = 0;
84 for (const DescriptorSetLayout& currLayout : outPl.descriptorSetLayouts) {
85 if (currLayout.set != PipelineLayoutConstants::INVALID_INDEX) {
86 descriptorSetCount++;
87 }
88 }
89 outPl.descriptorSetCount = descriptorSetCount;
90
91 // sort bindings inside sets
92 for (DescriptorSetLayout& currSet : outPl.descriptorSetLayouts) {
93 if (currSet.set != PipelineLayoutConstants::INVALID_INDEX) {
94 std::sort(currSet.bindings.begin(), currSet.bindings.end(),
95 [](auto const& lhs, auto const& rhs) { return (lhs.binding < rhs.binding); });
96 }
97 }
98 }
99
SpecializationByteSize(ShaderSpecialization::Constant::Type type)100 uint32_t SpecializationByteSize(ShaderSpecialization::Constant::Type type)
101 {
102 switch (type) {
103 case RENDER_NS::ShaderSpecialization::Constant::Type::BOOL:
104 [[fallthrough]];
105 case RENDER_NS::ShaderSpecialization::Constant::Type::UINT32:
106 [[fallthrough]];
107 case RENDER_NS::ShaderSpecialization::Constant::Type::INT32:
108 [[fallthrough]];
109 case RENDER_NS::ShaderSpecialization::Constant::Type::FLOAT:
110 return 4;
111 default:
112 break;
113 }
114 return 4;
115 }
116
AddSpecializationConstants(const array_view<const ShaderSpecialization::Constant> inSpecializationConstants,vector<ShaderSpecialization::Constant> & outSpecializationConstants)117 void AddSpecializationConstants(const array_view<const ShaderSpecialization::Constant> inSpecializationConstants,
118 vector<ShaderSpecialization::Constant>& outSpecializationConstants)
119 {
120 uint32_t offset = 0;
121 if (!outSpecializationConstants.empty()) {
122 offset =
123 outSpecializationConstants.back().offset + SpecializationByteSize(outSpecializationConstants.back().type);
124 }
125 for (auto const& constant : inSpecializationConstants) {
126 outSpecializationConstants.push_back(
127 ShaderSpecialization::Constant { constant.shaderStage, constant.id, constant.type, offset });
128 offset += SpecializationByteSize(constant.type);
129 }
130 }
131
CombineSpecializationConstants(const BASE_NS::array_view<const ShaderSpecialization::Constant> inSc,BASE_NS::vector<ShaderSpecialization::Constant> & outSc)132 void CombineSpecializationConstants(const BASE_NS::array_view<const ShaderSpecialization::Constant> inSc,
133 BASE_NS::vector<ShaderSpecialization::Constant>& outSc)
134 {
135 if (!inSc.empty()) {
136 GpuProgramUtil::AddSpecializationConstants(inSc, outSc);
137 }
138 // sorted based on offset due to offset mapping with shader combinations
139 // NOTE: id and name indexing
140 std::sort(outSc.begin(), outSc.end(), [](const auto& lhs, const auto& rhs) { return (lhs.offset < rhs.offset); });
141 }
142
FormatByteSize(Format format)143 uint32_t FormatByteSize(Format format)
144 {
145 switch (format) {
146 case BASE_FORMAT_UNDEFINED:
147 return 0;
148
149 case BASE_FORMAT_R4G4_UNORM_PACK8:
150 return 1;
151
152 case BASE_FORMAT_R4G4B4A4_UNORM_PACK16:
153 case BASE_FORMAT_B4G4R4A4_UNORM_PACK16:
154 case BASE_FORMAT_R5G6B5_UNORM_PACK16:
155 case BASE_FORMAT_B5G6R5_UNORM_PACK16:
156 case BASE_FORMAT_R5G5B5A1_UNORM_PACK16:
157 case BASE_FORMAT_B5G5R5A1_UNORM_PACK16:
158 case BASE_FORMAT_A1R5G5B5_UNORM_PACK16:
159 return 2;
160
161 case BASE_FORMAT_R8_UNORM:
162 case BASE_FORMAT_R8_SNORM:
163 case BASE_FORMAT_R8_USCALED:
164 case BASE_FORMAT_R8_SSCALED:
165 case BASE_FORMAT_R8_UINT:
166 case BASE_FORMAT_R8_SINT:
167 case BASE_FORMAT_R8_SRGB:
168 return 1;
169
170 case BASE_FORMAT_R8G8_UNORM:
171 case BASE_FORMAT_R8G8_SNORM:
172 case BASE_FORMAT_R8G8_USCALED:
173 case BASE_FORMAT_R8G8_SSCALED:
174 case BASE_FORMAT_R8G8_UINT:
175 case BASE_FORMAT_R8G8_SINT:
176 case BASE_FORMAT_R8G8_SRGB:
177 return 2;
178
179 case BASE_FORMAT_R8G8B8_UNORM:
180 case BASE_FORMAT_R8G8B8_SNORM:
181 case BASE_FORMAT_R8G8B8_USCALED:
182 case BASE_FORMAT_R8G8B8_SSCALED:
183 case BASE_FORMAT_R8G8B8_UINT:
184 case BASE_FORMAT_R8G8B8_SINT:
185 case BASE_FORMAT_R8G8B8_SRGB:
186 case BASE_FORMAT_B8G8R8_UNORM:
187 case BASE_FORMAT_B8G8R8_SNORM:
188 case BASE_FORMAT_B8G8R8_UINT:
189 case BASE_FORMAT_B8G8R8_SINT:
190 case BASE_FORMAT_B8G8R8_SRGB:
191 return 3;
192
193 case BASE_FORMAT_R8G8B8A8_UNORM:
194 case BASE_FORMAT_R8G8B8A8_SNORM:
195 case BASE_FORMAT_R8G8B8A8_USCALED:
196 case BASE_FORMAT_R8G8B8A8_SSCALED:
197 case BASE_FORMAT_R8G8B8A8_UINT:
198 case BASE_FORMAT_R8G8B8A8_SINT:
199 case BASE_FORMAT_R8G8B8A8_SRGB:
200 case BASE_FORMAT_B8G8R8A8_UNORM:
201 case BASE_FORMAT_B8G8R8A8_SNORM:
202 case BASE_FORMAT_B8G8R8A8_UINT:
203 case BASE_FORMAT_B8G8R8A8_SINT:
204 case BASE_FORMAT_B8G8R8A8_SRGB:
205 case BASE_FORMAT_A8B8G8R8_UNORM_PACK32:
206 case BASE_FORMAT_A8B8G8R8_SNORM_PACK32:
207 case BASE_FORMAT_A8B8G8R8_USCALED_PACK32:
208 case BASE_FORMAT_A8B8G8R8_SSCALED_PACK32:
209 case BASE_FORMAT_A8B8G8R8_UINT_PACK32:
210 case BASE_FORMAT_A8B8G8R8_SINT_PACK32:
211 case BASE_FORMAT_A8B8G8R8_SRGB_PACK32:
212 case BASE_FORMAT_A2R10G10B10_UNORM_PACK32:
213 case BASE_FORMAT_A2R10G10B10_UINT_PACK32:
214 case BASE_FORMAT_A2R10G10B10_SINT_PACK32:
215 case BASE_FORMAT_A2B10G10R10_UNORM_PACK32:
216 case BASE_FORMAT_A2B10G10R10_SNORM_PACK32:
217 case BASE_FORMAT_A2B10G10R10_USCALED_PACK32:
218 case BASE_FORMAT_A2B10G10R10_SSCALED_PACK32:
219 case BASE_FORMAT_A2B10G10R10_UINT_PACK32:
220 case BASE_FORMAT_A2B10G10R10_SINT_PACK32:
221 return 4;
222
223 case BASE_FORMAT_R16_UNORM:
224 case BASE_FORMAT_R16_SNORM:
225 case BASE_FORMAT_R16_USCALED:
226 case BASE_FORMAT_R16_SSCALED:
227 case BASE_FORMAT_R16_UINT:
228 case BASE_FORMAT_R16_SINT:
229 case BASE_FORMAT_R16_SFLOAT:
230 return 2;
231
232 case BASE_FORMAT_R16G16_UNORM:
233 case BASE_FORMAT_R16G16_SNORM:
234 case BASE_FORMAT_R16G16_USCALED:
235 case BASE_FORMAT_R16G16_SSCALED:
236 case BASE_FORMAT_R16G16_UINT:
237 case BASE_FORMAT_R16G16_SINT:
238 case BASE_FORMAT_R16G16_SFLOAT:
239 return 4;
240
241 case BASE_FORMAT_R16G16B16_UNORM:
242 case BASE_FORMAT_R16G16B16_SNORM:
243 case BASE_FORMAT_R16G16B16_USCALED:
244 case BASE_FORMAT_R16G16B16_SSCALED:
245 case BASE_FORMAT_R16G16B16_UINT:
246 case BASE_FORMAT_R16G16B16_SINT:
247 case BASE_FORMAT_R16G16B16_SFLOAT:
248 return 6;
249
250 case BASE_FORMAT_R16G16B16A16_UNORM:
251 case BASE_FORMAT_R16G16B16A16_SNORM:
252 case BASE_FORMAT_R16G16B16A16_USCALED:
253 case BASE_FORMAT_R16G16B16A16_SSCALED:
254 case BASE_FORMAT_R16G16B16A16_UINT:
255 case BASE_FORMAT_R16G16B16A16_SINT:
256 case BASE_FORMAT_R16G16B16A16_SFLOAT:
257 return 8;
258
259 case BASE_FORMAT_R32_UINT:
260 case BASE_FORMAT_R32_SINT:
261 case BASE_FORMAT_R32_SFLOAT:
262 return 4;
263
264 case BASE_FORMAT_R32G32_UINT:
265 case BASE_FORMAT_R32G32_SINT:
266 case BASE_FORMAT_R32G32_SFLOAT:
267 return 8;
268
269 case BASE_FORMAT_R32G32B32_UINT:
270 case BASE_FORMAT_R32G32B32_SINT:
271 case BASE_FORMAT_R32G32B32_SFLOAT:
272 return 24;
273
274 case BASE_FORMAT_R32G32B32A32_UINT:
275 case BASE_FORMAT_R32G32B32A32_SINT:
276 case BASE_FORMAT_R32G32B32A32_SFLOAT:
277 case BASE_FORMAT_B10G11R11_UFLOAT_PACK32:
278 case BASE_FORMAT_E5B9G9R9_UFLOAT_PACK32:
279 return 32;
280
281 case BASE_FORMAT_D16_UNORM:
282 return 2;
283
284 case BASE_FORMAT_X8_D24_UNORM_PACK32:
285 case BASE_FORMAT_D32_SFLOAT:
286 return 4;
287
288 case BASE_FORMAT_S8_UINT:
289 return 1;
290
291 case BASE_FORMAT_D24_UNORM_S8_UINT:
292 return 4;
293
294 default:
295 return 0;
296 }
297 }
298 } // namespace GpuProgramUtil
299 RENDER_END_NAMESPACE()
300