1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2019 SiFive
4 */
5
6 #ifndef _ASM_RISCV_SET_MEMORY_H
7 #define _ASM_RISCV_SET_MEMORY_H
8
9 #ifndef __ASSEMBLY__
10 /*
11 * Functions to change memory attributes.
12 */
13 #ifdef CONFIG_MMU
14 int set_memory_ro(unsigned long addr, int numpages);
15 int set_memory_rw(unsigned long addr, int numpages);
16 int set_memory_x(unsigned long addr, int numpages);
17 int set_memory_nx(unsigned long addr, int numpages);
18 int set_memory_rw_nx(unsigned long addr, int numpages);
19 void protect_kernel_text_data(void);
20 void protect_kernel_linear_mapping_text_rodata(void);
21 #else
set_memory_ro(unsigned long addr,int numpages)22 static inline int set_memory_ro(unsigned long addr, int numpages) { return 0; }
set_memory_rw(unsigned long addr,int numpages)23 static inline int set_memory_rw(unsigned long addr, int numpages) { return 0; }
set_memory_x(unsigned long addr,int numpages)24 static inline int set_memory_x(unsigned long addr, int numpages) { return 0; }
set_memory_nx(unsigned long addr,int numpages)25 static inline int set_memory_nx(unsigned long addr, int numpages) { return 0; }
protect_kernel_text_data(void)26 static inline void protect_kernel_text_data(void) {};
set_memory_rw_nx(unsigned long addr,int numpages)27 static inline int set_memory_rw_nx(unsigned long addr, int numpages) { return 0; }
28 #endif
29
30 int set_direct_map_invalid_noflush(struct page *page);
31 int set_direct_map_default_noflush(struct page *page);
32
33 #endif /* __ASSEMBLY__ */
34
35 #ifdef CONFIG_ARCH_HAS_STRICT_KERNEL_RWX
36 #ifdef CONFIG_64BIT
37 #define SECTION_ALIGN (1 << 21)
38 #else
39 #define SECTION_ALIGN (1 << 22)
40 #endif
41 #else /* !CONFIG_ARCH_HAS_STRICT_KERNEL_RWX */
42 #define SECTION_ALIGN L1_CACHE_BYTES
43 #endif /* CONFIG_ARCH_HAS_STRICT_KERNEL_RWX */
44
45 #endif /* _ASM_RISCV_SET_MEMORY_H */
46