1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Bluetooth Software UART Qualcomm protocol
4 *
5 * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management
6 * protocol extension to H4.
7 *
8 * Copyright (C) 2007 Texas Instruments, Inc.
9 * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved.
10 *
11 * Acknowledgements:
12 * This file is based on hci_ll.c, which was...
13 * Written by Ohad Ben-Cohen <ohad@bencohen.org>
14 * which was in turn based on hci_h4.c, which was written
15 * by Maxim Krasnyansky and Marcel Holtmann.
16 */
17
18 #include <linux/kernel.h>
19 #include <linux/clk.h>
20 #include <linux/completion.h>
21 #include <linux/debugfs.h>
22 #include <linux/delay.h>
23 #include <linux/devcoredump.h>
24 #include <linux/device.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/mod_devicetable.h>
27 #include <linux/module.h>
28 #include <linux/of_device.h>
29 #include <linux/acpi.h>
30 #include <linux/platform_device.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/serdev.h>
33 #include <linux/mutex.h>
34 #include <asm/unaligned.h>
35
36 #include <net/bluetooth/bluetooth.h>
37 #include <net/bluetooth/hci_core.h>
38
39 #include "hci_uart.h"
40 #include "btqca.h"
41
42 /* HCI_IBS protocol messages */
43 #define HCI_IBS_SLEEP_IND 0xFE
44 #define HCI_IBS_WAKE_IND 0xFD
45 #define HCI_IBS_WAKE_ACK 0xFC
46 #define HCI_MAX_IBS_SIZE 10
47
48 #define IBS_WAKE_RETRANS_TIMEOUT_MS 100
49 #define IBS_BTSOC_TX_IDLE_TIMEOUT_MS 200
50 #define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000
51 #define CMD_TRANS_TIMEOUT_MS 100
52 #define MEMDUMP_TIMEOUT_MS 8000
53 #define IBS_DISABLE_SSR_TIMEOUT_MS \
54 (MEMDUMP_TIMEOUT_MS + FW_DOWNLOAD_TIMEOUT_MS)
55 #define FW_DOWNLOAD_TIMEOUT_MS 3000
56
57 /* susclk rate */
58 #define SUSCLK_RATE_32KHZ 32768
59
60 /* Controller debug log header */
61 #define QCA_DEBUG_HANDLE 0x2EDC
62
63 /* max retry count when init fails */
64 #define MAX_INIT_RETRIES 3
65
66 /* Controller dump header */
67 #define QCA_SSR_DUMP_HANDLE 0x0108
68 #define QCA_DUMP_PACKET_SIZE 255
69 #define QCA_LAST_SEQUENCE_NUM 0xFFFF
70 #define QCA_CRASHBYTE_PACKET_LEN 1096
71 #define QCA_MEMDUMP_BYTE 0xFB
72
73 enum qca_flags {
74 QCA_IBS_DISABLED,
75 QCA_DROP_VENDOR_EVENT,
76 QCA_SUSPENDING,
77 QCA_MEMDUMP_COLLECTION,
78 QCA_HW_ERROR_EVENT,
79 QCA_SSR_TRIGGERED,
80 QCA_BT_OFF,
81 QCA_ROM_FW,
82 QCA_DEBUGFS_CREATED,
83 };
84
85 enum qca_capabilities {
86 QCA_CAP_WIDEBAND_SPEECH = BIT(0),
87 QCA_CAP_VALID_LE_STATES = BIT(1),
88 };
89
90 /* HCI_IBS transmit side sleep protocol states */
91 enum tx_ibs_states {
92 HCI_IBS_TX_ASLEEP,
93 HCI_IBS_TX_WAKING,
94 HCI_IBS_TX_AWAKE,
95 };
96
97 /* HCI_IBS receive side sleep protocol states */
98 enum rx_states {
99 HCI_IBS_RX_ASLEEP,
100 HCI_IBS_RX_AWAKE,
101 };
102
103 /* HCI_IBS transmit and receive side clock state vote */
104 enum hci_ibs_clock_state_vote {
105 HCI_IBS_VOTE_STATS_UPDATE,
106 HCI_IBS_TX_VOTE_CLOCK_ON,
107 HCI_IBS_TX_VOTE_CLOCK_OFF,
108 HCI_IBS_RX_VOTE_CLOCK_ON,
109 HCI_IBS_RX_VOTE_CLOCK_OFF,
110 };
111
112 /* Controller memory dump states */
113 enum qca_memdump_states {
114 QCA_MEMDUMP_IDLE,
115 QCA_MEMDUMP_COLLECTING,
116 QCA_MEMDUMP_COLLECTED,
117 QCA_MEMDUMP_TIMEOUT,
118 };
119
120 struct qca_memdump_data {
121 char *memdump_buf_head;
122 char *memdump_buf_tail;
123 u32 current_seq_no;
124 u32 received_dump;
125 u32 ram_dump_size;
126 };
127
128 struct qca_memdump_event_hdr {
129 __u8 evt;
130 __u8 plen;
131 __u16 opcode;
132 __u16 seq_no;
133 __u8 reserved;
134 } __packed;
135
136
137 struct qca_dump_size {
138 u32 dump_size;
139 } __packed;
140
141 struct qca_data {
142 struct hci_uart *hu;
143 struct sk_buff *rx_skb;
144 struct sk_buff_head txq;
145 struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */
146 struct sk_buff_head rx_memdump_q; /* Memdump wait queue */
147 spinlock_t hci_ibs_lock; /* HCI_IBS state lock */
148 u8 tx_ibs_state; /* HCI_IBS transmit side power state*/
149 u8 rx_ibs_state; /* HCI_IBS receive side power state */
150 bool tx_vote; /* Clock must be on for TX */
151 bool rx_vote; /* Clock must be on for RX */
152 struct timer_list tx_idle_timer;
153 u32 tx_idle_delay;
154 struct timer_list wake_retrans_timer;
155 u32 wake_retrans;
156 struct workqueue_struct *workqueue;
157 struct work_struct ws_awake_rx;
158 struct work_struct ws_awake_device;
159 struct work_struct ws_rx_vote_off;
160 struct work_struct ws_tx_vote_off;
161 struct work_struct ctrl_memdump_evt;
162 struct delayed_work ctrl_memdump_timeout;
163 struct qca_memdump_data *qca_memdump;
164 unsigned long flags;
165 struct completion drop_ev_comp;
166 wait_queue_head_t suspend_wait_q;
167 enum qca_memdump_states memdump_state;
168 struct mutex hci_memdump_lock;
169
170 /* For debugging purpose */
171 u64 ibs_sent_wacks;
172 u64 ibs_sent_slps;
173 u64 ibs_sent_wakes;
174 u64 ibs_recv_wacks;
175 u64 ibs_recv_slps;
176 u64 ibs_recv_wakes;
177 u64 vote_last_jif;
178 u32 vote_on_ms;
179 u32 vote_off_ms;
180 u64 tx_votes_on;
181 u64 rx_votes_on;
182 u64 tx_votes_off;
183 u64 rx_votes_off;
184 u64 votes_on;
185 u64 votes_off;
186 };
187
188 enum qca_speed_type {
189 QCA_INIT_SPEED = 1,
190 QCA_OPER_SPEED
191 };
192
193 /*
194 * Voltage regulator information required for configuring the
195 * QCA Bluetooth chipset
196 */
197 struct qca_vreg {
198 const char *name;
199 unsigned int load_uA;
200 };
201
202 struct qca_device_data {
203 enum qca_btsoc_type soc_type;
204 struct qca_vreg *vregs;
205 size_t num_vregs;
206 uint32_t capabilities;
207 };
208
209 /*
210 * Platform data for the QCA Bluetooth power driver.
211 */
212 struct qca_power {
213 struct device *dev;
214 struct regulator_bulk_data *vreg_bulk;
215 int num_vregs;
216 bool vregs_on;
217 };
218
219 struct qca_serdev {
220 struct hci_uart serdev_hu;
221 struct gpio_desc *bt_en;
222 struct clk *susclk;
223 enum qca_btsoc_type btsoc_type;
224 struct qca_power *bt_power;
225 u32 init_speed;
226 u32 oper_speed;
227 const char *firmware_name;
228 };
229
230 static int qca_regulator_enable(struct qca_serdev *qcadev);
231 static void qca_regulator_disable(struct qca_serdev *qcadev);
232 static void qca_power_shutdown(struct hci_uart *hu);
233 static int qca_power_off(struct hci_dev *hdev);
234 static void qca_controller_memdump(struct work_struct *work);
235
qca_soc_type(struct hci_uart * hu)236 static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu)
237 {
238 enum qca_btsoc_type soc_type;
239
240 if (hu->serdev) {
241 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
242
243 soc_type = qsd->btsoc_type;
244 } else {
245 soc_type = QCA_ROME;
246 }
247
248 return soc_type;
249 }
250
qca_get_firmware_name(struct hci_uart * hu)251 static const char *qca_get_firmware_name(struct hci_uart *hu)
252 {
253 if (hu->serdev) {
254 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
255
256 return qsd->firmware_name;
257 } else {
258 return NULL;
259 }
260 }
261
__serial_clock_on(struct tty_struct * tty)262 static void __serial_clock_on(struct tty_struct *tty)
263 {
264 /* TODO: Some chipset requires to enable UART clock on client
265 * side to save power consumption or manual work is required.
266 * Please put your code to control UART clock here if needed
267 */
268 }
269
__serial_clock_off(struct tty_struct * tty)270 static void __serial_clock_off(struct tty_struct *tty)
271 {
272 /* TODO: Some chipset requires to disable UART clock on client
273 * side to save power consumption or manual work is required.
274 * Please put your code to control UART clock off here if needed
275 */
276 }
277
278 /* serial_clock_vote needs to be called with the ibs lock held */
serial_clock_vote(unsigned long vote,struct hci_uart * hu)279 static void serial_clock_vote(unsigned long vote, struct hci_uart *hu)
280 {
281 struct qca_data *qca = hu->priv;
282 unsigned int diff;
283
284 bool old_vote = (qca->tx_vote | qca->rx_vote);
285 bool new_vote;
286
287 switch (vote) {
288 case HCI_IBS_VOTE_STATS_UPDATE:
289 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
290
291 if (old_vote)
292 qca->vote_off_ms += diff;
293 else
294 qca->vote_on_ms += diff;
295 return;
296
297 case HCI_IBS_TX_VOTE_CLOCK_ON:
298 qca->tx_vote = true;
299 qca->tx_votes_on++;
300 break;
301
302 case HCI_IBS_RX_VOTE_CLOCK_ON:
303 qca->rx_vote = true;
304 qca->rx_votes_on++;
305 break;
306
307 case HCI_IBS_TX_VOTE_CLOCK_OFF:
308 qca->tx_vote = false;
309 qca->tx_votes_off++;
310 break;
311
312 case HCI_IBS_RX_VOTE_CLOCK_OFF:
313 qca->rx_vote = false;
314 qca->rx_votes_off++;
315 break;
316
317 default:
318 BT_ERR("Voting irregularity");
319 return;
320 }
321
322 new_vote = qca->rx_vote | qca->tx_vote;
323
324 if (new_vote != old_vote) {
325 if (new_vote)
326 __serial_clock_on(hu->tty);
327 else
328 __serial_clock_off(hu->tty);
329
330 BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false",
331 vote ? "true" : "false");
332
333 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
334
335 if (new_vote) {
336 qca->votes_on++;
337 qca->vote_off_ms += diff;
338 } else {
339 qca->votes_off++;
340 qca->vote_on_ms += diff;
341 }
342 qca->vote_last_jif = jiffies;
343 }
344 }
345
346 /* Builds and sends an HCI_IBS command packet.
347 * These are very simple packets with only 1 cmd byte.
348 */
send_hci_ibs_cmd(u8 cmd,struct hci_uart * hu)349 static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu)
350 {
351 int err = 0;
352 struct sk_buff *skb = NULL;
353 struct qca_data *qca = hu->priv;
354
355 BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd);
356
357 skb = bt_skb_alloc(1, GFP_ATOMIC);
358 if (!skb) {
359 BT_ERR("Failed to allocate memory for HCI_IBS packet");
360 return -ENOMEM;
361 }
362
363 /* Assign HCI_IBS type */
364 skb_put_u8(skb, cmd);
365
366 skb_queue_tail(&qca->txq, skb);
367
368 return err;
369 }
370
qca_wq_awake_device(struct work_struct * work)371 static void qca_wq_awake_device(struct work_struct *work)
372 {
373 struct qca_data *qca = container_of(work, struct qca_data,
374 ws_awake_device);
375 struct hci_uart *hu = qca->hu;
376 unsigned long retrans_delay;
377 unsigned long flags;
378
379 BT_DBG("hu %p wq awake device", hu);
380
381 /* Vote for serial clock */
382 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu);
383
384 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
385
386 /* Send wake indication to device */
387 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0)
388 BT_ERR("Failed to send WAKE to device");
389
390 qca->ibs_sent_wakes++;
391
392 /* Start retransmit timer */
393 retrans_delay = msecs_to_jiffies(qca->wake_retrans);
394 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
395
396 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
397
398 /* Actually send the packets */
399 hci_uart_tx_wakeup(hu);
400 }
401
qca_wq_awake_rx(struct work_struct * work)402 static void qca_wq_awake_rx(struct work_struct *work)
403 {
404 struct qca_data *qca = container_of(work, struct qca_data,
405 ws_awake_rx);
406 struct hci_uart *hu = qca->hu;
407 unsigned long flags;
408
409 BT_DBG("hu %p wq awake rx", hu);
410
411 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu);
412
413 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
414 qca->rx_ibs_state = HCI_IBS_RX_AWAKE;
415
416 /* Always acknowledge device wake up,
417 * sending IBS message doesn't count as TX ON.
418 */
419 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0)
420 BT_ERR("Failed to acknowledge device wake up");
421
422 qca->ibs_sent_wacks++;
423
424 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
425
426 /* Actually send the packets */
427 hci_uart_tx_wakeup(hu);
428 }
429
qca_wq_serial_rx_clock_vote_off(struct work_struct * work)430 static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work)
431 {
432 struct qca_data *qca = container_of(work, struct qca_data,
433 ws_rx_vote_off);
434 struct hci_uart *hu = qca->hu;
435
436 BT_DBG("hu %p rx clock vote off", hu);
437
438 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu);
439 }
440
qca_wq_serial_tx_clock_vote_off(struct work_struct * work)441 static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work)
442 {
443 struct qca_data *qca = container_of(work, struct qca_data,
444 ws_tx_vote_off);
445 struct hci_uart *hu = qca->hu;
446
447 BT_DBG("hu %p tx clock vote off", hu);
448
449 /* Run HCI tx handling unlocked */
450 hci_uart_tx_wakeup(hu);
451
452 /* Now that message queued to tty driver, vote for tty clocks off.
453 * It is up to the tty driver to pend the clocks off until tx done.
454 */
455 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
456 }
457
hci_ibs_tx_idle_timeout(struct timer_list * t)458 static void hci_ibs_tx_idle_timeout(struct timer_list *t)
459 {
460 struct qca_data *qca = from_timer(qca, t, tx_idle_timer);
461 struct hci_uart *hu = qca->hu;
462 unsigned long flags;
463
464 BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state);
465
466 spin_lock_irqsave_nested(&qca->hci_ibs_lock,
467 flags, SINGLE_DEPTH_NESTING);
468
469 switch (qca->tx_ibs_state) {
470 case HCI_IBS_TX_AWAKE:
471 /* TX_IDLE, go to SLEEP */
472 if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) {
473 BT_ERR("Failed to send SLEEP to device");
474 break;
475 }
476 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
477 qca->ibs_sent_slps++;
478 queue_work(qca->workqueue, &qca->ws_tx_vote_off);
479 break;
480
481 case HCI_IBS_TX_ASLEEP:
482 case HCI_IBS_TX_WAKING:
483 default:
484 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
485 break;
486 }
487
488 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
489 }
490
hci_ibs_wake_retrans_timeout(struct timer_list * t)491 static void hci_ibs_wake_retrans_timeout(struct timer_list *t)
492 {
493 struct qca_data *qca = from_timer(qca, t, wake_retrans_timer);
494 struct hci_uart *hu = qca->hu;
495 unsigned long flags, retrans_delay;
496 bool retransmit = false;
497
498 BT_DBG("hu %p wake retransmit timeout in %d state",
499 hu, qca->tx_ibs_state);
500
501 spin_lock_irqsave_nested(&qca->hci_ibs_lock,
502 flags, SINGLE_DEPTH_NESTING);
503
504 /* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */
505 if (test_bit(QCA_SUSPENDING, &qca->flags)) {
506 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
507 return;
508 }
509
510 switch (qca->tx_ibs_state) {
511 case HCI_IBS_TX_WAKING:
512 /* No WAKE_ACK, retransmit WAKE */
513 retransmit = true;
514 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) {
515 BT_ERR("Failed to acknowledge device wake up");
516 break;
517 }
518 qca->ibs_sent_wakes++;
519 retrans_delay = msecs_to_jiffies(qca->wake_retrans);
520 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
521 break;
522
523 case HCI_IBS_TX_ASLEEP:
524 case HCI_IBS_TX_AWAKE:
525 default:
526 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
527 break;
528 }
529
530 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
531
532 if (retransmit)
533 hci_uart_tx_wakeup(hu);
534 }
535
536
qca_controller_memdump_timeout(struct work_struct * work)537 static void qca_controller_memdump_timeout(struct work_struct *work)
538 {
539 struct qca_data *qca = container_of(work, struct qca_data,
540 ctrl_memdump_timeout.work);
541 struct hci_uart *hu = qca->hu;
542
543 mutex_lock(&qca->hci_memdump_lock);
544 if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) {
545 qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
546 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
547 /* Inject hw error event to reset the device
548 * and driver.
549 */
550 hci_reset_dev(hu->hdev);
551 }
552 }
553
554 mutex_unlock(&qca->hci_memdump_lock);
555 }
556
557
558 /* Initialize protocol */
qca_open(struct hci_uart * hu)559 static int qca_open(struct hci_uart *hu)
560 {
561 struct qca_serdev *qcadev;
562 struct qca_data *qca;
563
564 BT_DBG("hu %p qca_open", hu);
565
566 if (!hci_uart_has_flow_control(hu))
567 return -EOPNOTSUPP;
568
569 qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL);
570 if (!qca)
571 return -ENOMEM;
572
573 skb_queue_head_init(&qca->txq);
574 skb_queue_head_init(&qca->tx_wait_q);
575 skb_queue_head_init(&qca->rx_memdump_q);
576 spin_lock_init(&qca->hci_ibs_lock);
577 mutex_init(&qca->hci_memdump_lock);
578 qca->workqueue = alloc_ordered_workqueue("qca_wq", 0);
579 if (!qca->workqueue) {
580 BT_ERR("QCA Workqueue not initialized properly");
581 kfree(qca);
582 return -ENOMEM;
583 }
584
585 INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx);
586 INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device);
587 INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off);
588 INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off);
589 INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump);
590 INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout,
591 qca_controller_memdump_timeout);
592 init_waitqueue_head(&qca->suspend_wait_q);
593
594 qca->hu = hu;
595 init_completion(&qca->drop_ev_comp);
596
597 /* Assume we start with both sides asleep -- extra wakes OK */
598 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
599 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
600
601 qca->vote_last_jif = jiffies;
602
603 hu->priv = qca;
604
605 if (hu->serdev) {
606 qcadev = serdev_device_get_drvdata(hu->serdev);
607
608 if (qca_is_wcn399x(qcadev->btsoc_type))
609 hu->init_speed = qcadev->init_speed;
610
611 if (qcadev->oper_speed)
612 hu->oper_speed = qcadev->oper_speed;
613 }
614
615 timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0);
616 qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS;
617
618 timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
619 qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS;
620
621 BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
622 qca->tx_idle_delay, qca->wake_retrans);
623
624 return 0;
625 }
626
qca_debugfs_init(struct hci_dev * hdev)627 static void qca_debugfs_init(struct hci_dev *hdev)
628 {
629 struct hci_uart *hu = hci_get_drvdata(hdev);
630 struct qca_data *qca = hu->priv;
631 struct dentry *ibs_dir;
632 umode_t mode;
633
634 if (!hdev->debugfs)
635 return;
636
637 if (test_and_set_bit(QCA_DEBUGFS_CREATED, &qca->flags))
638 return;
639
640 ibs_dir = debugfs_create_dir("ibs", hdev->debugfs);
641
642 /* read only */
643 mode = S_IRUGO;
644 debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state);
645 debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state);
646 debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir,
647 &qca->ibs_sent_slps);
648 debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir,
649 &qca->ibs_sent_wakes);
650 debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir,
651 &qca->ibs_sent_wacks);
652 debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir,
653 &qca->ibs_recv_slps);
654 debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir,
655 &qca->ibs_recv_wakes);
656 debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir,
657 &qca->ibs_recv_wacks);
658 debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote);
659 debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on);
660 debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off);
661 debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote);
662 debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on);
663 debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off);
664 debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on);
665 debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off);
666 debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms);
667 debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms);
668
669 /* read/write */
670 mode = S_IRUGO | S_IWUSR;
671 debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans);
672 debugfs_create_u32("tx_idle_delay", mode, ibs_dir,
673 &qca->tx_idle_delay);
674 }
675
676 /* Flush protocol data */
qca_flush(struct hci_uart * hu)677 static int qca_flush(struct hci_uart *hu)
678 {
679 struct qca_data *qca = hu->priv;
680
681 BT_DBG("hu %p qca flush", hu);
682
683 skb_queue_purge(&qca->tx_wait_q);
684 skb_queue_purge(&qca->txq);
685
686 return 0;
687 }
688
689 /* Close protocol */
qca_close(struct hci_uart * hu)690 static int qca_close(struct hci_uart *hu)
691 {
692 struct qca_data *qca = hu->priv;
693
694 BT_DBG("hu %p qca close", hu);
695
696 serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu);
697
698 skb_queue_purge(&qca->tx_wait_q);
699 skb_queue_purge(&qca->txq);
700 skb_queue_purge(&qca->rx_memdump_q);
701 destroy_workqueue(qca->workqueue);
702 del_timer_sync(&qca->tx_idle_timer);
703 del_timer_sync(&qca->wake_retrans_timer);
704 qca->hu = NULL;
705
706 kfree_skb(qca->rx_skb);
707
708 hu->priv = NULL;
709
710 kfree(qca);
711
712 return 0;
713 }
714
715 /* Called upon a wake-up-indication from the device.
716 */
device_want_to_wakeup(struct hci_uart * hu)717 static void device_want_to_wakeup(struct hci_uart *hu)
718 {
719 unsigned long flags;
720 struct qca_data *qca = hu->priv;
721
722 BT_DBG("hu %p want to wake up", hu);
723
724 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
725
726 qca->ibs_recv_wakes++;
727
728 /* Don't wake the rx up when suspending. */
729 if (test_bit(QCA_SUSPENDING, &qca->flags)) {
730 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
731 return;
732 }
733
734 switch (qca->rx_ibs_state) {
735 case HCI_IBS_RX_ASLEEP:
736 /* Make sure clock is on - we may have turned clock off since
737 * receiving the wake up indicator awake rx clock.
738 */
739 queue_work(qca->workqueue, &qca->ws_awake_rx);
740 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
741 return;
742
743 case HCI_IBS_RX_AWAKE:
744 /* Always acknowledge device wake up,
745 * sending IBS message doesn't count as TX ON.
746 */
747 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) {
748 BT_ERR("Failed to acknowledge device wake up");
749 break;
750 }
751 qca->ibs_sent_wacks++;
752 break;
753
754 default:
755 /* Any other state is illegal */
756 BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d",
757 qca->rx_ibs_state);
758 break;
759 }
760
761 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
762
763 /* Actually send the packets */
764 hci_uart_tx_wakeup(hu);
765 }
766
767 /* Called upon a sleep-indication from the device.
768 */
device_want_to_sleep(struct hci_uart * hu)769 static void device_want_to_sleep(struct hci_uart *hu)
770 {
771 unsigned long flags;
772 struct qca_data *qca = hu->priv;
773
774 BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state);
775
776 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
777
778 qca->ibs_recv_slps++;
779
780 switch (qca->rx_ibs_state) {
781 case HCI_IBS_RX_AWAKE:
782 /* Update state */
783 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
784 /* Vote off rx clock under workqueue */
785 queue_work(qca->workqueue, &qca->ws_rx_vote_off);
786 break;
787
788 case HCI_IBS_RX_ASLEEP:
789 break;
790
791 default:
792 /* Any other state is illegal */
793 BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d",
794 qca->rx_ibs_state);
795 break;
796 }
797
798 wake_up_interruptible(&qca->suspend_wait_q);
799
800 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
801 }
802
803 /* Called upon wake-up-acknowledgement from the device
804 */
device_woke_up(struct hci_uart * hu)805 static void device_woke_up(struct hci_uart *hu)
806 {
807 unsigned long flags, idle_delay;
808 struct qca_data *qca = hu->priv;
809 struct sk_buff *skb = NULL;
810
811 BT_DBG("hu %p woke up", hu);
812
813 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
814
815 qca->ibs_recv_wacks++;
816
817 /* Don't react to the wake-up-acknowledgment when suspending. */
818 if (test_bit(QCA_SUSPENDING, &qca->flags)) {
819 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
820 return;
821 }
822
823 switch (qca->tx_ibs_state) {
824 case HCI_IBS_TX_AWAKE:
825 /* Expect one if we send 2 WAKEs */
826 BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d",
827 qca->tx_ibs_state);
828 break;
829
830 case HCI_IBS_TX_WAKING:
831 /* Send pending packets */
832 while ((skb = skb_dequeue(&qca->tx_wait_q)))
833 skb_queue_tail(&qca->txq, skb);
834
835 /* Switch timers and change state to HCI_IBS_TX_AWAKE */
836 del_timer(&qca->wake_retrans_timer);
837 idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
838 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
839 qca->tx_ibs_state = HCI_IBS_TX_AWAKE;
840 break;
841
842 case HCI_IBS_TX_ASLEEP:
843 default:
844 BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d",
845 qca->tx_ibs_state);
846 break;
847 }
848
849 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
850
851 /* Actually send the packets */
852 hci_uart_tx_wakeup(hu);
853 }
854
855 /* Enqueue frame for transmittion (padding, crc, etc) may be called from
856 * two simultaneous tasklets.
857 */
qca_enqueue(struct hci_uart * hu,struct sk_buff * skb)858 static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb)
859 {
860 unsigned long flags = 0, idle_delay;
861 struct qca_data *qca = hu->priv;
862
863 BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb,
864 qca->tx_ibs_state);
865
866 if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
867 /* As SSR is in progress, ignore the packets */
868 bt_dev_dbg(hu->hdev, "SSR is in progress");
869 kfree_skb(skb);
870 return 0;
871 }
872
873 /* Prepend skb with frame type */
874 memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
875
876 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
877
878 /* Don't go to sleep in middle of patch download or
879 * Out-Of-Band(GPIOs control) sleep is selected.
880 * Don't wake the device up when suspending.
881 */
882 if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
883 test_bit(QCA_SUSPENDING, &qca->flags)) {
884 skb_queue_tail(&qca->txq, skb);
885 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
886 return 0;
887 }
888
889 /* Act according to current state */
890 switch (qca->tx_ibs_state) {
891 case HCI_IBS_TX_AWAKE:
892 BT_DBG("Device awake, sending normally");
893 skb_queue_tail(&qca->txq, skb);
894 idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
895 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
896 break;
897
898 case HCI_IBS_TX_ASLEEP:
899 BT_DBG("Device asleep, waking up and queueing packet");
900 /* Save packet for later */
901 skb_queue_tail(&qca->tx_wait_q, skb);
902
903 qca->tx_ibs_state = HCI_IBS_TX_WAKING;
904 /* Schedule a work queue to wake up device */
905 queue_work(qca->workqueue, &qca->ws_awake_device);
906 break;
907
908 case HCI_IBS_TX_WAKING:
909 BT_DBG("Device waking up, queueing packet");
910 /* Transient state; just keep packet for later */
911 skb_queue_tail(&qca->tx_wait_q, skb);
912 break;
913
914 default:
915 BT_ERR("Illegal tx state: %d (losing packet)",
916 qca->tx_ibs_state);
917 dev_kfree_skb_irq(skb);
918 break;
919 }
920
921 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
922
923 return 0;
924 }
925
qca_ibs_sleep_ind(struct hci_dev * hdev,struct sk_buff * skb)926 static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb)
927 {
928 struct hci_uart *hu = hci_get_drvdata(hdev);
929
930 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND);
931
932 device_want_to_sleep(hu);
933
934 kfree_skb(skb);
935 return 0;
936 }
937
qca_ibs_wake_ind(struct hci_dev * hdev,struct sk_buff * skb)938 static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb)
939 {
940 struct hci_uart *hu = hci_get_drvdata(hdev);
941
942 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND);
943
944 device_want_to_wakeup(hu);
945
946 kfree_skb(skb);
947 return 0;
948 }
949
qca_ibs_wake_ack(struct hci_dev * hdev,struct sk_buff * skb)950 static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb)
951 {
952 struct hci_uart *hu = hci_get_drvdata(hdev);
953
954 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK);
955
956 device_woke_up(hu);
957
958 kfree_skb(skb);
959 return 0;
960 }
961
qca_recv_acl_data(struct hci_dev * hdev,struct sk_buff * skb)962 static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb)
963 {
964 /* We receive debug logs from chip as an ACL packets.
965 * Instead of sending the data to ACL to decode the
966 * received data, we are pushing them to the above layers
967 * as a diagnostic packet.
968 */
969 if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE)
970 return hci_recv_diag(hdev, skb);
971
972 return hci_recv_frame(hdev, skb);
973 }
974
qca_controller_memdump(struct work_struct * work)975 static void qca_controller_memdump(struct work_struct *work)
976 {
977 struct qca_data *qca = container_of(work, struct qca_data,
978 ctrl_memdump_evt);
979 struct hci_uart *hu = qca->hu;
980 struct sk_buff *skb;
981 struct qca_memdump_event_hdr *cmd_hdr;
982 struct qca_memdump_data *qca_memdump = qca->qca_memdump;
983 struct qca_dump_size *dump;
984 char *memdump_buf;
985 char nullBuff[QCA_DUMP_PACKET_SIZE] = { 0 };
986 u16 seq_no;
987 u32 dump_size;
988 u32 rx_size;
989 enum qca_btsoc_type soc_type = qca_soc_type(hu);
990
991 while ((skb = skb_dequeue(&qca->rx_memdump_q))) {
992
993 mutex_lock(&qca->hci_memdump_lock);
994 /* Skip processing the received packets if timeout detected
995 * or memdump collection completed.
996 */
997 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
998 qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
999 mutex_unlock(&qca->hci_memdump_lock);
1000 return;
1001 }
1002
1003 if (!qca_memdump) {
1004 qca_memdump = kzalloc(sizeof(struct qca_memdump_data),
1005 GFP_ATOMIC);
1006 if (!qca_memdump) {
1007 mutex_unlock(&qca->hci_memdump_lock);
1008 return;
1009 }
1010
1011 qca->qca_memdump = qca_memdump;
1012 }
1013
1014 qca->memdump_state = QCA_MEMDUMP_COLLECTING;
1015 cmd_hdr = (void *) skb->data;
1016 seq_no = __le16_to_cpu(cmd_hdr->seq_no);
1017 skb_pull(skb, sizeof(struct qca_memdump_event_hdr));
1018
1019 if (!seq_no) {
1020
1021 /* This is the first frame of memdump packet from
1022 * the controller, Disable IBS to recevie dump
1023 * with out any interruption, ideally time required for
1024 * the controller to send the dump is 8 seconds. let us
1025 * start timer to handle this asynchronous activity.
1026 */
1027 set_bit(QCA_IBS_DISABLED, &qca->flags);
1028 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1029 dump = (void *) skb->data;
1030 dump_size = __le32_to_cpu(dump->dump_size);
1031 if (!(dump_size)) {
1032 bt_dev_err(hu->hdev, "Rx invalid memdump size");
1033 kfree(qca_memdump);
1034 kfree_skb(skb);
1035 qca->qca_memdump = NULL;
1036 mutex_unlock(&qca->hci_memdump_lock);
1037 return;
1038 }
1039
1040 bt_dev_info(hu->hdev, "QCA collecting dump of size:%u",
1041 dump_size);
1042 queue_delayed_work(qca->workqueue,
1043 &qca->ctrl_memdump_timeout,
1044 msecs_to_jiffies(MEMDUMP_TIMEOUT_MS)
1045 );
1046
1047 skb_pull(skb, sizeof(dump_size));
1048 memdump_buf = vmalloc(dump_size);
1049 qca_memdump->ram_dump_size = dump_size;
1050 qca_memdump->memdump_buf_head = memdump_buf;
1051 qca_memdump->memdump_buf_tail = memdump_buf;
1052 }
1053
1054 memdump_buf = qca_memdump->memdump_buf_tail;
1055
1056 /* If sequence no 0 is missed then there is no point in
1057 * accepting the other sequences.
1058 */
1059 if (!memdump_buf) {
1060 bt_dev_err(hu->hdev, "QCA: Discarding other packets");
1061 kfree(qca_memdump);
1062 kfree_skb(skb);
1063 qca->qca_memdump = NULL;
1064 mutex_unlock(&qca->hci_memdump_lock);
1065 return;
1066 }
1067
1068 /* There could be chance of missing some packets from
1069 * the controller. In such cases let us store the dummy
1070 * packets in the buffer.
1071 */
1072 /* For QCA6390, controller does not lost packets but
1073 * sequence number field of packat sometimes has error
1074 * bits, so skip this checking for missing packet.
1075 */
1076 while ((seq_no > qca_memdump->current_seq_no + 1) &&
1077 (soc_type != QCA_QCA6390) &&
1078 seq_no != QCA_LAST_SEQUENCE_NUM) {
1079 bt_dev_err(hu->hdev, "QCA controller missed packet:%d",
1080 qca_memdump->current_seq_no);
1081 rx_size = qca_memdump->received_dump;
1082 rx_size += QCA_DUMP_PACKET_SIZE;
1083 if (rx_size > qca_memdump->ram_dump_size) {
1084 bt_dev_err(hu->hdev,
1085 "QCA memdump received %d, no space for missed packet",
1086 qca_memdump->received_dump);
1087 break;
1088 }
1089 memcpy(memdump_buf, nullBuff, QCA_DUMP_PACKET_SIZE);
1090 memdump_buf = memdump_buf + QCA_DUMP_PACKET_SIZE;
1091 qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE;
1092 qca_memdump->current_seq_no++;
1093 }
1094
1095 rx_size = qca_memdump->received_dump + skb->len;
1096 if (rx_size <= qca_memdump->ram_dump_size) {
1097 if ((seq_no != QCA_LAST_SEQUENCE_NUM) &&
1098 (seq_no != qca_memdump->current_seq_no))
1099 bt_dev_err(hu->hdev,
1100 "QCA memdump unexpected packet %d",
1101 seq_no);
1102 bt_dev_dbg(hu->hdev,
1103 "QCA memdump packet %d with length %d",
1104 seq_no, skb->len);
1105 memcpy(memdump_buf, (unsigned char *)skb->data,
1106 skb->len);
1107 memdump_buf = memdump_buf + skb->len;
1108 qca_memdump->memdump_buf_tail = memdump_buf;
1109 qca_memdump->current_seq_no = seq_no + 1;
1110 qca_memdump->received_dump += skb->len;
1111 } else {
1112 bt_dev_err(hu->hdev,
1113 "QCA memdump received %d, no space for packet %d",
1114 qca_memdump->received_dump, seq_no);
1115 }
1116 qca->qca_memdump = qca_memdump;
1117 kfree_skb(skb);
1118 if (seq_no == QCA_LAST_SEQUENCE_NUM) {
1119 bt_dev_info(hu->hdev,
1120 "QCA memdump Done, received %d, total %d",
1121 qca_memdump->received_dump,
1122 qca_memdump->ram_dump_size);
1123 memdump_buf = qca_memdump->memdump_buf_head;
1124 dev_coredumpv(&hu->serdev->dev, memdump_buf,
1125 qca_memdump->received_dump, GFP_KERNEL);
1126 cancel_delayed_work(&qca->ctrl_memdump_timeout);
1127 kfree(qca->qca_memdump);
1128 qca->qca_memdump = NULL;
1129 qca->memdump_state = QCA_MEMDUMP_COLLECTED;
1130 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1131 }
1132
1133 mutex_unlock(&qca->hci_memdump_lock);
1134 }
1135
1136 }
1137
qca_controller_memdump_event(struct hci_dev * hdev,struct sk_buff * skb)1138 static int qca_controller_memdump_event(struct hci_dev *hdev,
1139 struct sk_buff *skb)
1140 {
1141 struct hci_uart *hu = hci_get_drvdata(hdev);
1142 struct qca_data *qca = hu->priv;
1143
1144 set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1145 skb_queue_tail(&qca->rx_memdump_q, skb);
1146 queue_work(qca->workqueue, &qca->ctrl_memdump_evt);
1147
1148 return 0;
1149 }
1150
qca_recv_event(struct hci_dev * hdev,struct sk_buff * skb)1151 static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb)
1152 {
1153 struct hci_uart *hu = hci_get_drvdata(hdev);
1154 struct qca_data *qca = hu->priv;
1155
1156 if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) {
1157 struct hci_event_hdr *hdr = (void *)skb->data;
1158
1159 /* For the WCN3990 the vendor command for a baudrate change
1160 * isn't sent as synchronous HCI command, because the
1161 * controller sends the corresponding vendor event with the
1162 * new baudrate. The event is received and properly decoded
1163 * after changing the baudrate of the host port. It needs to
1164 * be dropped, otherwise it can be misinterpreted as
1165 * response to a later firmware download command (also a
1166 * vendor command).
1167 */
1168
1169 if (hdr->evt == HCI_EV_VENDOR)
1170 complete(&qca->drop_ev_comp);
1171
1172 kfree_skb(skb);
1173
1174 return 0;
1175 }
1176 /* We receive chip memory dump as an event packet, With a dedicated
1177 * handler followed by a hardware error event. When this event is
1178 * received we store dump into a file before closing hci. This
1179 * dump will help in triaging the issues.
1180 */
1181 if ((skb->data[0] == HCI_VENDOR_PKT) &&
1182 (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE))
1183 return qca_controller_memdump_event(hdev, skb);
1184
1185 return hci_recv_frame(hdev, skb);
1186 }
1187
1188 #define QCA_IBS_SLEEP_IND_EVENT \
1189 .type = HCI_IBS_SLEEP_IND, \
1190 .hlen = 0, \
1191 .loff = 0, \
1192 .lsize = 0, \
1193 .maxlen = HCI_MAX_IBS_SIZE
1194
1195 #define QCA_IBS_WAKE_IND_EVENT \
1196 .type = HCI_IBS_WAKE_IND, \
1197 .hlen = 0, \
1198 .loff = 0, \
1199 .lsize = 0, \
1200 .maxlen = HCI_MAX_IBS_SIZE
1201
1202 #define QCA_IBS_WAKE_ACK_EVENT \
1203 .type = HCI_IBS_WAKE_ACK, \
1204 .hlen = 0, \
1205 .loff = 0, \
1206 .lsize = 0, \
1207 .maxlen = HCI_MAX_IBS_SIZE
1208
1209 static const struct h4_recv_pkt qca_recv_pkts[] = {
1210 { H4_RECV_ACL, .recv = qca_recv_acl_data },
1211 { H4_RECV_SCO, .recv = hci_recv_frame },
1212 { H4_RECV_EVENT, .recv = qca_recv_event },
1213 { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind },
1214 { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack },
1215 { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind },
1216 };
1217
qca_recv(struct hci_uart * hu,const void * data,int count)1218 static int qca_recv(struct hci_uart *hu, const void *data, int count)
1219 {
1220 struct qca_data *qca = hu->priv;
1221
1222 if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
1223 return -EUNATCH;
1224
1225 qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count,
1226 qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts));
1227 if (IS_ERR(qca->rx_skb)) {
1228 int err = PTR_ERR(qca->rx_skb);
1229 bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
1230 qca->rx_skb = NULL;
1231 return err;
1232 }
1233
1234 return count;
1235 }
1236
qca_dequeue(struct hci_uart * hu)1237 static struct sk_buff *qca_dequeue(struct hci_uart *hu)
1238 {
1239 struct qca_data *qca = hu->priv;
1240
1241 return skb_dequeue(&qca->txq);
1242 }
1243
qca_get_baudrate_value(int speed)1244 static uint8_t qca_get_baudrate_value(int speed)
1245 {
1246 switch (speed) {
1247 case 9600:
1248 return QCA_BAUDRATE_9600;
1249 case 19200:
1250 return QCA_BAUDRATE_19200;
1251 case 38400:
1252 return QCA_BAUDRATE_38400;
1253 case 57600:
1254 return QCA_BAUDRATE_57600;
1255 case 115200:
1256 return QCA_BAUDRATE_115200;
1257 case 230400:
1258 return QCA_BAUDRATE_230400;
1259 case 460800:
1260 return QCA_BAUDRATE_460800;
1261 case 500000:
1262 return QCA_BAUDRATE_500000;
1263 case 921600:
1264 return QCA_BAUDRATE_921600;
1265 case 1000000:
1266 return QCA_BAUDRATE_1000000;
1267 case 2000000:
1268 return QCA_BAUDRATE_2000000;
1269 case 3000000:
1270 return QCA_BAUDRATE_3000000;
1271 case 3200000:
1272 return QCA_BAUDRATE_3200000;
1273 case 3500000:
1274 return QCA_BAUDRATE_3500000;
1275 default:
1276 return QCA_BAUDRATE_115200;
1277 }
1278 }
1279
qca_set_baudrate(struct hci_dev * hdev,uint8_t baudrate)1280 static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate)
1281 {
1282 struct hci_uart *hu = hci_get_drvdata(hdev);
1283 struct qca_data *qca = hu->priv;
1284 struct sk_buff *skb;
1285 u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 };
1286
1287 if (baudrate > QCA_BAUDRATE_3200000)
1288 return -EINVAL;
1289
1290 cmd[4] = baudrate;
1291
1292 skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL);
1293 if (!skb) {
1294 bt_dev_err(hdev, "Failed to allocate baudrate packet");
1295 return -ENOMEM;
1296 }
1297
1298 /* Assign commands to change baudrate and packet type. */
1299 skb_put_data(skb, cmd, sizeof(cmd));
1300 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1301
1302 skb_queue_tail(&qca->txq, skb);
1303 hci_uart_tx_wakeup(hu);
1304
1305 /* Wait for the baudrate change request to be sent */
1306
1307 while (!skb_queue_empty(&qca->txq))
1308 usleep_range(100, 200);
1309
1310 if (hu->serdev)
1311 serdev_device_wait_until_sent(hu->serdev,
1312 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
1313
1314 /* Give the controller time to process the request */
1315 if (qca_is_wcn399x(qca_soc_type(hu)))
1316 msleep(10);
1317 else
1318 msleep(300);
1319
1320 return 0;
1321 }
1322
host_set_baudrate(struct hci_uart * hu,unsigned int speed)1323 static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
1324 {
1325 if (hu->serdev)
1326 serdev_device_set_baudrate(hu->serdev, speed);
1327 else
1328 hci_uart_set_baudrate(hu, speed);
1329 }
1330
qca_send_power_pulse(struct hci_uart * hu,bool on)1331 static int qca_send_power_pulse(struct hci_uart *hu, bool on)
1332 {
1333 int ret;
1334 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
1335 u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE;
1336
1337 /* These power pulses are single byte command which are sent
1338 * at required baudrate to wcn3990. On wcn3990, we have an external
1339 * circuit at Tx pin which decodes the pulse sent at specific baudrate.
1340 * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT
1341 * and also we use the same power inputs to turn on and off for
1342 * Wi-Fi/BT. Powering up the power sources will not enable BT, until
1343 * we send a power on pulse at 115200 bps. This algorithm will help to
1344 * save power. Disabling hardware flow control is mandatory while
1345 * sending power pulses to SoC.
1346 */
1347 bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd);
1348
1349 serdev_device_write_flush(hu->serdev);
1350 hci_uart_set_flow_control(hu, true);
1351 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
1352 if (ret < 0) {
1353 bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd);
1354 return ret;
1355 }
1356
1357 serdev_device_wait_until_sent(hu->serdev, timeout);
1358 hci_uart_set_flow_control(hu, false);
1359
1360 /* Give to controller time to boot/shutdown */
1361 if (on)
1362 msleep(100);
1363 else
1364 msleep(10);
1365
1366 return 0;
1367 }
1368
qca_get_speed(struct hci_uart * hu,enum qca_speed_type speed_type)1369 static unsigned int qca_get_speed(struct hci_uart *hu,
1370 enum qca_speed_type speed_type)
1371 {
1372 unsigned int speed = 0;
1373
1374 if (speed_type == QCA_INIT_SPEED) {
1375 if (hu->init_speed)
1376 speed = hu->init_speed;
1377 else if (hu->proto->init_speed)
1378 speed = hu->proto->init_speed;
1379 } else {
1380 if (hu->oper_speed)
1381 speed = hu->oper_speed;
1382 else if (hu->proto->oper_speed)
1383 speed = hu->proto->oper_speed;
1384 }
1385
1386 return speed;
1387 }
1388
qca_check_speeds(struct hci_uart * hu)1389 static int qca_check_speeds(struct hci_uart *hu)
1390 {
1391 if (qca_is_wcn399x(qca_soc_type(hu))) {
1392 if (!qca_get_speed(hu, QCA_INIT_SPEED) &&
1393 !qca_get_speed(hu, QCA_OPER_SPEED))
1394 return -EINVAL;
1395 } else {
1396 if (!qca_get_speed(hu, QCA_INIT_SPEED) ||
1397 !qca_get_speed(hu, QCA_OPER_SPEED))
1398 return -EINVAL;
1399 }
1400
1401 return 0;
1402 }
1403
qca_set_speed(struct hci_uart * hu,enum qca_speed_type speed_type)1404 static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type)
1405 {
1406 unsigned int speed, qca_baudrate;
1407 struct qca_data *qca = hu->priv;
1408 int ret = 0;
1409
1410 if (speed_type == QCA_INIT_SPEED) {
1411 speed = qca_get_speed(hu, QCA_INIT_SPEED);
1412 if (speed)
1413 host_set_baudrate(hu, speed);
1414 } else {
1415 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1416
1417 speed = qca_get_speed(hu, QCA_OPER_SPEED);
1418 if (!speed)
1419 return 0;
1420
1421 /* Disable flow control for wcn3990 to deassert RTS while
1422 * changing the baudrate of chip and host.
1423 */
1424 if (qca_is_wcn399x(soc_type))
1425 hci_uart_set_flow_control(hu, true);
1426
1427 if (soc_type == QCA_WCN3990) {
1428 reinit_completion(&qca->drop_ev_comp);
1429 set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
1430 }
1431
1432 qca_baudrate = qca_get_baudrate_value(speed);
1433 bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed);
1434 ret = qca_set_baudrate(hu->hdev, qca_baudrate);
1435 if (ret)
1436 goto error;
1437
1438 host_set_baudrate(hu, speed);
1439
1440 error:
1441 if (qca_is_wcn399x(soc_type))
1442 hci_uart_set_flow_control(hu, false);
1443
1444 if (soc_type == QCA_WCN3990) {
1445 /* Wait for the controller to send the vendor event
1446 * for the baudrate change command.
1447 */
1448 if (!wait_for_completion_timeout(&qca->drop_ev_comp,
1449 msecs_to_jiffies(100))) {
1450 bt_dev_err(hu->hdev,
1451 "Failed to change controller baudrate\n");
1452 ret = -ETIMEDOUT;
1453 }
1454
1455 clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
1456 }
1457 }
1458
1459 return ret;
1460 }
1461
qca_send_crashbuffer(struct hci_uart * hu)1462 static int qca_send_crashbuffer(struct hci_uart *hu)
1463 {
1464 struct qca_data *qca = hu->priv;
1465 struct sk_buff *skb;
1466
1467 skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL);
1468 if (!skb) {
1469 bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet");
1470 return -ENOMEM;
1471 }
1472
1473 /* We forcefully crash the controller, by sending 0xfb byte for
1474 * 1024 times. We also might have chance of losing data, To be
1475 * on safer side we send 1096 bytes to the SoC.
1476 */
1477 memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE,
1478 QCA_CRASHBYTE_PACKET_LEN);
1479 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1480 bt_dev_info(hu->hdev, "crash the soc to collect controller dump");
1481 skb_queue_tail(&qca->txq, skb);
1482 hci_uart_tx_wakeup(hu);
1483
1484 return 0;
1485 }
1486
qca_wait_for_dump_collection(struct hci_dev * hdev)1487 static void qca_wait_for_dump_collection(struct hci_dev *hdev)
1488 {
1489 struct hci_uart *hu = hci_get_drvdata(hdev);
1490 struct qca_data *qca = hu->priv;
1491
1492 wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION,
1493 TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS);
1494
1495 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1496 }
1497
qca_hw_error(struct hci_dev * hdev,u8 code)1498 static void qca_hw_error(struct hci_dev *hdev, u8 code)
1499 {
1500 struct hci_uart *hu = hci_get_drvdata(hdev);
1501 struct qca_data *qca = hu->priv;
1502
1503 set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1504 set_bit(QCA_HW_ERROR_EVENT, &qca->flags);
1505 bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state);
1506
1507 if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1508 /* If hardware error event received for other than QCA
1509 * soc memory dump event, then we need to crash the SOC
1510 * and wait here for 8 seconds to get the dump packets.
1511 * This will block main thread to be on hold until we
1512 * collect dump.
1513 */
1514 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1515 qca_send_crashbuffer(hu);
1516 qca_wait_for_dump_collection(hdev);
1517 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1518 /* Let us wait here until memory dump collected or
1519 * memory dump timer expired.
1520 */
1521 bt_dev_info(hdev, "waiting for dump to complete");
1522 qca_wait_for_dump_collection(hdev);
1523 }
1524
1525 mutex_lock(&qca->hci_memdump_lock);
1526 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1527 bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout");
1528 if (qca->qca_memdump) {
1529 vfree(qca->qca_memdump->memdump_buf_head);
1530 kfree(qca->qca_memdump);
1531 qca->qca_memdump = NULL;
1532 }
1533 qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1534 cancel_delayed_work(&qca->ctrl_memdump_timeout);
1535 }
1536 mutex_unlock(&qca->hci_memdump_lock);
1537
1538 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
1539 qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
1540 cancel_work_sync(&qca->ctrl_memdump_evt);
1541 skb_queue_purge(&qca->rx_memdump_q);
1542 }
1543
1544 clear_bit(QCA_HW_ERROR_EVENT, &qca->flags);
1545 }
1546
qca_cmd_timeout(struct hci_dev * hdev)1547 static void qca_cmd_timeout(struct hci_dev *hdev)
1548 {
1549 struct hci_uart *hu = hci_get_drvdata(hdev);
1550 struct qca_data *qca = hu->priv;
1551
1552 set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1553 if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1554 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1555 qca_send_crashbuffer(hu);
1556 qca_wait_for_dump_collection(hdev);
1557 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1558 /* Let us wait here until memory dump collected or
1559 * memory dump timer expired.
1560 */
1561 bt_dev_info(hdev, "waiting for dump to complete");
1562 qca_wait_for_dump_collection(hdev);
1563 }
1564
1565 mutex_lock(&qca->hci_memdump_lock);
1566 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1567 qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1568 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
1569 /* Inject hw error event to reset the device
1570 * and driver.
1571 */
1572 hci_reset_dev(hu->hdev);
1573 }
1574 }
1575 mutex_unlock(&qca->hci_memdump_lock);
1576 }
1577
qca_wcn3990_init(struct hci_uart * hu)1578 static int qca_wcn3990_init(struct hci_uart *hu)
1579 {
1580 struct qca_serdev *qcadev;
1581 int ret;
1582
1583 /* Check for vregs status, may be hci down has turned
1584 * off the voltage regulator.
1585 */
1586 qcadev = serdev_device_get_drvdata(hu->serdev);
1587 if (!qcadev->bt_power->vregs_on) {
1588 serdev_device_close(hu->serdev);
1589 ret = qca_regulator_enable(qcadev);
1590 if (ret)
1591 return ret;
1592
1593 ret = serdev_device_open(hu->serdev);
1594 if (ret) {
1595 bt_dev_err(hu->hdev, "failed to open port");
1596 return ret;
1597 }
1598 }
1599
1600 /* Forcefully enable wcn3990 to enter in to boot mode. */
1601 host_set_baudrate(hu, 2400);
1602 ret = qca_send_power_pulse(hu, false);
1603 if (ret)
1604 return ret;
1605
1606 qca_set_speed(hu, QCA_INIT_SPEED);
1607 ret = qca_send_power_pulse(hu, true);
1608 if (ret)
1609 return ret;
1610
1611 /* Now the device is in ready state to communicate with host.
1612 * To sync host with device we need to reopen port.
1613 * Without this, we will have RTS and CTS synchronization
1614 * issues.
1615 */
1616 serdev_device_close(hu->serdev);
1617 ret = serdev_device_open(hu->serdev);
1618 if (ret) {
1619 bt_dev_err(hu->hdev, "failed to open port");
1620 return ret;
1621 }
1622
1623 hci_uart_set_flow_control(hu, false);
1624
1625 return 0;
1626 }
1627
qca_power_on(struct hci_dev * hdev)1628 static int qca_power_on(struct hci_dev *hdev)
1629 {
1630 struct hci_uart *hu = hci_get_drvdata(hdev);
1631 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1632 struct qca_serdev *qcadev;
1633 struct qca_data *qca = hu->priv;
1634 int ret = 0;
1635
1636 /* Non-serdev device usually is powered by external power
1637 * and don't need additional action in driver for power on
1638 */
1639 if (!hu->serdev)
1640 return 0;
1641
1642 if (qca_is_wcn399x(soc_type)) {
1643 ret = qca_wcn3990_init(hu);
1644 } else {
1645 qcadev = serdev_device_get_drvdata(hu->serdev);
1646 if (qcadev->bt_en) {
1647 gpiod_set_value_cansleep(qcadev->bt_en, 1);
1648 /* Controller needs time to bootup. */
1649 msleep(150);
1650 }
1651 }
1652
1653 clear_bit(QCA_BT_OFF, &qca->flags);
1654 return ret;
1655 }
1656
qca_setup(struct hci_uart * hu)1657 static int qca_setup(struct hci_uart *hu)
1658 {
1659 struct hci_dev *hdev = hu->hdev;
1660 struct qca_data *qca = hu->priv;
1661 unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200;
1662 unsigned int retries = 0;
1663 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1664 const char *firmware_name = qca_get_firmware_name(hu);
1665 int ret;
1666 int soc_ver = 0;
1667
1668 ret = qca_check_speeds(hu);
1669 if (ret)
1670 return ret;
1671
1672 clear_bit(QCA_ROM_FW, &qca->flags);
1673 /* Patch downloading has to be done without IBS mode */
1674 set_bit(QCA_IBS_DISABLED, &qca->flags);
1675
1676 /* Enable controller to do both LE scan and BR/EDR inquiry
1677 * simultaneously.
1678 */
1679 set_bit(HCI_QUIRK_SIMULTANEOUS_DISCOVERY, &hdev->quirks);
1680
1681 bt_dev_info(hdev, "setting up %s",
1682 qca_is_wcn399x(soc_type) ? "wcn399x" : "ROME/QCA6390");
1683
1684 qca->memdump_state = QCA_MEMDUMP_IDLE;
1685
1686 retry:
1687 ret = qca_power_on(hdev);
1688 if (ret)
1689 return ret;
1690
1691 clear_bit(QCA_SSR_TRIGGERED, &qca->flags);
1692
1693 if (qca_is_wcn399x(soc_type)) {
1694 set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks);
1695
1696 ret = qca_read_soc_version(hdev, &soc_ver, soc_type);
1697 if (ret)
1698 return ret;
1699 } else {
1700 qca_set_speed(hu, QCA_INIT_SPEED);
1701 }
1702
1703 /* Setup user speed if needed */
1704 speed = qca_get_speed(hu, QCA_OPER_SPEED);
1705 if (speed) {
1706 ret = qca_set_speed(hu, QCA_OPER_SPEED);
1707 if (ret)
1708 return ret;
1709
1710 qca_baudrate = qca_get_baudrate_value(speed);
1711 }
1712
1713 if (!qca_is_wcn399x(soc_type)) {
1714 /* Get QCA version information */
1715 ret = qca_read_soc_version(hdev, &soc_ver, soc_type);
1716 if (ret)
1717 return ret;
1718 }
1719
1720 bt_dev_info(hdev, "QCA controller version 0x%08x", soc_ver);
1721 /* Setup patch / NVM configurations */
1722 ret = qca_uart_setup(hdev, qca_baudrate, soc_type, soc_ver,
1723 firmware_name);
1724 if (!ret) {
1725 clear_bit(QCA_IBS_DISABLED, &qca->flags);
1726 qca_debugfs_init(hdev);
1727 hu->hdev->hw_error = qca_hw_error;
1728 hu->hdev->cmd_timeout = qca_cmd_timeout;
1729 } else if (ret == -ENOENT) {
1730 /* No patch/nvm-config found, run with original fw/config */
1731 set_bit(QCA_ROM_FW, &qca->flags);
1732 ret = 0;
1733 } else if (ret == -EAGAIN) {
1734 /*
1735 * Userspace firmware loader will return -EAGAIN in case no
1736 * patch/nvm-config is found, so run with original fw/config.
1737 */
1738 set_bit(QCA_ROM_FW, &qca->flags);
1739 ret = 0;
1740 } else {
1741 if (retries < MAX_INIT_RETRIES) {
1742 qca_power_shutdown(hu);
1743 if (hu->serdev) {
1744 serdev_device_close(hu->serdev);
1745 ret = serdev_device_open(hu->serdev);
1746 if (ret) {
1747 bt_dev_err(hdev, "failed to open port");
1748 return ret;
1749 }
1750 }
1751 retries++;
1752 goto retry;
1753 }
1754 }
1755
1756 /* Setup bdaddr */
1757 if (soc_type == QCA_ROME)
1758 hu->hdev->set_bdaddr = qca_set_bdaddr_rome;
1759 else
1760 hu->hdev->set_bdaddr = qca_set_bdaddr;
1761
1762 return ret;
1763 }
1764
1765 static const struct hci_uart_proto qca_proto = {
1766 .id = HCI_UART_QCA,
1767 .name = "QCA",
1768 .manufacturer = 29,
1769 .init_speed = 115200,
1770 .oper_speed = 3000000,
1771 .open = qca_open,
1772 .close = qca_close,
1773 .flush = qca_flush,
1774 .setup = qca_setup,
1775 .recv = qca_recv,
1776 .enqueue = qca_enqueue,
1777 .dequeue = qca_dequeue,
1778 };
1779
1780 static const struct qca_device_data qca_soc_data_wcn3990 = {
1781 .soc_type = QCA_WCN3990,
1782 .vregs = (struct qca_vreg []) {
1783 { "vddio", 15000 },
1784 { "vddxo", 80000 },
1785 { "vddrf", 300000 },
1786 { "vddch0", 450000 },
1787 },
1788 .num_vregs = 4,
1789 };
1790
1791 static const struct qca_device_data qca_soc_data_wcn3991 = {
1792 .soc_type = QCA_WCN3991,
1793 .vregs = (struct qca_vreg []) {
1794 { "vddio", 15000 },
1795 { "vddxo", 80000 },
1796 { "vddrf", 300000 },
1797 { "vddch0", 450000 },
1798 },
1799 .num_vregs = 4,
1800 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
1801 };
1802
1803 static const struct qca_device_data qca_soc_data_wcn3998 = {
1804 .soc_type = QCA_WCN3998,
1805 .vregs = (struct qca_vreg []) {
1806 { "vddio", 10000 },
1807 { "vddxo", 80000 },
1808 { "vddrf", 300000 },
1809 { "vddch0", 450000 },
1810 },
1811 .num_vregs = 4,
1812 };
1813
1814 static const struct qca_device_data qca_soc_data_qca6390 = {
1815 .soc_type = QCA_QCA6390,
1816 .num_vregs = 0,
1817 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
1818 };
1819
qca_power_shutdown(struct hci_uart * hu)1820 static void qca_power_shutdown(struct hci_uart *hu)
1821 {
1822 struct qca_serdev *qcadev;
1823 struct qca_data *qca = hu->priv;
1824 unsigned long flags;
1825 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1826
1827 /* From this point we go into power off state. But serial port is
1828 * still open, stop queueing the IBS data and flush all the buffered
1829 * data in skb's.
1830 */
1831 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
1832 set_bit(QCA_IBS_DISABLED, &qca->flags);
1833 qca_flush(hu);
1834 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
1835
1836 /* Non-serdev device usually is powered by external power
1837 * and don't need additional action in driver for power down
1838 */
1839 if (!hu->serdev)
1840 return;
1841
1842 qcadev = serdev_device_get_drvdata(hu->serdev);
1843
1844 if (qca_is_wcn399x(soc_type)) {
1845 host_set_baudrate(hu, 2400);
1846 qca_send_power_pulse(hu, false);
1847 qca_regulator_disable(qcadev);
1848 } else if (qcadev->bt_en) {
1849 gpiod_set_value_cansleep(qcadev->bt_en, 0);
1850 }
1851
1852 set_bit(QCA_BT_OFF, &qca->flags);
1853 }
1854
qca_power_off(struct hci_dev * hdev)1855 static int qca_power_off(struct hci_dev *hdev)
1856 {
1857 struct hci_uart *hu = hci_get_drvdata(hdev);
1858 struct qca_data *qca = hu->priv;
1859 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1860
1861 hu->hdev->hw_error = NULL;
1862 hu->hdev->cmd_timeout = NULL;
1863
1864 del_timer_sync(&qca->wake_retrans_timer);
1865 del_timer_sync(&qca->tx_idle_timer);
1866
1867 /* Stop sending shutdown command if soc crashes. */
1868 if (soc_type != QCA_ROME
1869 && qca->memdump_state == QCA_MEMDUMP_IDLE) {
1870 qca_send_pre_shutdown_cmd(hdev);
1871 usleep_range(8000, 10000);
1872 }
1873
1874 qca_power_shutdown(hu);
1875 return 0;
1876 }
1877
qca_regulator_enable(struct qca_serdev * qcadev)1878 static int qca_regulator_enable(struct qca_serdev *qcadev)
1879 {
1880 struct qca_power *power = qcadev->bt_power;
1881 int ret;
1882
1883 /* Already enabled */
1884 if (power->vregs_on)
1885 return 0;
1886
1887 BT_DBG("enabling %d regulators)", power->num_vregs);
1888
1889 ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk);
1890 if (ret)
1891 return ret;
1892
1893 power->vregs_on = true;
1894
1895 ret = clk_prepare_enable(qcadev->susclk);
1896 if (ret)
1897 qca_regulator_disable(qcadev);
1898
1899 return ret;
1900 }
1901
qca_regulator_disable(struct qca_serdev * qcadev)1902 static void qca_regulator_disable(struct qca_serdev *qcadev)
1903 {
1904 struct qca_power *power;
1905
1906 if (!qcadev)
1907 return;
1908
1909 power = qcadev->bt_power;
1910
1911 /* Already disabled? */
1912 if (!power->vregs_on)
1913 return;
1914
1915 regulator_bulk_disable(power->num_vregs, power->vreg_bulk);
1916 power->vregs_on = false;
1917
1918 clk_disable_unprepare(qcadev->susclk);
1919 }
1920
qca_init_regulators(struct qca_power * qca,const struct qca_vreg * vregs,size_t num_vregs)1921 static int qca_init_regulators(struct qca_power *qca,
1922 const struct qca_vreg *vregs, size_t num_vregs)
1923 {
1924 struct regulator_bulk_data *bulk;
1925 int ret;
1926 int i;
1927
1928 bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL);
1929 if (!bulk)
1930 return -ENOMEM;
1931
1932 for (i = 0; i < num_vregs; i++)
1933 bulk[i].supply = vregs[i].name;
1934
1935 ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk);
1936 if (ret < 0)
1937 return ret;
1938
1939 for (i = 0; i < num_vregs; i++) {
1940 ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA);
1941 if (ret)
1942 return ret;
1943 }
1944
1945 qca->vreg_bulk = bulk;
1946 qca->num_vregs = num_vregs;
1947
1948 return 0;
1949 }
1950
qca_serdev_probe(struct serdev_device * serdev)1951 static int qca_serdev_probe(struct serdev_device *serdev)
1952 {
1953 struct qca_serdev *qcadev;
1954 struct hci_dev *hdev;
1955 const struct qca_device_data *data;
1956 int err;
1957 bool power_ctrl_enabled = true;
1958
1959 qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL);
1960 if (!qcadev)
1961 return -ENOMEM;
1962
1963 qcadev->serdev_hu.serdev = serdev;
1964 data = device_get_match_data(&serdev->dev);
1965 serdev_device_set_drvdata(serdev, qcadev);
1966 device_property_read_string(&serdev->dev, "firmware-name",
1967 &qcadev->firmware_name);
1968 device_property_read_u32(&serdev->dev, "max-speed",
1969 &qcadev->oper_speed);
1970 if (!qcadev->oper_speed)
1971 BT_DBG("UART will pick default operating speed");
1972
1973 if (data && qca_is_wcn399x(data->soc_type)) {
1974 qcadev->btsoc_type = data->soc_type;
1975 qcadev->bt_power = devm_kzalloc(&serdev->dev,
1976 sizeof(struct qca_power),
1977 GFP_KERNEL);
1978 if (!qcadev->bt_power)
1979 return -ENOMEM;
1980
1981 qcadev->bt_power->dev = &serdev->dev;
1982 err = qca_init_regulators(qcadev->bt_power, data->vregs,
1983 data->num_vregs);
1984 if (err) {
1985 BT_ERR("Failed to init regulators:%d", err);
1986 return err;
1987 }
1988
1989 qcadev->bt_power->vregs_on = false;
1990
1991 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
1992 if (IS_ERR(qcadev->susclk)) {
1993 dev_err(&serdev->dev, "failed to acquire clk\n");
1994 return PTR_ERR(qcadev->susclk);
1995 }
1996
1997 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
1998 if (err) {
1999 BT_ERR("wcn3990 serdev registration failed");
2000 return err;
2001 }
2002 } else {
2003 if (data)
2004 qcadev->btsoc_type = data->soc_type;
2005 else
2006 qcadev->btsoc_type = QCA_ROME;
2007
2008 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
2009 GPIOD_OUT_LOW);
2010 if (IS_ERR_OR_NULL(qcadev->bt_en)) {
2011 dev_warn(&serdev->dev, "failed to acquire enable gpio\n");
2012 power_ctrl_enabled = false;
2013 }
2014
2015 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
2016 if (IS_ERR(qcadev->susclk)) {
2017 dev_warn(&serdev->dev, "failed to acquire clk\n");
2018 return PTR_ERR(qcadev->susclk);
2019 }
2020 err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ);
2021 if (err)
2022 return err;
2023
2024 err = clk_prepare_enable(qcadev->susclk);
2025 if (err)
2026 return err;
2027
2028 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
2029 if (err) {
2030 BT_ERR("Rome serdev registration failed");
2031 clk_disable_unprepare(qcadev->susclk);
2032 return err;
2033 }
2034 }
2035
2036 hdev = qcadev->serdev_hu.hdev;
2037
2038 if (power_ctrl_enabled) {
2039 set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks);
2040 hdev->shutdown = qca_power_off;
2041 }
2042
2043 if (data) {
2044 /* Wideband speech support must be set per driver since it can't
2045 * be queried via hci. Same with the valid le states quirk.
2046 */
2047 if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH)
2048 set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED,
2049 &hdev->quirks);
2050
2051 if (data->capabilities & QCA_CAP_VALID_LE_STATES)
2052 set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks);
2053 }
2054
2055 return 0;
2056 }
2057
qca_serdev_remove(struct serdev_device * serdev)2058 static void qca_serdev_remove(struct serdev_device *serdev)
2059 {
2060 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2061 struct qca_power *power = qcadev->bt_power;
2062
2063 if (qca_is_wcn399x(qcadev->btsoc_type) && power->vregs_on)
2064 qca_power_shutdown(&qcadev->serdev_hu);
2065 else if (qcadev->susclk)
2066 clk_disable_unprepare(qcadev->susclk);
2067
2068 hci_uart_unregister_device(&qcadev->serdev_hu);
2069 }
2070
qca_serdev_shutdown(struct device * dev)2071 static void qca_serdev_shutdown(struct device *dev)
2072 {
2073 int ret;
2074 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
2075 struct serdev_device *serdev = to_serdev_device(dev);
2076 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2077 struct hci_uart *hu = &qcadev->serdev_hu;
2078 struct hci_dev *hdev = hu->hdev;
2079 struct qca_data *qca = hu->priv;
2080 const u8 ibs_wake_cmd[] = { 0xFD };
2081 const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 };
2082
2083 if (qcadev->btsoc_type == QCA_QCA6390) {
2084 if (test_bit(QCA_BT_OFF, &qca->flags) ||
2085 !test_bit(HCI_RUNNING, &hdev->flags))
2086 return;
2087
2088 serdev_device_write_flush(serdev);
2089 ret = serdev_device_write_buf(serdev, ibs_wake_cmd,
2090 sizeof(ibs_wake_cmd));
2091 if (ret < 0) {
2092 BT_ERR("QCA send IBS_WAKE_IND error: %d", ret);
2093 return;
2094 }
2095 serdev_device_wait_until_sent(serdev, timeout);
2096 usleep_range(8000, 10000);
2097
2098 serdev_device_write_flush(serdev);
2099 ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd,
2100 sizeof(edl_reset_soc_cmd));
2101 if (ret < 0) {
2102 BT_ERR("QCA send EDL_RESET_REQ error: %d", ret);
2103 return;
2104 }
2105 serdev_device_wait_until_sent(serdev, timeout);
2106 usleep_range(8000, 10000);
2107 }
2108 }
2109
qca_suspend(struct device * dev)2110 static int __maybe_unused qca_suspend(struct device *dev)
2111 {
2112 struct serdev_device *serdev = to_serdev_device(dev);
2113 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2114 struct hci_uart *hu = &qcadev->serdev_hu;
2115 struct qca_data *qca = hu->priv;
2116 unsigned long flags;
2117 bool tx_pending = false;
2118 int ret = 0;
2119 u8 cmd;
2120 u32 wait_timeout = 0;
2121
2122 set_bit(QCA_SUSPENDING, &qca->flags);
2123
2124 /* if BT SoC is running with default firmware then it does not
2125 * support in-band sleep
2126 */
2127 if (test_bit(QCA_ROM_FW, &qca->flags))
2128 return 0;
2129
2130 /* During SSR after memory dump collection, controller will be
2131 * powered off and then powered on.If controller is powered off
2132 * during SSR then we should wait until SSR is completed.
2133 */
2134 if (test_bit(QCA_BT_OFF, &qca->flags) &&
2135 !test_bit(QCA_SSR_TRIGGERED, &qca->flags))
2136 return 0;
2137
2138 if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
2139 test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
2140 wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ?
2141 IBS_DISABLE_SSR_TIMEOUT_MS :
2142 FW_DOWNLOAD_TIMEOUT_MS;
2143
2144 /* QCA_IBS_DISABLED flag is set to true, During FW download
2145 * and during memory dump collection. It is reset to false,
2146 * After FW download complete.
2147 */
2148 wait_on_bit_timeout(&qca->flags, QCA_IBS_DISABLED,
2149 TASK_UNINTERRUPTIBLE, msecs_to_jiffies(wait_timeout));
2150
2151 if (test_bit(QCA_IBS_DISABLED, &qca->flags)) {
2152 bt_dev_err(hu->hdev, "SSR or FW download time out");
2153 ret = -ETIMEDOUT;
2154 goto error;
2155 }
2156 }
2157
2158 cancel_work_sync(&qca->ws_awake_device);
2159 cancel_work_sync(&qca->ws_awake_rx);
2160
2161 spin_lock_irqsave_nested(&qca->hci_ibs_lock,
2162 flags, SINGLE_DEPTH_NESTING);
2163
2164 switch (qca->tx_ibs_state) {
2165 case HCI_IBS_TX_WAKING:
2166 del_timer(&qca->wake_retrans_timer);
2167 fallthrough;
2168 case HCI_IBS_TX_AWAKE:
2169 del_timer(&qca->tx_idle_timer);
2170
2171 serdev_device_write_flush(hu->serdev);
2172 cmd = HCI_IBS_SLEEP_IND;
2173 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
2174
2175 if (ret < 0) {
2176 BT_ERR("Failed to send SLEEP to device");
2177 break;
2178 }
2179
2180 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
2181 qca->ibs_sent_slps++;
2182 tx_pending = true;
2183 break;
2184
2185 case HCI_IBS_TX_ASLEEP:
2186 break;
2187
2188 default:
2189 BT_ERR("Spurious tx state %d", qca->tx_ibs_state);
2190 ret = -EINVAL;
2191 break;
2192 }
2193
2194 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
2195
2196 if (ret < 0)
2197 goto error;
2198
2199 if (tx_pending) {
2200 serdev_device_wait_until_sent(hu->serdev,
2201 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
2202 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
2203 }
2204
2205 /* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going
2206 * to sleep, so that the packet does not wake the system later.
2207 */
2208 ret = wait_event_interruptible_timeout(qca->suspend_wait_q,
2209 qca->rx_ibs_state == HCI_IBS_RX_ASLEEP,
2210 msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS));
2211 if (ret == 0) {
2212 ret = -ETIMEDOUT;
2213 goto error;
2214 }
2215
2216 return 0;
2217
2218 error:
2219 clear_bit(QCA_SUSPENDING, &qca->flags);
2220
2221 return ret;
2222 }
2223
qca_resume(struct device * dev)2224 static int __maybe_unused qca_resume(struct device *dev)
2225 {
2226 struct serdev_device *serdev = to_serdev_device(dev);
2227 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2228 struct hci_uart *hu = &qcadev->serdev_hu;
2229 struct qca_data *qca = hu->priv;
2230
2231 clear_bit(QCA_SUSPENDING, &qca->flags);
2232
2233 return 0;
2234 }
2235
2236 static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume);
2237
2238 #ifdef CONFIG_OF
2239 static const struct of_device_id qca_bluetooth_of_match[] = {
2240 { .compatible = "qcom,qca6174-bt" },
2241 { .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390},
2242 { .compatible = "qcom,qca9377-bt" },
2243 { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990},
2244 { .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991},
2245 { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998},
2246 { /* sentinel */ }
2247 };
2248 MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match);
2249 #endif
2250
2251 #ifdef CONFIG_ACPI
2252 static const struct acpi_device_id qca_bluetooth_acpi_match[] = {
2253 { "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2254 { "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2255 { "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2256 { "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2257 { },
2258 };
2259 MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match);
2260 #endif
2261
2262
2263 static struct serdev_device_driver qca_serdev_driver = {
2264 .probe = qca_serdev_probe,
2265 .remove = qca_serdev_remove,
2266 .driver = {
2267 .name = "hci_uart_qca",
2268 .of_match_table = of_match_ptr(qca_bluetooth_of_match),
2269 .acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match),
2270 .shutdown = qca_serdev_shutdown,
2271 .pm = &qca_pm_ops,
2272 },
2273 };
2274
qca_init(void)2275 int __init qca_init(void)
2276 {
2277 serdev_device_driver_register(&qca_serdev_driver);
2278
2279 return hci_uart_register_proto(&qca_proto);
2280 }
2281
qca_deinit(void)2282 int __exit qca_deinit(void)
2283 {
2284 serdev_device_driver_unregister(&qca_serdev_driver);
2285
2286 return hci_uart_unregister_proto(&qca_proto);
2287 }
2288