1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * BQ27xxx battery driver
4 *
5 * Copyright (C) 2008 Rodolfo Giometti <giometti@linux.it>
6 * Copyright (C) 2008 Eurotech S.p.A. <info@eurotech.it>
7 * Copyright (C) 2010-2011 Lars-Peter Clausen <lars@metafoo.de>
8 * Copyright (C) 2011 Pali Rohár <pali@kernel.org>
9 * Copyright (C) 2017 Liam Breck <kernel@networkimprov.net>
10 *
11 * Based on a previous work by Copyright (C) 2008 Texas Instruments, Inc.
12 *
13 * Datasheets:
14 * https://www.ti.com/product/bq27000
15 * https://www.ti.com/product/bq27200
16 * https://www.ti.com/product/bq27010
17 * https://www.ti.com/product/bq27210
18 * https://www.ti.com/product/bq27500
19 * https://www.ti.com/product/bq27510-g1
20 * https://www.ti.com/product/bq27510-g2
21 * https://www.ti.com/product/bq27510-g3
22 * https://www.ti.com/product/bq27520-g1
23 * https://www.ti.com/product/bq27520-g2
24 * https://www.ti.com/product/bq27520-g3
25 * https://www.ti.com/product/bq27520-g4
26 * https://www.ti.com/product/bq27530-g1
27 * https://www.ti.com/product/bq27531-g1
28 * https://www.ti.com/product/bq27541-g1
29 * https://www.ti.com/product/bq27542-g1
30 * https://www.ti.com/product/bq27546-g1
31 * https://www.ti.com/product/bq27742-g1
32 * https://www.ti.com/product/bq27545-g1
33 * https://www.ti.com/product/bq27421-g1
34 * https://www.ti.com/product/bq27425-g1
35 * https://www.ti.com/product/bq27426
36 * https://www.ti.com/product/bq27411-g1
37 * https://www.ti.com/product/bq27441-g1
38 * https://www.ti.com/product/bq27621-g1
39 * https://www.ti.com/product/bq27z561
40 * https://www.ti.com/product/bq28z610
41 * https://www.ti.com/product/bq34z100-g1
42 */
43
44 #include <linux/device.h>
45 #include <linux/module.h>
46 #include <linux/mutex.h>
47 #include <linux/param.h>
48 #include <linux/jiffies.h>
49 #include <linux/workqueue.h>
50 #include <linux/delay.h>
51 #include <linux/platform_device.h>
52 #include <linux/power_supply.h>
53 #include <linux/slab.h>
54 #include <linux/of.h>
55
56 #include <linux/power/bq27xxx_battery.h>
57
58 #define BQ27XXX_MANUFACTURER "Texas Instruments"
59
60 /* BQ27XXX Flags */
61 #define BQ27XXX_FLAG_DSC BIT(0)
62 #define BQ27XXX_FLAG_SOCF BIT(1) /* State-of-Charge threshold final */
63 #define BQ27XXX_FLAG_SOC1 BIT(2) /* State-of-Charge threshold 1 */
64 #define BQ27XXX_FLAG_CFGUP BIT(4)
65 #define BQ27XXX_FLAG_FC BIT(9)
66 #define BQ27XXX_FLAG_OTD BIT(14)
67 #define BQ27XXX_FLAG_OTC BIT(15)
68 #define BQ27XXX_FLAG_UT BIT(14)
69 #define BQ27XXX_FLAG_OT BIT(15)
70
71 /* BQ27000 has different layout for Flags register */
72 #define BQ27000_FLAG_EDVF BIT(0) /* Final End-of-Discharge-Voltage flag */
73 #define BQ27000_FLAG_EDV1 BIT(1) /* First End-of-Discharge-Voltage flag */
74 #define BQ27000_FLAG_CI BIT(4) /* Capacity Inaccurate flag */
75 #define BQ27000_FLAG_FC BIT(5)
76 #define BQ27000_FLAG_CHGS BIT(7) /* Charge state flag */
77
78 /* BQ27Z561 has different layout for Flags register */
79 #define BQ27Z561_FLAG_FDC BIT(4) /* Battery fully discharged */
80 #define BQ27Z561_FLAG_FC BIT(5) /* Battery fully charged */
81 #define BQ27Z561_FLAG_DIS_CH BIT(6) /* Battery is discharging */
82
83 /* control register params */
84 #define BQ27XXX_SEALED 0x20
85 #define BQ27XXX_SET_CFGUPDATE 0x13
86 #define BQ27XXX_SOFT_RESET 0x42
87 #define BQ27XXX_RESET 0x41
88
89 #define BQ27XXX_RS (20) /* Resistor sense mOhm */
90 #define BQ27XXX_POWER_CONSTANT (29200) /* 29.2 µV^2 * 1000 */
91 #define BQ27XXX_CURRENT_CONSTANT (3570) /* 3.57 µV * 1000 */
92
93 #define INVALID_REG_ADDR 0xff
94
95 /*
96 * bq27xxx_reg_index - Register names
97 *
98 * These are indexes into a device's register mapping array.
99 */
100
101 enum bq27xxx_reg_index {
102 BQ27XXX_REG_CTRL = 0, /* Control */
103 BQ27XXX_REG_TEMP, /* Temperature */
104 BQ27XXX_REG_INT_TEMP, /* Internal Temperature */
105 BQ27XXX_REG_VOLT, /* Voltage */
106 BQ27XXX_REG_AI, /* Average Current */
107 BQ27XXX_REG_FLAGS, /* Flags */
108 BQ27XXX_REG_TTE, /* Time-to-Empty */
109 BQ27XXX_REG_TTF, /* Time-to-Full */
110 BQ27XXX_REG_TTES, /* Time-to-Empty Standby */
111 BQ27XXX_REG_TTECP, /* Time-to-Empty at Constant Power */
112 BQ27XXX_REG_NAC, /* Nominal Available Capacity */
113 BQ27XXX_REG_FCC, /* Full Charge Capacity */
114 BQ27XXX_REG_CYCT, /* Cycle Count */
115 BQ27XXX_REG_AE, /* Available Energy */
116 BQ27XXX_REG_SOC, /* State-of-Charge */
117 BQ27XXX_REG_DCAP, /* Design Capacity */
118 BQ27XXX_REG_AP, /* Average Power */
119 BQ27XXX_DM_CTRL, /* Block Data Control */
120 BQ27XXX_DM_CLASS, /* Data Class */
121 BQ27XXX_DM_BLOCK, /* Data Block */
122 BQ27XXX_DM_DATA, /* Block Data */
123 BQ27XXX_DM_CKSUM, /* Block Data Checksum */
124 BQ27XXX_REG_MAX, /* sentinel */
125 };
126
127 #define BQ27XXX_DM_REG_ROWS \
128 [BQ27XXX_DM_CTRL] = 0x61, \
129 [BQ27XXX_DM_CLASS] = 0x3e, \
130 [BQ27XXX_DM_BLOCK] = 0x3f, \
131 [BQ27XXX_DM_DATA] = 0x40, \
132 [BQ27XXX_DM_CKSUM] = 0x60
133
134 /* Register mappings */
135 static u8
136 bq27000_regs[BQ27XXX_REG_MAX] = {
137 [BQ27XXX_REG_CTRL] = 0x00,
138 [BQ27XXX_REG_TEMP] = 0x06,
139 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
140 [BQ27XXX_REG_VOLT] = 0x08,
141 [BQ27XXX_REG_AI] = 0x14,
142 [BQ27XXX_REG_FLAGS] = 0x0a,
143 [BQ27XXX_REG_TTE] = 0x16,
144 [BQ27XXX_REG_TTF] = 0x18,
145 [BQ27XXX_REG_TTES] = 0x1c,
146 [BQ27XXX_REG_TTECP] = 0x26,
147 [BQ27XXX_REG_NAC] = 0x0c,
148 [BQ27XXX_REG_FCC] = 0x12,
149 [BQ27XXX_REG_CYCT] = 0x2a,
150 [BQ27XXX_REG_AE] = 0x22,
151 [BQ27XXX_REG_SOC] = 0x0b,
152 [BQ27XXX_REG_DCAP] = 0x76,
153 [BQ27XXX_REG_AP] = 0x24,
154 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
155 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
156 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
157 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
158 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
159 },
160 bq27010_regs[BQ27XXX_REG_MAX] = {
161 [BQ27XXX_REG_CTRL] = 0x00,
162 [BQ27XXX_REG_TEMP] = 0x06,
163 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
164 [BQ27XXX_REG_VOLT] = 0x08,
165 [BQ27XXX_REG_AI] = 0x14,
166 [BQ27XXX_REG_FLAGS] = 0x0a,
167 [BQ27XXX_REG_TTE] = 0x16,
168 [BQ27XXX_REG_TTF] = 0x18,
169 [BQ27XXX_REG_TTES] = 0x1c,
170 [BQ27XXX_REG_TTECP] = 0x26,
171 [BQ27XXX_REG_NAC] = 0x0c,
172 [BQ27XXX_REG_FCC] = 0x12,
173 [BQ27XXX_REG_CYCT] = 0x2a,
174 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
175 [BQ27XXX_REG_SOC] = 0x0b,
176 [BQ27XXX_REG_DCAP] = 0x76,
177 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
178 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
179 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
180 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
181 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
182 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
183 },
184 bq2750x_regs[BQ27XXX_REG_MAX] = {
185 [BQ27XXX_REG_CTRL] = 0x00,
186 [BQ27XXX_REG_TEMP] = 0x06,
187 [BQ27XXX_REG_INT_TEMP] = 0x28,
188 [BQ27XXX_REG_VOLT] = 0x08,
189 [BQ27XXX_REG_AI] = 0x14,
190 [BQ27XXX_REG_FLAGS] = 0x0a,
191 [BQ27XXX_REG_TTE] = 0x16,
192 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
193 [BQ27XXX_REG_TTES] = 0x1a,
194 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
195 [BQ27XXX_REG_NAC] = 0x0c,
196 [BQ27XXX_REG_FCC] = 0x12,
197 [BQ27XXX_REG_CYCT] = 0x2a,
198 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
199 [BQ27XXX_REG_SOC] = 0x2c,
200 [BQ27XXX_REG_DCAP] = 0x3c,
201 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
202 BQ27XXX_DM_REG_ROWS,
203 },
204 #define bq2751x_regs bq27510g3_regs
205 #define bq2752x_regs bq27510g3_regs
206 bq27500_regs[BQ27XXX_REG_MAX] = {
207 [BQ27XXX_REG_CTRL] = 0x00,
208 [BQ27XXX_REG_TEMP] = 0x06,
209 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
210 [BQ27XXX_REG_VOLT] = 0x08,
211 [BQ27XXX_REG_AI] = 0x14,
212 [BQ27XXX_REG_FLAGS] = 0x0a,
213 [BQ27XXX_REG_TTE] = 0x16,
214 [BQ27XXX_REG_TTF] = 0x18,
215 [BQ27XXX_REG_TTES] = 0x1c,
216 [BQ27XXX_REG_TTECP] = 0x26,
217 [BQ27XXX_REG_NAC] = 0x0c,
218 [BQ27XXX_REG_FCC] = 0x12,
219 [BQ27XXX_REG_CYCT] = 0x2a,
220 [BQ27XXX_REG_AE] = 0x22,
221 [BQ27XXX_REG_SOC] = 0x2c,
222 [BQ27XXX_REG_DCAP] = 0x3c,
223 [BQ27XXX_REG_AP] = 0x24,
224 BQ27XXX_DM_REG_ROWS,
225 },
226 #define bq27510g1_regs bq27500_regs
227 #define bq27510g2_regs bq27500_regs
228 bq27510g3_regs[BQ27XXX_REG_MAX] = {
229 [BQ27XXX_REG_CTRL] = 0x00,
230 [BQ27XXX_REG_TEMP] = 0x06,
231 [BQ27XXX_REG_INT_TEMP] = 0x28,
232 [BQ27XXX_REG_VOLT] = 0x08,
233 [BQ27XXX_REG_AI] = 0x14,
234 [BQ27XXX_REG_FLAGS] = 0x0a,
235 [BQ27XXX_REG_TTE] = 0x16,
236 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
237 [BQ27XXX_REG_TTES] = 0x1a,
238 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
239 [BQ27XXX_REG_NAC] = 0x0c,
240 [BQ27XXX_REG_FCC] = 0x12,
241 [BQ27XXX_REG_CYCT] = 0x1e,
242 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
243 [BQ27XXX_REG_SOC] = 0x20,
244 [BQ27XXX_REG_DCAP] = 0x2e,
245 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
246 BQ27XXX_DM_REG_ROWS,
247 },
248 bq27520g1_regs[BQ27XXX_REG_MAX] = {
249 [BQ27XXX_REG_CTRL] = 0x00,
250 [BQ27XXX_REG_TEMP] = 0x06,
251 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
252 [BQ27XXX_REG_VOLT] = 0x08,
253 [BQ27XXX_REG_AI] = 0x14,
254 [BQ27XXX_REG_FLAGS] = 0x0a,
255 [BQ27XXX_REG_TTE] = 0x16,
256 [BQ27XXX_REG_TTF] = 0x18,
257 [BQ27XXX_REG_TTES] = 0x1c,
258 [BQ27XXX_REG_TTECP] = 0x26,
259 [BQ27XXX_REG_NAC] = 0x0c,
260 [BQ27XXX_REG_FCC] = 0x12,
261 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
262 [BQ27XXX_REG_AE] = 0x22,
263 [BQ27XXX_REG_SOC] = 0x2c,
264 [BQ27XXX_REG_DCAP] = 0x3c,
265 [BQ27XXX_REG_AP] = 0x24,
266 BQ27XXX_DM_REG_ROWS,
267 },
268 bq27520g2_regs[BQ27XXX_REG_MAX] = {
269 [BQ27XXX_REG_CTRL] = 0x00,
270 [BQ27XXX_REG_TEMP] = 0x06,
271 [BQ27XXX_REG_INT_TEMP] = 0x36,
272 [BQ27XXX_REG_VOLT] = 0x08,
273 [BQ27XXX_REG_AI] = 0x14,
274 [BQ27XXX_REG_FLAGS] = 0x0a,
275 [BQ27XXX_REG_TTE] = 0x16,
276 [BQ27XXX_REG_TTF] = 0x18,
277 [BQ27XXX_REG_TTES] = 0x1c,
278 [BQ27XXX_REG_TTECP] = 0x26,
279 [BQ27XXX_REG_NAC] = 0x0c,
280 [BQ27XXX_REG_FCC] = 0x12,
281 [BQ27XXX_REG_CYCT] = 0x2a,
282 [BQ27XXX_REG_AE] = 0x22,
283 [BQ27XXX_REG_SOC] = 0x2c,
284 [BQ27XXX_REG_DCAP] = 0x3c,
285 [BQ27XXX_REG_AP] = 0x24,
286 BQ27XXX_DM_REG_ROWS,
287 },
288 bq27520g3_regs[BQ27XXX_REG_MAX] = {
289 [BQ27XXX_REG_CTRL] = 0x00,
290 [BQ27XXX_REG_TEMP] = 0x06,
291 [BQ27XXX_REG_INT_TEMP] = 0x36,
292 [BQ27XXX_REG_VOLT] = 0x08,
293 [BQ27XXX_REG_AI] = 0x14,
294 [BQ27XXX_REG_FLAGS] = 0x0a,
295 [BQ27XXX_REG_TTE] = 0x16,
296 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
297 [BQ27XXX_REG_TTES] = 0x1c,
298 [BQ27XXX_REG_TTECP] = 0x26,
299 [BQ27XXX_REG_NAC] = 0x0c,
300 [BQ27XXX_REG_FCC] = 0x12,
301 [BQ27XXX_REG_CYCT] = 0x2a,
302 [BQ27XXX_REG_AE] = 0x22,
303 [BQ27XXX_REG_SOC] = 0x2c,
304 [BQ27XXX_REG_DCAP] = 0x3c,
305 [BQ27XXX_REG_AP] = 0x24,
306 BQ27XXX_DM_REG_ROWS,
307 },
308 bq27520g4_regs[BQ27XXX_REG_MAX] = {
309 [BQ27XXX_REG_CTRL] = 0x00,
310 [BQ27XXX_REG_TEMP] = 0x06,
311 [BQ27XXX_REG_INT_TEMP] = 0x28,
312 [BQ27XXX_REG_VOLT] = 0x08,
313 [BQ27XXX_REG_AI] = 0x14,
314 [BQ27XXX_REG_FLAGS] = 0x0a,
315 [BQ27XXX_REG_TTE] = 0x16,
316 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
317 [BQ27XXX_REG_TTES] = 0x1c,
318 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
319 [BQ27XXX_REG_NAC] = 0x0c,
320 [BQ27XXX_REG_FCC] = 0x12,
321 [BQ27XXX_REG_CYCT] = 0x1e,
322 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
323 [BQ27XXX_REG_SOC] = 0x20,
324 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
325 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
326 BQ27XXX_DM_REG_ROWS,
327 },
328 bq27521_regs[BQ27XXX_REG_MAX] = {
329 [BQ27XXX_REG_CTRL] = 0x02,
330 [BQ27XXX_REG_TEMP] = 0x0a,
331 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
332 [BQ27XXX_REG_VOLT] = 0x0c,
333 [BQ27XXX_REG_AI] = 0x0e,
334 [BQ27XXX_REG_FLAGS] = 0x08,
335 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
336 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
337 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
338 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
339 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
340 [BQ27XXX_REG_FCC] = INVALID_REG_ADDR,
341 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
342 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
343 [BQ27XXX_REG_SOC] = INVALID_REG_ADDR,
344 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
345 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
346 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
347 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
348 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
349 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
350 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
351 },
352 bq27530_regs[BQ27XXX_REG_MAX] = {
353 [BQ27XXX_REG_CTRL] = 0x00,
354 [BQ27XXX_REG_TEMP] = 0x06,
355 [BQ27XXX_REG_INT_TEMP] = 0x32,
356 [BQ27XXX_REG_VOLT] = 0x08,
357 [BQ27XXX_REG_AI] = 0x14,
358 [BQ27XXX_REG_FLAGS] = 0x0a,
359 [BQ27XXX_REG_TTE] = 0x16,
360 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
361 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
362 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
363 [BQ27XXX_REG_NAC] = 0x0c,
364 [BQ27XXX_REG_FCC] = 0x12,
365 [BQ27XXX_REG_CYCT] = 0x2a,
366 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
367 [BQ27XXX_REG_SOC] = 0x2c,
368 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
369 [BQ27XXX_REG_AP] = 0x24,
370 BQ27XXX_DM_REG_ROWS,
371 },
372 #define bq27531_regs bq27530_regs
373 bq27541_regs[BQ27XXX_REG_MAX] = {
374 [BQ27XXX_REG_CTRL] = 0x00,
375 [BQ27XXX_REG_TEMP] = 0x06,
376 [BQ27XXX_REG_INT_TEMP] = 0x28,
377 [BQ27XXX_REG_VOLT] = 0x08,
378 [BQ27XXX_REG_AI] = 0x14,
379 [BQ27XXX_REG_FLAGS] = 0x0a,
380 [BQ27XXX_REG_TTE] = 0x16,
381 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
382 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
383 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
384 [BQ27XXX_REG_NAC] = 0x0c,
385 [BQ27XXX_REG_FCC] = 0x12,
386 [BQ27XXX_REG_CYCT] = 0x2a,
387 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
388 [BQ27XXX_REG_SOC] = 0x2c,
389 [BQ27XXX_REG_DCAP] = 0x3c,
390 [BQ27XXX_REG_AP] = 0x24,
391 BQ27XXX_DM_REG_ROWS,
392 },
393 #define bq27542_regs bq27541_regs
394 #define bq27546_regs bq27541_regs
395 #define bq27742_regs bq27541_regs
396 bq27545_regs[BQ27XXX_REG_MAX] = {
397 [BQ27XXX_REG_CTRL] = 0x00,
398 [BQ27XXX_REG_TEMP] = 0x06,
399 [BQ27XXX_REG_INT_TEMP] = 0x28,
400 [BQ27XXX_REG_VOLT] = 0x08,
401 [BQ27XXX_REG_AI] = 0x14,
402 [BQ27XXX_REG_FLAGS] = 0x0a,
403 [BQ27XXX_REG_TTE] = 0x16,
404 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
405 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
406 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
407 [BQ27XXX_REG_NAC] = 0x0c,
408 [BQ27XXX_REG_FCC] = 0x12,
409 [BQ27XXX_REG_CYCT] = 0x2a,
410 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
411 [BQ27XXX_REG_SOC] = 0x2c,
412 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
413 [BQ27XXX_REG_AP] = 0x24,
414 BQ27XXX_DM_REG_ROWS,
415 },
416 bq27421_regs[BQ27XXX_REG_MAX] = {
417 [BQ27XXX_REG_CTRL] = 0x00,
418 [BQ27XXX_REG_TEMP] = 0x02,
419 [BQ27XXX_REG_INT_TEMP] = 0x1e,
420 [BQ27XXX_REG_VOLT] = 0x04,
421 [BQ27XXX_REG_AI] = 0x10,
422 [BQ27XXX_REG_FLAGS] = 0x06,
423 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
424 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
425 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
426 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
427 [BQ27XXX_REG_NAC] = 0x08,
428 [BQ27XXX_REG_FCC] = 0x0e,
429 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
430 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
431 [BQ27XXX_REG_SOC] = 0x1c,
432 [BQ27XXX_REG_DCAP] = 0x3c,
433 [BQ27XXX_REG_AP] = 0x18,
434 BQ27XXX_DM_REG_ROWS,
435 },
436 #define bq27411_regs bq27421_regs
437 #define bq27425_regs bq27421_regs
438 #define bq27426_regs bq27421_regs
439 #define bq27441_regs bq27421_regs
440 #define bq27621_regs bq27421_regs
441 bq27z561_regs[BQ27XXX_REG_MAX] = {
442 [BQ27XXX_REG_CTRL] = 0x00,
443 [BQ27XXX_REG_TEMP] = 0x06,
444 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
445 [BQ27XXX_REG_VOLT] = 0x08,
446 [BQ27XXX_REG_AI] = 0x14,
447 [BQ27XXX_REG_FLAGS] = 0x0a,
448 [BQ27XXX_REG_TTE] = 0x16,
449 [BQ27XXX_REG_TTF] = 0x18,
450 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
451 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
452 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
453 [BQ27XXX_REG_FCC] = 0x12,
454 [BQ27XXX_REG_CYCT] = 0x2a,
455 [BQ27XXX_REG_AE] = 0x22,
456 [BQ27XXX_REG_SOC] = 0x2c,
457 [BQ27XXX_REG_DCAP] = 0x3c,
458 [BQ27XXX_REG_AP] = 0x22,
459 BQ27XXX_DM_REG_ROWS,
460 },
461 bq28z610_regs[BQ27XXX_REG_MAX] = {
462 [BQ27XXX_REG_CTRL] = 0x00,
463 [BQ27XXX_REG_TEMP] = 0x06,
464 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
465 [BQ27XXX_REG_VOLT] = 0x08,
466 [BQ27XXX_REG_AI] = 0x14,
467 [BQ27XXX_REG_FLAGS] = 0x0a,
468 [BQ27XXX_REG_TTE] = 0x16,
469 [BQ27XXX_REG_TTF] = 0x18,
470 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
471 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
472 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
473 [BQ27XXX_REG_FCC] = 0x12,
474 [BQ27XXX_REG_CYCT] = 0x2a,
475 [BQ27XXX_REG_AE] = 0x22,
476 [BQ27XXX_REG_SOC] = 0x2c,
477 [BQ27XXX_REG_DCAP] = 0x3c,
478 [BQ27XXX_REG_AP] = 0x22,
479 BQ27XXX_DM_REG_ROWS,
480 },
481 bq34z100_regs[BQ27XXX_REG_MAX] = {
482 [BQ27XXX_REG_CTRL] = 0x00,
483 [BQ27XXX_REG_TEMP] = 0x0c,
484 [BQ27XXX_REG_INT_TEMP] = 0x2a,
485 [BQ27XXX_REG_VOLT] = 0x08,
486 [BQ27XXX_REG_AI] = 0x0a,
487 [BQ27XXX_REG_FLAGS] = 0x0e,
488 [BQ27XXX_REG_TTE] = 0x18,
489 [BQ27XXX_REG_TTF] = 0x1a,
490 [BQ27XXX_REG_TTES] = 0x1e,
491 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
492 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
493 [BQ27XXX_REG_FCC] = 0x06,
494 [BQ27XXX_REG_CYCT] = 0x2c,
495 [BQ27XXX_REG_AE] = 0x24,
496 [BQ27XXX_REG_SOC] = 0x02,
497 [BQ27XXX_REG_DCAP] = 0x3c,
498 [BQ27XXX_REG_AP] = 0x22,
499 BQ27XXX_DM_REG_ROWS,
500 };
501
502 static enum power_supply_property bq27000_props[] = {
503 POWER_SUPPLY_PROP_STATUS,
504 POWER_SUPPLY_PROP_PRESENT,
505 POWER_SUPPLY_PROP_VOLTAGE_NOW,
506 POWER_SUPPLY_PROP_CURRENT_NOW,
507 POWER_SUPPLY_PROP_CAPACITY,
508 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
509 POWER_SUPPLY_PROP_TEMP,
510 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
511 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
512 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
513 POWER_SUPPLY_PROP_TECHNOLOGY,
514 POWER_SUPPLY_PROP_CHARGE_FULL,
515 POWER_SUPPLY_PROP_CHARGE_NOW,
516 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
517 POWER_SUPPLY_PROP_CYCLE_COUNT,
518 POWER_SUPPLY_PROP_ENERGY_NOW,
519 POWER_SUPPLY_PROP_POWER_AVG,
520 POWER_SUPPLY_PROP_HEALTH,
521 POWER_SUPPLY_PROP_MANUFACTURER,
522 };
523
524 static enum power_supply_property bq27010_props[] = {
525 POWER_SUPPLY_PROP_STATUS,
526 POWER_SUPPLY_PROP_PRESENT,
527 POWER_SUPPLY_PROP_VOLTAGE_NOW,
528 POWER_SUPPLY_PROP_CURRENT_NOW,
529 POWER_SUPPLY_PROP_CAPACITY,
530 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
531 POWER_SUPPLY_PROP_TEMP,
532 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
533 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
534 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
535 POWER_SUPPLY_PROP_TECHNOLOGY,
536 POWER_SUPPLY_PROP_CHARGE_FULL,
537 POWER_SUPPLY_PROP_CHARGE_NOW,
538 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
539 POWER_SUPPLY_PROP_CYCLE_COUNT,
540 POWER_SUPPLY_PROP_HEALTH,
541 POWER_SUPPLY_PROP_MANUFACTURER,
542 };
543
544 #define bq2750x_props bq27510g3_props
545 #define bq2751x_props bq27510g3_props
546 #define bq2752x_props bq27510g3_props
547
548 static enum power_supply_property bq27500_props[] = {
549 POWER_SUPPLY_PROP_STATUS,
550 POWER_SUPPLY_PROP_PRESENT,
551 POWER_SUPPLY_PROP_VOLTAGE_NOW,
552 POWER_SUPPLY_PROP_CURRENT_NOW,
553 POWER_SUPPLY_PROP_CAPACITY,
554 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
555 POWER_SUPPLY_PROP_TEMP,
556 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
557 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
558 POWER_SUPPLY_PROP_TECHNOLOGY,
559 POWER_SUPPLY_PROP_CHARGE_FULL,
560 POWER_SUPPLY_PROP_CHARGE_NOW,
561 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
562 POWER_SUPPLY_PROP_CYCLE_COUNT,
563 POWER_SUPPLY_PROP_ENERGY_NOW,
564 POWER_SUPPLY_PROP_POWER_AVG,
565 POWER_SUPPLY_PROP_HEALTH,
566 POWER_SUPPLY_PROP_MANUFACTURER,
567 };
568 #define bq27510g1_props bq27500_props
569 #define bq27510g2_props bq27500_props
570
571 static enum power_supply_property bq27510g3_props[] = {
572 POWER_SUPPLY_PROP_STATUS,
573 POWER_SUPPLY_PROP_PRESENT,
574 POWER_SUPPLY_PROP_VOLTAGE_NOW,
575 POWER_SUPPLY_PROP_CURRENT_NOW,
576 POWER_SUPPLY_PROP_CAPACITY,
577 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
578 POWER_SUPPLY_PROP_TEMP,
579 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
580 POWER_SUPPLY_PROP_TECHNOLOGY,
581 POWER_SUPPLY_PROP_CHARGE_FULL,
582 POWER_SUPPLY_PROP_CHARGE_NOW,
583 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
584 POWER_SUPPLY_PROP_CYCLE_COUNT,
585 POWER_SUPPLY_PROP_HEALTH,
586 POWER_SUPPLY_PROP_MANUFACTURER,
587 };
588
589 static enum power_supply_property bq27520g1_props[] = {
590 POWER_SUPPLY_PROP_STATUS,
591 POWER_SUPPLY_PROP_PRESENT,
592 POWER_SUPPLY_PROP_VOLTAGE_NOW,
593 POWER_SUPPLY_PROP_CURRENT_NOW,
594 POWER_SUPPLY_PROP_CAPACITY,
595 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
596 POWER_SUPPLY_PROP_TEMP,
597 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
598 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
599 POWER_SUPPLY_PROP_TECHNOLOGY,
600 POWER_SUPPLY_PROP_CHARGE_FULL,
601 POWER_SUPPLY_PROP_CHARGE_NOW,
602 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
603 POWER_SUPPLY_PROP_ENERGY_NOW,
604 POWER_SUPPLY_PROP_POWER_AVG,
605 POWER_SUPPLY_PROP_HEALTH,
606 POWER_SUPPLY_PROP_MANUFACTURER,
607 };
608
609 #define bq27520g2_props bq27500_props
610
611 static enum power_supply_property bq27520g3_props[] = {
612 POWER_SUPPLY_PROP_STATUS,
613 POWER_SUPPLY_PROP_PRESENT,
614 POWER_SUPPLY_PROP_VOLTAGE_NOW,
615 POWER_SUPPLY_PROP_CURRENT_NOW,
616 POWER_SUPPLY_PROP_CAPACITY,
617 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
618 POWER_SUPPLY_PROP_TEMP,
619 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
620 POWER_SUPPLY_PROP_TECHNOLOGY,
621 POWER_SUPPLY_PROP_CHARGE_FULL,
622 POWER_SUPPLY_PROP_CHARGE_NOW,
623 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
624 POWER_SUPPLY_PROP_CYCLE_COUNT,
625 POWER_SUPPLY_PROP_ENERGY_NOW,
626 POWER_SUPPLY_PROP_POWER_AVG,
627 POWER_SUPPLY_PROP_HEALTH,
628 POWER_SUPPLY_PROP_MANUFACTURER,
629 };
630
631 static enum power_supply_property bq27520g4_props[] = {
632 POWER_SUPPLY_PROP_STATUS,
633 POWER_SUPPLY_PROP_PRESENT,
634 POWER_SUPPLY_PROP_VOLTAGE_NOW,
635 POWER_SUPPLY_PROP_CURRENT_NOW,
636 POWER_SUPPLY_PROP_CAPACITY,
637 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
638 POWER_SUPPLY_PROP_TEMP,
639 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
640 POWER_SUPPLY_PROP_TECHNOLOGY,
641 POWER_SUPPLY_PROP_CHARGE_FULL,
642 POWER_SUPPLY_PROP_CHARGE_NOW,
643 POWER_SUPPLY_PROP_CYCLE_COUNT,
644 POWER_SUPPLY_PROP_HEALTH,
645 POWER_SUPPLY_PROP_MANUFACTURER,
646 };
647
648 static enum power_supply_property bq27521_props[] = {
649 POWER_SUPPLY_PROP_STATUS,
650 POWER_SUPPLY_PROP_PRESENT,
651 POWER_SUPPLY_PROP_VOLTAGE_NOW,
652 POWER_SUPPLY_PROP_CURRENT_NOW,
653 POWER_SUPPLY_PROP_TEMP,
654 POWER_SUPPLY_PROP_TECHNOLOGY,
655 };
656
657 static enum power_supply_property bq27530_props[] = {
658 POWER_SUPPLY_PROP_STATUS,
659 POWER_SUPPLY_PROP_PRESENT,
660 POWER_SUPPLY_PROP_VOLTAGE_NOW,
661 POWER_SUPPLY_PROP_CURRENT_NOW,
662 POWER_SUPPLY_PROP_CAPACITY,
663 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
664 POWER_SUPPLY_PROP_TEMP,
665 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
666 POWER_SUPPLY_PROP_TECHNOLOGY,
667 POWER_SUPPLY_PROP_CHARGE_FULL,
668 POWER_SUPPLY_PROP_CHARGE_NOW,
669 POWER_SUPPLY_PROP_POWER_AVG,
670 POWER_SUPPLY_PROP_HEALTH,
671 POWER_SUPPLY_PROP_CYCLE_COUNT,
672 POWER_SUPPLY_PROP_MANUFACTURER,
673 };
674 #define bq27531_props bq27530_props
675
676 static enum power_supply_property bq27541_props[] = {
677 POWER_SUPPLY_PROP_STATUS,
678 POWER_SUPPLY_PROP_PRESENT,
679 POWER_SUPPLY_PROP_VOLTAGE_NOW,
680 POWER_SUPPLY_PROP_CURRENT_NOW,
681 POWER_SUPPLY_PROP_CAPACITY,
682 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
683 POWER_SUPPLY_PROP_TEMP,
684 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
685 POWER_SUPPLY_PROP_TECHNOLOGY,
686 POWER_SUPPLY_PROP_CHARGE_FULL,
687 POWER_SUPPLY_PROP_CHARGE_NOW,
688 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
689 POWER_SUPPLY_PROP_CYCLE_COUNT,
690 POWER_SUPPLY_PROP_POWER_AVG,
691 POWER_SUPPLY_PROP_HEALTH,
692 POWER_SUPPLY_PROP_MANUFACTURER,
693 };
694 #define bq27542_props bq27541_props
695 #define bq27546_props bq27541_props
696 #define bq27742_props bq27541_props
697
698 static enum power_supply_property bq27545_props[] = {
699 POWER_SUPPLY_PROP_STATUS,
700 POWER_SUPPLY_PROP_PRESENT,
701 POWER_SUPPLY_PROP_VOLTAGE_NOW,
702 POWER_SUPPLY_PROP_CURRENT_NOW,
703 POWER_SUPPLY_PROP_CAPACITY,
704 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
705 POWER_SUPPLY_PROP_TEMP,
706 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
707 POWER_SUPPLY_PROP_TECHNOLOGY,
708 POWER_SUPPLY_PROP_CHARGE_FULL,
709 POWER_SUPPLY_PROP_CHARGE_NOW,
710 POWER_SUPPLY_PROP_HEALTH,
711 POWER_SUPPLY_PROP_CYCLE_COUNT,
712 POWER_SUPPLY_PROP_POWER_AVG,
713 POWER_SUPPLY_PROP_MANUFACTURER,
714 };
715
716 static enum power_supply_property bq27421_props[] = {
717 POWER_SUPPLY_PROP_STATUS,
718 POWER_SUPPLY_PROP_PRESENT,
719 POWER_SUPPLY_PROP_VOLTAGE_NOW,
720 POWER_SUPPLY_PROP_CURRENT_NOW,
721 POWER_SUPPLY_PROP_CAPACITY,
722 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
723 POWER_SUPPLY_PROP_TEMP,
724 POWER_SUPPLY_PROP_TECHNOLOGY,
725 POWER_SUPPLY_PROP_CHARGE_FULL,
726 POWER_SUPPLY_PROP_CHARGE_NOW,
727 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
728 POWER_SUPPLY_PROP_MANUFACTURER,
729 };
730 #define bq27411_props bq27421_props
731 #define bq27425_props bq27421_props
732 #define bq27426_props bq27421_props
733 #define bq27441_props bq27421_props
734 #define bq27621_props bq27421_props
735
736 static enum power_supply_property bq27z561_props[] = {
737 POWER_SUPPLY_PROP_STATUS,
738 POWER_SUPPLY_PROP_PRESENT,
739 POWER_SUPPLY_PROP_VOLTAGE_NOW,
740 POWER_SUPPLY_PROP_CURRENT_NOW,
741 POWER_SUPPLY_PROP_CAPACITY,
742 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
743 POWER_SUPPLY_PROP_TEMP,
744 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
745 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
746 POWER_SUPPLY_PROP_TECHNOLOGY,
747 POWER_SUPPLY_PROP_CHARGE_FULL,
748 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
749 POWER_SUPPLY_PROP_CYCLE_COUNT,
750 POWER_SUPPLY_PROP_POWER_AVG,
751 POWER_SUPPLY_PROP_HEALTH,
752 POWER_SUPPLY_PROP_MANUFACTURER,
753 };
754
755 static enum power_supply_property bq28z610_props[] = {
756 POWER_SUPPLY_PROP_STATUS,
757 POWER_SUPPLY_PROP_PRESENT,
758 POWER_SUPPLY_PROP_VOLTAGE_NOW,
759 POWER_SUPPLY_PROP_CURRENT_NOW,
760 POWER_SUPPLY_PROP_CAPACITY,
761 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
762 POWER_SUPPLY_PROP_TEMP,
763 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
764 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
765 POWER_SUPPLY_PROP_TECHNOLOGY,
766 POWER_SUPPLY_PROP_CHARGE_FULL,
767 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
768 POWER_SUPPLY_PROP_CYCLE_COUNT,
769 POWER_SUPPLY_PROP_POWER_AVG,
770 POWER_SUPPLY_PROP_HEALTH,
771 POWER_SUPPLY_PROP_MANUFACTURER,
772 };
773
774 static enum power_supply_property bq34z100_props[] = {
775 POWER_SUPPLY_PROP_STATUS,
776 POWER_SUPPLY_PROP_PRESENT,
777 POWER_SUPPLY_PROP_VOLTAGE_NOW,
778 POWER_SUPPLY_PROP_CURRENT_NOW,
779 POWER_SUPPLY_PROP_CAPACITY,
780 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
781 POWER_SUPPLY_PROP_TEMP,
782 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
783 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
784 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
785 POWER_SUPPLY_PROP_TECHNOLOGY,
786 POWER_SUPPLY_PROP_CHARGE_FULL,
787 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
788 POWER_SUPPLY_PROP_CYCLE_COUNT,
789 POWER_SUPPLY_PROP_ENERGY_NOW,
790 POWER_SUPPLY_PROP_POWER_AVG,
791 POWER_SUPPLY_PROP_HEALTH,
792 POWER_SUPPLY_PROP_MANUFACTURER,
793 };
794
795 struct bq27xxx_dm_reg {
796 u8 subclass_id;
797 u8 offset;
798 u8 bytes;
799 u16 min, max;
800 };
801
802 enum bq27xxx_dm_reg_id {
803 BQ27XXX_DM_DESIGN_CAPACITY = 0,
804 BQ27XXX_DM_DESIGN_ENERGY,
805 BQ27XXX_DM_TERMINATE_VOLTAGE,
806 };
807
808 #define bq27000_dm_regs 0
809 #define bq27010_dm_regs 0
810 #define bq2750x_dm_regs 0
811 #define bq2751x_dm_regs 0
812 #define bq2752x_dm_regs 0
813
814 #if 0 /* not yet tested */
815 static struct bq27xxx_dm_reg bq27500_dm_regs[] = {
816 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 10, 2, 0, 65535 },
817 [BQ27XXX_DM_DESIGN_ENERGY] = { }, /* missing on chip */
818 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 48, 2, 1000, 32767 },
819 };
820 #else
821 #define bq27500_dm_regs 0
822 #endif
823
824 /* todo create data memory definitions from datasheets and test on chips */
825 #define bq27510g1_dm_regs 0
826 #define bq27510g2_dm_regs 0
827 #define bq27510g3_dm_regs 0
828 #define bq27520g1_dm_regs 0
829 #define bq27520g2_dm_regs 0
830 #define bq27520g3_dm_regs 0
831 #define bq27520g4_dm_regs 0
832 #define bq27521_dm_regs 0
833 #define bq27530_dm_regs 0
834 #define bq27531_dm_regs 0
835 #define bq27541_dm_regs 0
836 #define bq27542_dm_regs 0
837 #define bq27546_dm_regs 0
838 #define bq27742_dm_regs 0
839
840 #if 0 /* not yet tested */
841 static struct bq27xxx_dm_reg bq27545_dm_regs[] = {
842 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 23, 2, 0, 32767 },
843 [BQ27XXX_DM_DESIGN_ENERGY] = { 48, 25, 2, 0, 32767 },
844 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 67, 2, 2800, 3700 },
845 };
846 #else
847 #define bq27545_dm_regs 0
848 #endif
849
850 static struct bq27xxx_dm_reg bq27411_dm_regs[] = {
851 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 32767 },
852 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 },
853 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2800, 3700 },
854 };
855
856 static struct bq27xxx_dm_reg bq27421_dm_regs[] = {
857 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 8000 },
858 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 },
859 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2500, 3700 },
860 };
861
862 static struct bq27xxx_dm_reg bq27425_dm_regs[] = {
863 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 12, 2, 0, 32767 },
864 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 14, 2, 0, 32767 },
865 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 18, 2, 2800, 3700 },
866 };
867
868 static struct bq27xxx_dm_reg bq27426_dm_regs[] = {
869 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 6, 2, 0, 8000 },
870 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 8, 2, 0, 32767 },
871 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 10, 2, 2500, 3700 },
872 };
873
874 #if 0 /* not yet tested */
875 #define bq27441_dm_regs bq27421_dm_regs
876 #else
877 #define bq27441_dm_regs 0
878 #endif
879
880 #if 0 /* not yet tested */
881 static struct bq27xxx_dm_reg bq27621_dm_regs[] = {
882 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 3, 2, 0, 8000 },
883 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 5, 2, 0, 32767 },
884 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 9, 2, 2500, 3700 },
885 };
886 #else
887 #define bq27621_dm_regs 0
888 #endif
889
890 #define bq27z561_dm_regs 0
891 #define bq28z610_dm_regs 0
892 #define bq34z100_dm_regs 0
893
894 #define BQ27XXX_O_ZERO BIT(0)
895 #define BQ27XXX_O_OTDC BIT(1) /* has OTC/OTD overtemperature flags */
896 #define BQ27XXX_O_UTOT BIT(2) /* has OT overtemperature flag */
897 #define BQ27XXX_O_CFGUP BIT(3)
898 #define BQ27XXX_O_RAM BIT(4)
899 #define BQ27Z561_O_BITS BIT(5)
900 #define BQ27XXX_O_SOC_SI BIT(6) /* SoC is single register */
901 #define BQ27XXX_O_HAS_CI BIT(7) /* has Capacity Inaccurate flag */
902 #define BQ27XXX_O_MUL_CHEM BIT(8) /* multiple chemistries supported */
903
904 #define BQ27XXX_DATA(ref, key, opt) { \
905 .opts = (opt), \
906 .unseal_key = key, \
907 .regs = ref##_regs, \
908 .dm_regs = ref##_dm_regs, \
909 .props = ref##_props, \
910 .props_size = ARRAY_SIZE(ref##_props) }
911
912 static struct {
913 u32 opts;
914 u32 unseal_key;
915 u8 *regs;
916 struct bq27xxx_dm_reg *dm_regs;
917 enum power_supply_property *props;
918 size_t props_size;
919 } bq27xxx_chip_data[] = {
920 [BQ27000] = BQ27XXX_DATA(bq27000, 0 , BQ27XXX_O_ZERO | BQ27XXX_O_SOC_SI | BQ27XXX_O_HAS_CI),
921 [BQ27010] = BQ27XXX_DATA(bq27010, 0 , BQ27XXX_O_ZERO | BQ27XXX_O_SOC_SI | BQ27XXX_O_HAS_CI),
922 [BQ2750X] = BQ27XXX_DATA(bq2750x, 0 , BQ27XXX_O_OTDC),
923 [BQ2751X] = BQ27XXX_DATA(bq2751x, 0 , BQ27XXX_O_OTDC),
924 [BQ2752X] = BQ27XXX_DATA(bq2752x, 0 , BQ27XXX_O_OTDC),
925 [BQ27500] = BQ27XXX_DATA(bq27500, 0x04143672, BQ27XXX_O_OTDC),
926 [BQ27510G1] = BQ27XXX_DATA(bq27510g1, 0 , BQ27XXX_O_OTDC),
927 [BQ27510G2] = BQ27XXX_DATA(bq27510g2, 0 , BQ27XXX_O_OTDC),
928 [BQ27510G3] = BQ27XXX_DATA(bq27510g3, 0 , BQ27XXX_O_OTDC),
929 [BQ27520G1] = BQ27XXX_DATA(bq27520g1, 0 , BQ27XXX_O_OTDC),
930 [BQ27520G2] = BQ27XXX_DATA(bq27520g2, 0 , BQ27XXX_O_OTDC),
931 [BQ27520G3] = BQ27XXX_DATA(bq27520g3, 0 , BQ27XXX_O_OTDC),
932 [BQ27520G4] = BQ27XXX_DATA(bq27520g4, 0 , BQ27XXX_O_OTDC),
933 [BQ27521] = BQ27XXX_DATA(bq27521, 0 , 0),
934 [BQ27530] = BQ27XXX_DATA(bq27530, 0 , BQ27XXX_O_UTOT),
935 [BQ27531] = BQ27XXX_DATA(bq27531, 0 , BQ27XXX_O_UTOT),
936 [BQ27541] = BQ27XXX_DATA(bq27541, 0 , BQ27XXX_O_OTDC),
937 [BQ27542] = BQ27XXX_DATA(bq27542, 0 , BQ27XXX_O_OTDC),
938 [BQ27546] = BQ27XXX_DATA(bq27546, 0 , BQ27XXX_O_OTDC),
939 [BQ27742] = BQ27XXX_DATA(bq27742, 0 , BQ27XXX_O_OTDC),
940 [BQ27545] = BQ27XXX_DATA(bq27545, 0x04143672, BQ27XXX_O_OTDC),
941 [BQ27411] = BQ27XXX_DATA(bq27411, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
942 [BQ27421] = BQ27XXX_DATA(bq27421, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
943 [BQ27425] = BQ27XXX_DATA(bq27425, 0x04143672, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP),
944 [BQ27426] = BQ27XXX_DATA(bq27426, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
945 [BQ27441] = BQ27XXX_DATA(bq27441, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
946 [BQ27621] = BQ27XXX_DATA(bq27621, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
947 [BQ27Z561] = BQ27XXX_DATA(bq27z561, 0 , BQ27Z561_O_BITS),
948 [BQ28Z610] = BQ27XXX_DATA(bq28z610, 0 , BQ27Z561_O_BITS),
949 [BQ34Z100] = BQ27XXX_DATA(bq34z100, 0 , BQ27XXX_O_OTDC | BQ27XXX_O_SOC_SI | \
950 BQ27XXX_O_HAS_CI | BQ27XXX_O_MUL_CHEM),
951 };
952
953 static DEFINE_MUTEX(bq27xxx_list_lock);
954 static LIST_HEAD(bq27xxx_battery_devices);
955
956 #define BQ27XXX_MSLEEP(i) usleep_range((i)*1000, (i)*1000+500)
957
958 #define BQ27XXX_DM_SZ 32
959
960 /**
961 * struct bq27xxx_dm_buf - chip data memory buffer
962 * @class: data memory subclass_id
963 * @block: data memory block number
964 * @data: data from/for the block
965 * @has_data: true if data has been filled by read
966 * @dirty: true if data has changed since last read/write
967 *
968 * Encapsulates info required to manage chip data memory blocks.
969 */
970 struct bq27xxx_dm_buf {
971 u8 class;
972 u8 block;
973 u8 data[BQ27XXX_DM_SZ];
974 bool has_data, dirty;
975 };
976
977 #define BQ27XXX_DM_BUF(di, i) { \
978 .class = (di)->dm_regs[i].subclass_id, \
979 .block = (di)->dm_regs[i].offset / BQ27XXX_DM_SZ, \
980 }
981
bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf * buf,struct bq27xxx_dm_reg * reg)982 static inline u16 *bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf *buf,
983 struct bq27xxx_dm_reg *reg)
984 {
985 if (buf->class == reg->subclass_id &&
986 buf->block == reg->offset / BQ27XXX_DM_SZ)
987 return (u16 *) (buf->data + reg->offset % BQ27XXX_DM_SZ);
988
989 return NULL;
990 }
991
992 static const char * const bq27xxx_dm_reg_name[] = {
993 [BQ27XXX_DM_DESIGN_CAPACITY] = "design-capacity",
994 [BQ27XXX_DM_DESIGN_ENERGY] = "design-energy",
995 [BQ27XXX_DM_TERMINATE_VOLTAGE] = "terminate-voltage",
996 };
997
998
999 static bool bq27xxx_dt_to_nvm = true;
1000 module_param_named(dt_monitored_battery_updates_nvm, bq27xxx_dt_to_nvm, bool, 0444);
1001 MODULE_PARM_DESC(dt_monitored_battery_updates_nvm,
1002 "Devicetree monitored-battery config updates data memory on NVM/flash chips.\n"
1003 "Users must set this =0 when installing a different type of battery!\n"
1004 "Default is =1."
1005 #ifndef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1006 "\nSetting this affects future kernel updates, not the current configuration."
1007 #endif
1008 );
1009
poll_interval_param_set(const char * val,const struct kernel_param * kp)1010 static int poll_interval_param_set(const char *val, const struct kernel_param *kp)
1011 {
1012 struct bq27xxx_device_info *di;
1013 unsigned int prev_val = *(unsigned int *) kp->arg;
1014 int ret;
1015
1016 ret = param_set_uint(val, kp);
1017 if (ret < 0 || prev_val == *(unsigned int *) kp->arg)
1018 return ret;
1019
1020 mutex_lock(&bq27xxx_list_lock);
1021 list_for_each_entry(di, &bq27xxx_battery_devices, list)
1022 mod_delayed_work(system_wq, &di->work, 0);
1023 mutex_unlock(&bq27xxx_list_lock);
1024
1025 return ret;
1026 }
1027
1028 static const struct kernel_param_ops param_ops_poll_interval = {
1029 .get = param_get_uint,
1030 .set = poll_interval_param_set,
1031 };
1032
1033 static unsigned int poll_interval = 360;
1034 module_param_cb(poll_interval, ¶m_ops_poll_interval, &poll_interval, 0644);
1035 MODULE_PARM_DESC(poll_interval,
1036 "battery poll interval in seconds - 0 disables polling");
1037
1038 /*
1039 * Common code for BQ27xxx devices
1040 */
1041
bq27xxx_read(struct bq27xxx_device_info * di,int reg_index,bool single)1042 static inline int bq27xxx_read(struct bq27xxx_device_info *di, int reg_index,
1043 bool single)
1044 {
1045 int ret;
1046
1047 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1048 return -EINVAL;
1049
1050 ret = di->bus.read(di, di->regs[reg_index], single);
1051 if (ret < 0)
1052 dev_dbg(di->dev, "failed to read register 0x%02x (index %d)\n",
1053 di->regs[reg_index], reg_index);
1054
1055 return ret;
1056 }
1057
bq27xxx_write(struct bq27xxx_device_info * di,int reg_index,u16 value,bool single)1058 static inline int bq27xxx_write(struct bq27xxx_device_info *di, int reg_index,
1059 u16 value, bool single)
1060 {
1061 int ret;
1062
1063 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1064 return -EINVAL;
1065
1066 if (!di->bus.write)
1067 return -EPERM;
1068
1069 ret = di->bus.write(di, di->regs[reg_index], value, single);
1070 if (ret < 0)
1071 dev_dbg(di->dev, "failed to write register 0x%02x (index %d)\n",
1072 di->regs[reg_index], reg_index);
1073
1074 return ret;
1075 }
1076
bq27xxx_read_block(struct bq27xxx_device_info * di,int reg_index,u8 * data,int len)1077 static inline int bq27xxx_read_block(struct bq27xxx_device_info *di, int reg_index,
1078 u8 *data, int len)
1079 {
1080 int ret;
1081
1082 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1083 return -EINVAL;
1084
1085 if (!di->bus.read_bulk)
1086 return -EPERM;
1087
1088 ret = di->bus.read_bulk(di, di->regs[reg_index], data, len);
1089 if (ret < 0)
1090 dev_dbg(di->dev, "failed to read_bulk register 0x%02x (index %d)\n",
1091 di->regs[reg_index], reg_index);
1092
1093 return ret;
1094 }
1095
bq27xxx_write_block(struct bq27xxx_device_info * di,int reg_index,u8 * data,int len)1096 static inline int bq27xxx_write_block(struct bq27xxx_device_info *di, int reg_index,
1097 u8 *data, int len)
1098 {
1099 int ret;
1100
1101 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1102 return -EINVAL;
1103
1104 if (!di->bus.write_bulk)
1105 return -EPERM;
1106
1107 ret = di->bus.write_bulk(di, di->regs[reg_index], data, len);
1108 if (ret < 0)
1109 dev_dbg(di->dev, "failed to write_bulk register 0x%02x (index %d)\n",
1110 di->regs[reg_index], reg_index);
1111
1112 return ret;
1113 }
1114
bq27xxx_battery_seal(struct bq27xxx_device_info * di)1115 static int bq27xxx_battery_seal(struct bq27xxx_device_info *di)
1116 {
1117 int ret;
1118
1119 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_SEALED, false);
1120 if (ret < 0) {
1121 dev_err(di->dev, "bus error on seal: %d\n", ret);
1122 return ret;
1123 }
1124
1125 return 0;
1126 }
1127
bq27xxx_battery_unseal(struct bq27xxx_device_info * di)1128 static int bq27xxx_battery_unseal(struct bq27xxx_device_info *di)
1129 {
1130 int ret;
1131
1132 if (di->unseal_key == 0) {
1133 dev_err(di->dev, "unseal failed due to missing key\n");
1134 return -EINVAL;
1135 }
1136
1137 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)(di->unseal_key >> 16), false);
1138 if (ret < 0)
1139 goto out;
1140
1141 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)di->unseal_key, false);
1142 if (ret < 0)
1143 goto out;
1144
1145 return 0;
1146
1147 out:
1148 dev_err(di->dev, "bus error on unseal: %d\n", ret);
1149 return ret;
1150 }
1151
bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf * buf)1152 static u8 bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf *buf)
1153 {
1154 u16 sum = 0;
1155 int i;
1156
1157 for (i = 0; i < BQ27XXX_DM_SZ; i++)
1158 sum += buf->data[i];
1159 sum &= 0xff;
1160
1161 return 0xff - sum;
1162 }
1163
bq27xxx_battery_read_dm_block(struct bq27xxx_device_info * di,struct bq27xxx_dm_buf * buf)1164 static int bq27xxx_battery_read_dm_block(struct bq27xxx_device_info *di,
1165 struct bq27xxx_dm_buf *buf)
1166 {
1167 int ret;
1168
1169 buf->has_data = false;
1170
1171 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1172 if (ret < 0)
1173 goto out;
1174
1175 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1176 if (ret < 0)
1177 goto out;
1178
1179 BQ27XXX_MSLEEP(1);
1180
1181 ret = bq27xxx_read_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1182 if (ret < 0)
1183 goto out;
1184
1185 ret = bq27xxx_read(di, BQ27XXX_DM_CKSUM, true);
1186 if (ret < 0)
1187 goto out;
1188
1189 if ((u8)ret != bq27xxx_battery_checksum_dm_block(buf)) {
1190 ret = -EINVAL;
1191 goto out;
1192 }
1193
1194 buf->has_data = true;
1195 buf->dirty = false;
1196
1197 return 0;
1198
1199 out:
1200 dev_err(di->dev, "bus error reading chip memory: %d\n", ret);
1201 return ret;
1202 }
1203
bq27xxx_battery_update_dm_block(struct bq27xxx_device_info * di,struct bq27xxx_dm_buf * buf,enum bq27xxx_dm_reg_id reg_id,unsigned int val)1204 static void bq27xxx_battery_update_dm_block(struct bq27xxx_device_info *di,
1205 struct bq27xxx_dm_buf *buf,
1206 enum bq27xxx_dm_reg_id reg_id,
1207 unsigned int val)
1208 {
1209 struct bq27xxx_dm_reg *reg = &di->dm_regs[reg_id];
1210 const char *str = bq27xxx_dm_reg_name[reg_id];
1211 u16 *prev = bq27xxx_dm_reg_ptr(buf, reg);
1212
1213 if (prev == NULL) {
1214 dev_warn(di->dev, "buffer does not match %s dm spec\n", str);
1215 return;
1216 }
1217
1218 if (reg->bytes != 2) {
1219 dev_warn(di->dev, "%s dm spec has unsupported byte size\n", str);
1220 return;
1221 }
1222
1223 if (!buf->has_data)
1224 return;
1225
1226 if (be16_to_cpup(prev) == val) {
1227 dev_info(di->dev, "%s has %u\n", str, val);
1228 return;
1229 }
1230
1231 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1232 if (!(di->opts & BQ27XXX_O_RAM) && !bq27xxx_dt_to_nvm) {
1233 #else
1234 if (!(di->opts & BQ27XXX_O_RAM)) {
1235 #endif
1236 /* devicetree and NVM differ; defer to NVM */
1237 dev_warn(di->dev, "%s has %u; update to %u disallowed "
1238 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1239 "by dt_monitored_battery_updates_nvm=0"
1240 #else
1241 "for flash/NVM data memory"
1242 #endif
1243 "\n", str, be16_to_cpup(prev), val);
1244 return;
1245 }
1246
1247 dev_info(di->dev, "update %s to %u\n", str, val);
1248
1249 *prev = cpu_to_be16(val);
1250 buf->dirty = true;
1251 }
1252
1253 static int bq27xxx_battery_cfgupdate_priv(struct bq27xxx_device_info *di, bool active)
1254 {
1255 const int limit = 100;
1256 u16 cmd = active ? BQ27XXX_SET_CFGUPDATE : BQ27XXX_SOFT_RESET;
1257 int ret, try = limit;
1258
1259 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, cmd, false);
1260 if (ret < 0)
1261 return ret;
1262
1263 do {
1264 BQ27XXX_MSLEEP(25);
1265 ret = bq27xxx_read(di, BQ27XXX_REG_FLAGS, false);
1266 if (ret < 0)
1267 return ret;
1268 } while (!!(ret & BQ27XXX_FLAG_CFGUP) != active && --try);
1269
1270 if (!try && di->chip != BQ27425) { // 425 has a bug
1271 dev_err(di->dev, "timed out waiting for cfgupdate flag %d\n", active);
1272 return -EINVAL;
1273 }
1274
1275 if (limit - try > 3)
1276 dev_warn(di->dev, "cfgupdate %d, retries %d\n", active, limit - try);
1277
1278 return 0;
1279 }
1280
1281 static inline int bq27xxx_battery_set_cfgupdate(struct bq27xxx_device_info *di)
1282 {
1283 int ret = bq27xxx_battery_cfgupdate_priv(di, true);
1284 if (ret < 0 && ret != -EINVAL)
1285 dev_err(di->dev, "bus error on set_cfgupdate: %d\n", ret);
1286
1287 return ret;
1288 }
1289
1290 static inline int bq27xxx_battery_soft_reset(struct bq27xxx_device_info *di)
1291 {
1292 int ret = bq27xxx_battery_cfgupdate_priv(di, false);
1293 if (ret < 0 && ret != -EINVAL)
1294 dev_err(di->dev, "bus error on soft_reset: %d\n", ret);
1295
1296 return ret;
1297 }
1298
1299 static int bq27xxx_battery_write_dm_block(struct bq27xxx_device_info *di,
1300 struct bq27xxx_dm_buf *buf)
1301 {
1302 bool cfgup = di->opts & BQ27XXX_O_CFGUP;
1303 int ret;
1304
1305 if (!buf->dirty)
1306 return 0;
1307
1308 if (cfgup) {
1309 ret = bq27xxx_battery_set_cfgupdate(di);
1310 if (ret < 0)
1311 return ret;
1312 }
1313
1314 ret = bq27xxx_write(di, BQ27XXX_DM_CTRL, 0, true);
1315 if (ret < 0)
1316 goto out;
1317
1318 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1319 if (ret < 0)
1320 goto out;
1321
1322 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1323 if (ret < 0)
1324 goto out;
1325
1326 BQ27XXX_MSLEEP(1);
1327
1328 ret = bq27xxx_write_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1329 if (ret < 0)
1330 goto out;
1331
1332 ret = bq27xxx_write(di, BQ27XXX_DM_CKSUM,
1333 bq27xxx_battery_checksum_dm_block(buf), true);
1334 if (ret < 0)
1335 goto out;
1336
1337 /* DO NOT read BQ27XXX_DM_CKSUM here to verify it! That may cause NVM
1338 * corruption on the '425 chip (and perhaps others), which can damage
1339 * the chip.
1340 */
1341
1342 if (cfgup) {
1343 BQ27XXX_MSLEEP(1);
1344 ret = bq27xxx_battery_soft_reset(di);
1345 if (ret < 0)
1346 return ret;
1347 } else {
1348 BQ27XXX_MSLEEP(100); /* flash DM updates in <100ms */
1349 }
1350
1351 buf->dirty = false;
1352
1353 return 0;
1354
1355 out:
1356 if (cfgup)
1357 bq27xxx_battery_soft_reset(di);
1358
1359 dev_err(di->dev, "bus error writing chip memory: %d\n", ret);
1360 return ret;
1361 }
1362
1363 static void bq27xxx_battery_set_config(struct bq27xxx_device_info *di,
1364 struct power_supply_battery_info *info)
1365 {
1366 struct bq27xxx_dm_buf bd = BQ27XXX_DM_BUF(di, BQ27XXX_DM_DESIGN_CAPACITY);
1367 struct bq27xxx_dm_buf bt = BQ27XXX_DM_BUF(di, BQ27XXX_DM_TERMINATE_VOLTAGE);
1368 bool updated;
1369
1370 if (bq27xxx_battery_unseal(di) < 0)
1371 return;
1372
1373 if (info->charge_full_design_uah != -EINVAL &&
1374 info->energy_full_design_uwh != -EINVAL) {
1375 bq27xxx_battery_read_dm_block(di, &bd);
1376 /* assume design energy & capacity are in same block */
1377 bq27xxx_battery_update_dm_block(di, &bd,
1378 BQ27XXX_DM_DESIGN_CAPACITY,
1379 info->charge_full_design_uah / 1000);
1380 bq27xxx_battery_update_dm_block(di, &bd,
1381 BQ27XXX_DM_DESIGN_ENERGY,
1382 info->energy_full_design_uwh / 1000);
1383 }
1384
1385 if (info->voltage_min_design_uv != -EINVAL) {
1386 bool same = bd.class == bt.class && bd.block == bt.block;
1387 if (!same)
1388 bq27xxx_battery_read_dm_block(di, &bt);
1389 bq27xxx_battery_update_dm_block(di, same ? &bd : &bt,
1390 BQ27XXX_DM_TERMINATE_VOLTAGE,
1391 info->voltage_min_design_uv / 1000);
1392 }
1393
1394 updated = bd.dirty || bt.dirty;
1395
1396 bq27xxx_battery_write_dm_block(di, &bd);
1397 bq27xxx_battery_write_dm_block(di, &bt);
1398
1399 bq27xxx_battery_seal(di);
1400
1401 if (updated && !(di->opts & BQ27XXX_O_CFGUP)) {
1402 bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_RESET, false);
1403 BQ27XXX_MSLEEP(300); /* reset time is not documented */
1404 }
1405 /* assume bq27xxx_battery_update() is called hereafter */
1406 }
1407
1408 static void bq27xxx_battery_settings(struct bq27xxx_device_info *di)
1409 {
1410 struct power_supply_battery_info info = {};
1411 unsigned int min, max;
1412
1413 if (power_supply_get_battery_info(di->bat, &info) < 0)
1414 return;
1415
1416 if (!di->dm_regs) {
1417 dev_warn(di->dev, "data memory update not supported for chip\n");
1418 return;
1419 }
1420
1421 if (info.energy_full_design_uwh != info.charge_full_design_uah) {
1422 if (info.energy_full_design_uwh == -EINVAL)
1423 dev_warn(di->dev, "missing battery:energy-full-design-microwatt-hours\n");
1424 else if (info.charge_full_design_uah == -EINVAL)
1425 dev_warn(di->dev, "missing battery:charge-full-design-microamp-hours\n");
1426 }
1427
1428 /* assume min == 0 */
1429 max = di->dm_regs[BQ27XXX_DM_DESIGN_ENERGY].max;
1430 if (info.energy_full_design_uwh > max * 1000) {
1431 dev_err(di->dev, "invalid battery:energy-full-design-microwatt-hours %d\n",
1432 info.energy_full_design_uwh);
1433 info.energy_full_design_uwh = -EINVAL;
1434 }
1435
1436 /* assume min == 0 */
1437 max = di->dm_regs[BQ27XXX_DM_DESIGN_CAPACITY].max;
1438 if (info.charge_full_design_uah > max * 1000) {
1439 dev_err(di->dev, "invalid battery:charge-full-design-microamp-hours %d\n",
1440 info.charge_full_design_uah);
1441 info.charge_full_design_uah = -EINVAL;
1442 }
1443
1444 min = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].min;
1445 max = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].max;
1446 if ((info.voltage_min_design_uv < min * 1000 ||
1447 info.voltage_min_design_uv > max * 1000) &&
1448 info.voltage_min_design_uv != -EINVAL) {
1449 dev_err(di->dev, "invalid battery:voltage-min-design-microvolt %d\n",
1450 info.voltage_min_design_uv);
1451 info.voltage_min_design_uv = -EINVAL;
1452 }
1453
1454 if ((info.energy_full_design_uwh != -EINVAL &&
1455 info.charge_full_design_uah != -EINVAL) ||
1456 info.voltage_min_design_uv != -EINVAL)
1457 bq27xxx_battery_set_config(di, &info);
1458 }
1459
1460 /*
1461 * Return the battery State-of-Charge
1462 * Or < 0 if something fails.
1463 */
1464 static int bq27xxx_battery_read_soc(struct bq27xxx_device_info *di)
1465 {
1466 int soc;
1467
1468 if (di->opts & BQ27XXX_O_SOC_SI)
1469 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, true);
1470 else
1471 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, false);
1472
1473 if (soc < 0)
1474 dev_dbg(di->dev, "error reading State-of-Charge\n");
1475
1476 return soc;
1477 }
1478
1479 /*
1480 * Return a battery charge value in µAh
1481 * Or < 0 if something fails.
1482 */
1483 static int bq27xxx_battery_read_charge(struct bq27xxx_device_info *di, u8 reg)
1484 {
1485 int charge;
1486
1487 charge = bq27xxx_read(di, reg, false);
1488 if (charge < 0) {
1489 dev_dbg(di->dev, "error reading charge register %02x: %d\n",
1490 reg, charge);
1491 return charge;
1492 }
1493
1494 if (di->opts & BQ27XXX_O_ZERO)
1495 charge *= BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1496 else
1497 charge *= 1000;
1498
1499 return charge;
1500 }
1501
1502 /*
1503 * Return the battery Nominal available capacity in µAh
1504 * Or < 0 if something fails.
1505 */
1506 static inline int bq27xxx_battery_read_nac(struct bq27xxx_device_info *di)
1507 {
1508 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_NAC);
1509 }
1510
1511 /*
1512 * Return the battery Full Charge Capacity in µAh
1513 * Or < 0 if something fails.
1514 */
1515 static inline int bq27xxx_battery_read_fcc(struct bq27xxx_device_info *di)
1516 {
1517 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_FCC);
1518 }
1519
1520 /*
1521 * Return the Design Capacity in µAh
1522 * Or < 0 if something fails.
1523 */
1524 static int bq27xxx_battery_read_dcap(struct bq27xxx_device_info *di)
1525 {
1526 int dcap;
1527
1528 if (di->opts & BQ27XXX_O_ZERO)
1529 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, true);
1530 else
1531 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, false);
1532
1533 if (dcap < 0) {
1534 dev_dbg(di->dev, "error reading initial last measured discharge\n");
1535 return dcap;
1536 }
1537
1538 if (di->opts & BQ27XXX_O_ZERO)
1539 dcap = (dcap << 8) * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1540 else
1541 dcap *= 1000;
1542
1543 return dcap;
1544 }
1545
1546 /*
1547 * Return the battery Available energy in µWh
1548 * Or < 0 if something fails.
1549 */
1550 static int bq27xxx_battery_read_energy(struct bq27xxx_device_info *di)
1551 {
1552 int ae;
1553
1554 ae = bq27xxx_read(di, BQ27XXX_REG_AE, false);
1555 if (ae < 0) {
1556 dev_dbg(di->dev, "error reading available energy\n");
1557 return ae;
1558 }
1559
1560 if (di->opts & BQ27XXX_O_ZERO)
1561 ae *= BQ27XXX_POWER_CONSTANT / BQ27XXX_RS;
1562 else
1563 ae *= 1000;
1564
1565 return ae;
1566 }
1567
1568 /*
1569 * Return the battery temperature in tenths of degree Kelvin
1570 * Or < 0 if something fails.
1571 */
1572 static int bq27xxx_battery_read_temperature(struct bq27xxx_device_info *di)
1573 {
1574 int temp;
1575
1576 temp = bq27xxx_read(di, BQ27XXX_REG_TEMP, false);
1577 if (temp < 0) {
1578 dev_err(di->dev, "error reading temperature\n");
1579 return temp;
1580 }
1581
1582 if (di->opts & BQ27XXX_O_ZERO)
1583 temp = 5 * temp / 2;
1584
1585 return temp;
1586 }
1587
1588 /*
1589 * Return the battery Cycle count total
1590 * Or < 0 if something fails.
1591 */
1592 static int bq27xxx_battery_read_cyct(struct bq27xxx_device_info *di)
1593 {
1594 int cyct;
1595
1596 cyct = bq27xxx_read(di, BQ27XXX_REG_CYCT, false);
1597 if (cyct < 0)
1598 dev_err(di->dev, "error reading cycle count total\n");
1599
1600 return cyct;
1601 }
1602
1603 /*
1604 * Read a time register.
1605 * Return < 0 if something fails.
1606 */
1607 static int bq27xxx_battery_read_time(struct bq27xxx_device_info *di, u8 reg)
1608 {
1609 int tval;
1610
1611 tval = bq27xxx_read(di, reg, false);
1612 if (tval < 0) {
1613 dev_dbg(di->dev, "error reading time register %02x: %d\n",
1614 reg, tval);
1615 return tval;
1616 }
1617
1618 if (tval == 65535)
1619 return -ENODATA;
1620
1621 return tval * 60;
1622 }
1623
1624 /*
1625 * Returns true if a battery over temperature condition is detected
1626 */
1627 static bool bq27xxx_battery_overtemp(struct bq27xxx_device_info *di, u16 flags)
1628 {
1629 if (di->opts & BQ27XXX_O_OTDC)
1630 return flags & (BQ27XXX_FLAG_OTC | BQ27XXX_FLAG_OTD);
1631 if (di->opts & BQ27XXX_O_UTOT)
1632 return flags & BQ27XXX_FLAG_OT;
1633
1634 return false;
1635 }
1636
1637 /*
1638 * Returns true if a battery under temperature condition is detected
1639 */
1640 static bool bq27xxx_battery_undertemp(struct bq27xxx_device_info *di, u16 flags)
1641 {
1642 if (di->opts & BQ27XXX_O_UTOT)
1643 return flags & BQ27XXX_FLAG_UT;
1644
1645 return false;
1646 }
1647
1648 /*
1649 * Returns true if a low state of charge condition is detected
1650 */
1651 static bool bq27xxx_battery_dead(struct bq27xxx_device_info *di, u16 flags)
1652 {
1653 if (di->opts & BQ27XXX_O_ZERO)
1654 return flags & (BQ27000_FLAG_EDV1 | BQ27000_FLAG_EDVF);
1655 else if (di->opts & BQ27Z561_O_BITS)
1656 return flags & BQ27Z561_FLAG_FDC;
1657 else
1658 return flags & (BQ27XXX_FLAG_SOC1 | BQ27XXX_FLAG_SOCF);
1659 }
1660
1661 /*
1662 * Returns true if reported battery capacity is inaccurate
1663 */
1664 static bool bq27xxx_battery_capacity_inaccurate(struct bq27xxx_device_info *di,
1665 u16 flags)
1666 {
1667 if (di->opts & BQ27XXX_O_HAS_CI)
1668 return (flags & BQ27000_FLAG_CI);
1669 else
1670 return false;
1671 }
1672
1673 static int bq27xxx_battery_read_health(struct bq27xxx_device_info *di)
1674 {
1675 /* Unlikely but important to return first */
1676 if (unlikely(bq27xxx_battery_overtemp(di, di->cache.flags)))
1677 return POWER_SUPPLY_HEALTH_OVERHEAT;
1678 if (unlikely(bq27xxx_battery_undertemp(di, di->cache.flags)))
1679 return POWER_SUPPLY_HEALTH_COLD;
1680 if (unlikely(bq27xxx_battery_dead(di, di->cache.flags)))
1681 return POWER_SUPPLY_HEALTH_DEAD;
1682 if (unlikely(bq27xxx_battery_capacity_inaccurate(di, di->cache.flags)))
1683 return POWER_SUPPLY_HEALTH_CALIBRATION_REQUIRED;
1684
1685 return POWER_SUPPLY_HEALTH_GOOD;
1686 }
1687
1688 static bool bq27xxx_battery_is_full(struct bq27xxx_device_info *di, int flags)
1689 {
1690 if (di->opts & BQ27XXX_O_ZERO)
1691 return (flags & BQ27000_FLAG_FC);
1692 else if (di->opts & BQ27Z561_O_BITS)
1693 return (flags & BQ27Z561_FLAG_FC);
1694 else
1695 return (flags & BQ27XXX_FLAG_FC);
1696 }
1697
1698 /*
1699 * Return the battery average current in µA and the status
1700 * Note that current can be negative signed as well
1701 * Or 0 if something fails.
1702 */
1703 static int bq27xxx_battery_current_and_status(
1704 struct bq27xxx_device_info *di,
1705 union power_supply_propval *val_curr,
1706 union power_supply_propval *val_status,
1707 struct bq27xxx_reg_cache *cache)
1708 {
1709 bool single_flags = (di->opts & BQ27XXX_O_ZERO);
1710 int curr;
1711 int flags;
1712
1713 curr = bq27xxx_read(di, BQ27XXX_REG_AI, false);
1714 if (curr < 0) {
1715 dev_err(di->dev, "error reading current\n");
1716 return curr;
1717 }
1718
1719 if (cache) {
1720 flags = cache->flags;
1721 } else {
1722 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, single_flags);
1723 if (flags < 0) {
1724 dev_err(di->dev, "error reading flags\n");
1725 return flags;
1726 }
1727 }
1728
1729 if (di->opts & BQ27XXX_O_ZERO) {
1730 if (!(flags & BQ27000_FLAG_CHGS)) {
1731 dev_dbg(di->dev, "negative current!\n");
1732 curr = -curr;
1733 }
1734
1735 curr = curr * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1736 } else {
1737 /* Other gauges return signed value */
1738 curr = (int)((s16)curr) * 1000;
1739 }
1740
1741 if (val_curr)
1742 val_curr->intval = curr;
1743
1744 if (val_status) {
1745 if (curr > 0) {
1746 val_status->intval = POWER_SUPPLY_STATUS_CHARGING;
1747 } else if (curr < 0) {
1748 val_status->intval = POWER_SUPPLY_STATUS_DISCHARGING;
1749 } else {
1750 if (bq27xxx_battery_is_full(di, flags))
1751 val_status->intval = POWER_SUPPLY_STATUS_FULL;
1752 else
1753 val_status->intval =
1754 POWER_SUPPLY_STATUS_NOT_CHARGING;
1755 }
1756 }
1757
1758 return 0;
1759 }
1760
1761 static void bq27xxx_battery_update_unlocked(struct bq27xxx_device_info *di)
1762 {
1763 union power_supply_propval status = di->last_status;
1764 struct bq27xxx_reg_cache cache = {0, };
1765 bool has_singe_flag = di->opts & BQ27XXX_O_ZERO;
1766
1767 cache.flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag);
1768 if ((cache.flags & 0xff) == 0xff)
1769 cache.flags = -1; /* read error */
1770 if (cache.flags >= 0) {
1771 cache.temperature = bq27xxx_battery_read_temperature(di);
1772 if (di->regs[BQ27XXX_REG_TTE] != INVALID_REG_ADDR)
1773 cache.time_to_empty = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTE);
1774 if (di->regs[BQ27XXX_REG_TTECP] != INVALID_REG_ADDR)
1775 cache.time_to_empty_avg = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTECP);
1776 if (di->regs[BQ27XXX_REG_TTF] != INVALID_REG_ADDR)
1777 cache.time_to_full = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTF);
1778
1779 cache.charge_full = bq27xxx_battery_read_fcc(di);
1780 cache.capacity = bq27xxx_battery_read_soc(di);
1781 if (di->regs[BQ27XXX_REG_AE] != INVALID_REG_ADDR)
1782 cache.energy = bq27xxx_battery_read_energy(di);
1783 di->cache.flags = cache.flags;
1784 cache.health = bq27xxx_battery_read_health(di);
1785 if (di->regs[BQ27XXX_REG_CYCT] != INVALID_REG_ADDR)
1786 cache.cycle_count = bq27xxx_battery_read_cyct(di);
1787
1788 /*
1789 * On gauges with signed current reporting the current must be
1790 * checked to detect charging <-> discharging status changes.
1791 */
1792 if (!(di->opts & BQ27XXX_O_ZERO))
1793 bq27xxx_battery_current_and_status(di, NULL, &status, &cache);
1794
1795 /* We only have to read charge design full once */
1796 if (di->charge_design_full <= 0)
1797 di->charge_design_full = bq27xxx_battery_read_dcap(di);
1798 }
1799
1800 if ((di->cache.capacity != cache.capacity) ||
1801 (di->cache.flags != cache.flags) ||
1802 (di->last_status.intval != status.intval)) {
1803 di->last_status.intval = status.intval;
1804 power_supply_changed(di->bat);
1805 }
1806
1807 if (memcmp(&di->cache, &cache, sizeof(cache)) != 0)
1808 di->cache = cache;
1809
1810 di->last_update = jiffies;
1811
1812 if (!di->removed && poll_interval > 0)
1813 mod_delayed_work(system_wq, &di->work, poll_interval * HZ);
1814 }
1815
1816 void bq27xxx_battery_update(struct bq27xxx_device_info *di)
1817 {
1818 mutex_lock(&di->lock);
1819 bq27xxx_battery_update_unlocked(di);
1820 mutex_unlock(&di->lock);
1821 }
1822 EXPORT_SYMBOL_GPL(bq27xxx_battery_update);
1823
1824 static void bq27xxx_battery_poll(struct work_struct *work)
1825 {
1826 struct bq27xxx_device_info *di =
1827 container_of(work, struct bq27xxx_device_info,
1828 work.work);
1829
1830 bq27xxx_battery_update(di);
1831 }
1832
1833 /*
1834 * Get the average power in µW
1835 * Return < 0 if something fails.
1836 */
1837 static int bq27xxx_battery_pwr_avg(struct bq27xxx_device_info *di,
1838 union power_supply_propval *val)
1839 {
1840 int power;
1841
1842 power = bq27xxx_read(di, BQ27XXX_REG_AP, false);
1843 if (power < 0) {
1844 dev_err(di->dev,
1845 "error reading average power register %02x: %d\n",
1846 BQ27XXX_REG_AP, power);
1847 return power;
1848 }
1849
1850 if (di->opts & BQ27XXX_O_ZERO)
1851 val->intval = (power * BQ27XXX_POWER_CONSTANT) / BQ27XXX_RS;
1852 else
1853 /* Other gauges return a signed value in units of 10mW */
1854 val->intval = (int)((s16)power) * 10000;
1855
1856 return 0;
1857 }
1858
1859 static int bq27xxx_battery_capacity_level(struct bq27xxx_device_info *di,
1860 union power_supply_propval *val)
1861 {
1862 int level;
1863
1864 if (di->opts & BQ27XXX_O_ZERO) {
1865 if (di->cache.flags & BQ27000_FLAG_FC)
1866 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1867 else if (di->cache.flags & BQ27000_FLAG_EDV1)
1868 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1869 else if (di->cache.flags & BQ27000_FLAG_EDVF)
1870 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1871 else
1872 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1873 } else if (di->opts & BQ27Z561_O_BITS) {
1874 if (di->cache.flags & BQ27Z561_FLAG_FC)
1875 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1876 else if (di->cache.flags & BQ27Z561_FLAG_FDC)
1877 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1878 else
1879 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1880 } else {
1881 if (di->cache.flags & BQ27XXX_FLAG_FC)
1882 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1883 else if (di->cache.flags & BQ27XXX_FLAG_SOC1)
1884 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1885 else if (di->cache.flags & BQ27XXX_FLAG_SOCF)
1886 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1887 else
1888 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1889 }
1890
1891 val->intval = level;
1892
1893 return 0;
1894 }
1895
1896 /*
1897 * Return the battery Voltage in millivolts
1898 * Or < 0 if something fails.
1899 */
1900 static int bq27xxx_battery_voltage(struct bq27xxx_device_info *di,
1901 union power_supply_propval *val)
1902 {
1903 int volt;
1904
1905 volt = bq27xxx_read(di, BQ27XXX_REG_VOLT, false);
1906 if (volt < 0) {
1907 dev_err(di->dev, "error reading voltage\n");
1908 return volt;
1909 }
1910
1911 val->intval = volt * 1000;
1912
1913 return 0;
1914 }
1915
1916 static int bq27xxx_simple_value(int value,
1917 union power_supply_propval *val)
1918 {
1919 if (value < 0)
1920 return value;
1921
1922 val->intval = value;
1923
1924 return 0;
1925 }
1926
1927 static int bq27xxx_battery_get_property(struct power_supply *psy,
1928 enum power_supply_property psp,
1929 union power_supply_propval *val)
1930 {
1931 int ret = 0;
1932 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
1933
1934 mutex_lock(&di->lock);
1935 if (time_is_before_jiffies(di->last_update + 5 * HZ))
1936 bq27xxx_battery_update_unlocked(di);
1937 mutex_unlock(&di->lock);
1938
1939 if (psp != POWER_SUPPLY_PROP_PRESENT && di->cache.flags < 0)
1940 return -ENODEV;
1941
1942 switch (psp) {
1943 case POWER_SUPPLY_PROP_STATUS:
1944 ret = bq27xxx_battery_current_and_status(di, NULL, val, NULL);
1945 break;
1946 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
1947 ret = bq27xxx_battery_voltage(di, val);
1948 break;
1949 case POWER_SUPPLY_PROP_PRESENT:
1950 val->intval = di->cache.flags < 0 ? 0 : 1;
1951 break;
1952 case POWER_SUPPLY_PROP_CURRENT_NOW:
1953 ret = bq27xxx_battery_current_and_status(di, val, NULL, NULL);
1954 break;
1955 case POWER_SUPPLY_PROP_CAPACITY:
1956 ret = bq27xxx_simple_value(di->cache.capacity, val);
1957 break;
1958 case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
1959 ret = bq27xxx_battery_capacity_level(di, val);
1960 break;
1961 case POWER_SUPPLY_PROP_TEMP:
1962 ret = bq27xxx_simple_value(di->cache.temperature, val);
1963 if (ret == 0)
1964 val->intval -= 2731; /* convert decidegree k to c */
1965 break;
1966 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
1967 ret = bq27xxx_simple_value(di->cache.time_to_empty, val);
1968 break;
1969 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG:
1970 ret = bq27xxx_simple_value(di->cache.time_to_empty_avg, val);
1971 break;
1972 case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW:
1973 ret = bq27xxx_simple_value(di->cache.time_to_full, val);
1974 break;
1975 case POWER_SUPPLY_PROP_TECHNOLOGY:
1976 if (di->opts & BQ27XXX_O_MUL_CHEM)
1977 val->intval = POWER_SUPPLY_TECHNOLOGY_UNKNOWN;
1978 else
1979 val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
1980 break;
1981 case POWER_SUPPLY_PROP_CHARGE_NOW:
1982 ret = bq27xxx_simple_value(bq27xxx_battery_read_nac(di), val);
1983 break;
1984 case POWER_SUPPLY_PROP_CHARGE_FULL:
1985 ret = bq27xxx_simple_value(di->cache.charge_full, val);
1986 break;
1987 case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
1988 ret = bq27xxx_simple_value(di->charge_design_full, val);
1989 break;
1990 /*
1991 * TODO: Implement these to make registers set from
1992 * power_supply_battery_info visible in sysfs.
1993 */
1994 case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
1995 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
1996 return -EINVAL;
1997 case POWER_SUPPLY_PROP_CYCLE_COUNT:
1998 ret = bq27xxx_simple_value(di->cache.cycle_count, val);
1999 break;
2000 case POWER_SUPPLY_PROP_ENERGY_NOW:
2001 ret = bq27xxx_simple_value(di->cache.energy, val);
2002 break;
2003 case POWER_SUPPLY_PROP_POWER_AVG:
2004 ret = bq27xxx_battery_pwr_avg(di, val);
2005 break;
2006 case POWER_SUPPLY_PROP_HEALTH:
2007 ret = bq27xxx_simple_value(di->cache.health, val);
2008 break;
2009 case POWER_SUPPLY_PROP_MANUFACTURER:
2010 val->strval = BQ27XXX_MANUFACTURER;
2011 break;
2012 default:
2013 return -EINVAL;
2014 }
2015
2016 return ret;
2017 }
2018
2019 static void bq27xxx_external_power_changed(struct power_supply *psy)
2020 {
2021 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
2022
2023 /* After charger plug in/out wait 0.5s for things to stabilize */
2024 mod_delayed_work(system_wq, &di->work, HZ / 2);
2025 }
2026
2027 int bq27xxx_battery_setup(struct bq27xxx_device_info *di)
2028 {
2029 struct power_supply_desc *psy_desc;
2030 struct power_supply_config psy_cfg = {
2031 .of_node = di->dev->of_node,
2032 .drv_data = di,
2033 };
2034
2035 INIT_DELAYED_WORK(&di->work, bq27xxx_battery_poll);
2036 mutex_init(&di->lock);
2037
2038 di->regs = bq27xxx_chip_data[di->chip].regs;
2039 di->unseal_key = bq27xxx_chip_data[di->chip].unseal_key;
2040 di->dm_regs = bq27xxx_chip_data[di->chip].dm_regs;
2041 di->opts = bq27xxx_chip_data[di->chip].opts;
2042
2043 psy_desc = devm_kzalloc(di->dev, sizeof(*psy_desc), GFP_KERNEL);
2044 if (!psy_desc)
2045 return -ENOMEM;
2046
2047 psy_desc->name = di->name;
2048 psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
2049 psy_desc->properties = bq27xxx_chip_data[di->chip].props;
2050 psy_desc->num_properties = bq27xxx_chip_data[di->chip].props_size;
2051 psy_desc->get_property = bq27xxx_battery_get_property;
2052 psy_desc->external_power_changed = bq27xxx_external_power_changed;
2053
2054 di->bat = power_supply_register_no_ws(di->dev, psy_desc, &psy_cfg);
2055 if (IS_ERR(di->bat))
2056 return dev_err_probe(di->dev, PTR_ERR(di->bat),
2057 "failed to register battery\n");
2058
2059 bq27xxx_battery_settings(di);
2060 bq27xxx_battery_update(di);
2061
2062 mutex_lock(&bq27xxx_list_lock);
2063 list_add(&di->list, &bq27xxx_battery_devices);
2064 mutex_unlock(&bq27xxx_list_lock);
2065
2066 return 0;
2067 }
2068 EXPORT_SYMBOL_GPL(bq27xxx_battery_setup);
2069
2070 void bq27xxx_battery_teardown(struct bq27xxx_device_info *di)
2071 {
2072 mutex_lock(&bq27xxx_list_lock);
2073 list_del(&di->list);
2074 mutex_unlock(&bq27xxx_list_lock);
2075
2076 /* Set removed to avoid bq27xxx_battery_update() re-queuing the work */
2077 mutex_lock(&di->lock);
2078 di->removed = true;
2079 mutex_unlock(&di->lock);
2080
2081 cancel_delayed_work_sync(&di->work);
2082
2083 power_supply_unregister(di->bat);
2084 mutex_destroy(&di->lock);
2085 }
2086 EXPORT_SYMBOL_GPL(bq27xxx_battery_teardown);
2087
2088 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
2089 MODULE_DESCRIPTION("BQ27xxx battery monitor driver");
2090 MODULE_LICENSE("GPL");
2091