1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (C) 2018 Cadence Design Systems Inc.
4 *
5 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6 */
7
8 #ifndef I3C_MASTER_H
9 #define I3C_MASTER_H
10
11 #include <asm/bitsperlong.h>
12
13 #include <linux/bitops.h>
14 #include <linux/i2c.h>
15 #include <linux/i3c/ccc.h>
16 #include <linux/i3c/device.h>
17 #include <linux/rwsem.h>
18 #include <linux/spinlock.h>
19 #include <linux/workqueue.h>
20
21 #define I3C_HOT_JOIN_ADDR 0x2
22 #define I3C_BROADCAST_ADDR 0x7e
23 #define I3C_MAX_ADDR GENMASK(6, 0)
24
25 struct i2c_client;
26
27 struct i3c_master_controller;
28 struct i3c_bus;
29 struct i3c_device;
30
31 /**
32 * struct i3c_i2c_dev_desc - Common part of the I3C/I2C device descriptor
33 * @node: node element used to insert the slot into the I2C or I3C device
34 * list
35 * @master: I3C master that instantiated this device. Will be used to do
36 * I2C/I3C transfers
37 * @master_priv: master private data assigned to the device. Can be used to
38 * add master specific information
39 *
40 * This structure is describing common I3C/I2C dev information.
41 */
42 struct i3c_i2c_dev_desc {
43 struct list_head node;
44 struct i3c_master_controller *master;
45 void *master_priv;
46 };
47
48 #define I3C_LVR_I2C_INDEX_MASK GENMASK(7, 5)
49 #define I3C_LVR_I2C_INDEX(x) ((x) << 5)
50 #define I3C_LVR_I2C_FM_MODE BIT(4)
51
52 #define I2C_MAX_ADDR GENMASK(6, 0)
53
54 /**
55 * struct i2c_dev_boardinfo - I2C device board information
56 * @node: used to insert the boardinfo object in the I2C boardinfo list
57 * @base: regular I2C board information
58 * @lvr: LVR (Legacy Virtual Register) needed by the I3C core to know about
59 * the I2C device limitations
60 *
61 * This structure is used to attach board-level information to an I2C device.
62 * Each I2C device connected on the I3C bus should have one.
63 */
64 struct i2c_dev_boardinfo {
65 struct list_head node;
66 struct i2c_board_info base;
67 u8 lvr;
68 };
69
70 /**
71 * struct i2c_dev_desc - I2C device descriptor
72 * @common: common part of the I2C device descriptor
73 * @boardinfo: pointer to the boardinfo attached to this I2C device
74 * @dev: I2C device object registered to the I2C framework
75 * @addr: I2C device address
76 * @lvr: LVR (Legacy Virtual Register) needed by the I3C core to know about
77 * the I2C device limitations
78 *
79 * Each I2C device connected on the bus will have an i2c_dev_desc.
80 * This object is created by the core and later attached to the controller
81 * using &struct_i3c_master_controller->ops->attach_i2c_dev().
82 *
83 * &struct_i2c_dev_desc is the internal representation of an I2C device
84 * connected on an I3C bus. This object is also passed to all
85 * &struct_i3c_master_controller_ops hooks.
86 */
87 struct i2c_dev_desc {
88 struct i3c_i2c_dev_desc common;
89 struct i2c_client *dev;
90 u16 addr;
91 u8 lvr;
92 };
93
94 /**
95 * struct i3c_ibi_slot - I3C IBI (In-Band Interrupt) slot
96 * @work: work associated to this slot. The IBI handler will be called from
97 * there
98 * @dev: the I3C device that has generated this IBI
99 * @len: length of the payload associated to this IBI
100 * @data: payload buffer
101 *
102 * An IBI slot is an object pre-allocated by the controller and used when an
103 * IBI comes in.
104 * Every time an IBI comes in, the I3C master driver should find a free IBI
105 * slot in its IBI slot pool, retrieve the IBI payload and queue the IBI using
106 * i3c_master_queue_ibi().
107 *
108 * How IBI slots are allocated is left to the I3C master driver, though, for
109 * simple kmalloc-based allocation, the generic IBI slot pool can be used.
110 */
111 struct i3c_ibi_slot {
112 struct work_struct work;
113 struct i3c_dev_desc *dev;
114 unsigned int len;
115 void *data;
116 };
117
118 /**
119 * struct i3c_device_ibi_info - IBI information attached to a specific device
120 * @all_ibis_handled: used to be informed when no more IBIs are waiting to be
121 * processed. Used by i3c_device_disable_ibi() to wait for
122 * all IBIs to be dequeued
123 * @pending_ibis: count the number of pending IBIs. Each pending IBI has its
124 * work element queued to the controller workqueue
125 * @max_payload_len: maximum payload length for an IBI coming from this device.
126 * this value is specified when calling
127 * i3c_device_request_ibi() and should not change at run
128 * time. All messages IBIs exceeding this limit should be
129 * rejected by the master
130 * @num_slots: number of IBI slots reserved for this device
131 * @enabled: reflect the IBI status
132 * @handler: IBI handler specified at i3c_device_request_ibi() call time. This
133 * handler will be called from the controller workqueue, and as such
134 * is allowed to sleep (though it is recommended to process the IBI
135 * as fast as possible to not stall processing of other IBIs queued
136 * on the same workqueue).
137 * New I3C messages can be sent from the IBI handler
138 *
139 * The &struct_i3c_device_ibi_info object is allocated when
140 * i3c_device_request_ibi() is called and attached to a specific device. This
141 * object is here to manage IBIs coming from a specific I3C device.
142 *
143 * Note that this structure is the generic view of the IBI management
144 * infrastructure. I3C master drivers may have their own internal
145 * representation which they can associate to the device using
146 * controller-private data.
147 */
148 struct i3c_device_ibi_info {
149 struct completion all_ibis_handled;
150 atomic_t pending_ibis;
151 unsigned int max_payload_len;
152 unsigned int num_slots;
153 unsigned int enabled;
154 void (*handler)(struct i3c_device *dev,
155 const struct i3c_ibi_payload *payload);
156 };
157
158 /**
159 * struct i3c_dev_boardinfo - I3C device board information
160 * @node: used to insert the boardinfo object in the I3C boardinfo list
161 * @init_dyn_addr: initial dynamic address requested by the FW. We provide no
162 * guarantee that the device will end up using this address,
163 * but try our best to assign this specific address to the
164 * device
165 * @static_addr: static address the I3C device listen on before it's been
166 * assigned a dynamic address by the master. Will be used during
167 * bus initialization to assign it a specific dynamic address
168 * before starting DAA (Dynamic Address Assignment)
169 * @pid: I3C Provisional ID exposed by the device. This is a unique identifier
170 * that may be used to attach boardinfo to i3c_dev_desc when the device
171 * does not have a static address
172 * @of_node: optional DT node in case the device has been described in the DT
173 *
174 * This structure is used to attach board-level information to an I3C device.
175 * Not all I3C devices connected on the bus will have a boardinfo. It's only
176 * needed if you want to attach extra resources to a device or assign it a
177 * specific dynamic address.
178 */
179 struct i3c_dev_boardinfo {
180 struct list_head node;
181 u8 init_dyn_addr;
182 u8 static_addr;
183 u64 pid;
184 struct device_node *of_node;
185 };
186
187 /**
188 * struct i3c_dev_desc - I3C device descriptor
189 * @common: common part of the I3C device descriptor
190 * @info: I3C device information. Will be automatically filled when you create
191 * your device with i3c_master_add_i3c_dev_locked()
192 * @ibi_lock: lock used to protect the &struct_i3c_device->ibi
193 * @ibi: IBI info attached to a device. Should be NULL until
194 * i3c_device_request_ibi() is called
195 * @dev: pointer to the I3C device object exposed to I3C device drivers. This
196 * should never be accessed from I3C master controller drivers. Only core
197 * code should manipulate it in when updating the dev <-> desc link or
198 * when propagating IBI events to the driver
199 * @boardinfo: pointer to the boardinfo attached to this I3C device
200 *
201 * Internal representation of an I3C device. This object is only used by the
202 * core and passed to I3C master controller drivers when they're requested to
203 * do some operations on the device.
204 * The core maintains the link between the internal I3C dev descriptor and the
205 * object exposed to the I3C device drivers (&struct_i3c_device).
206 */
207 struct i3c_dev_desc {
208 struct i3c_i2c_dev_desc common;
209 struct i3c_device_info info;
210 struct mutex ibi_lock;
211 struct i3c_device_ibi_info *ibi;
212 struct i3c_device *dev;
213 const struct i3c_dev_boardinfo *boardinfo;
214 };
215
216 /**
217 * struct i3c_device - I3C device object
218 * @dev: device object to register the I3C dev to the device model
219 * @desc: pointer to an i3c device descriptor object. This link is updated
220 * every time the I3C device is rediscovered with a different dynamic
221 * address assigned
222 * @bus: I3C bus this device is attached to
223 *
224 * I3C device object exposed to I3C device drivers. The takes care of linking
225 * this object to the relevant &struct_i3c_dev_desc one.
226 * All I3C devs on the I3C bus are represented, including I3C masters. For each
227 * of them, we have an instance of &struct i3c_device.
228 */
229 struct i3c_device {
230 struct device dev;
231 struct i3c_dev_desc *desc;
232 struct i3c_bus *bus;
233 };
234
235 /*
236 * The I3C specification says the maximum number of devices connected on the
237 * bus is 11, but this number depends on external parameters like trace length,
238 * capacitive load per Device, and the types of Devices present on the Bus.
239 * I3C master can also have limitations, so this number is just here as a
240 * reference and should be adjusted on a per-controller/per-board basis.
241 */
242 #define I3C_BUS_MAX_DEVS 11
243
244 #define I3C_BUS_MAX_I3C_SCL_RATE 12900000
245 #define I3C_BUS_TYP_I3C_SCL_RATE 12500000
246 #define I3C_BUS_I2C_FM_PLUS_SCL_RATE 1000000
247 #define I3C_BUS_I2C_FM_SCL_RATE 400000
248 #define I3C_BUS_TLOW_OD_MIN_NS 200
249
250 /**
251 * enum i3c_bus_mode - I3C bus mode
252 * @I3C_BUS_MODE_PURE: only I3C devices are connected to the bus. No limitation
253 * expected
254 * @I3C_BUS_MODE_MIXED_FAST: I2C devices with 50ns spike filter are present on
255 * the bus. The only impact in this mode is that the
256 * high SCL pulse has to stay below 50ns to trick I2C
257 * devices when transmitting I3C frames
258 * @I3C_BUS_MODE_MIXED_LIMITED: I2C devices without 50ns spike filter are
259 * present on the bus. However they allow
260 * compliance up to the maximum SDR SCL clock
261 * frequency.
262 * @I3C_BUS_MODE_MIXED_SLOW: I2C devices without 50ns spike filter are present
263 * on the bus
264 */
265 enum i3c_bus_mode {
266 I3C_BUS_MODE_PURE,
267 I3C_BUS_MODE_MIXED_FAST,
268 I3C_BUS_MODE_MIXED_LIMITED,
269 I3C_BUS_MODE_MIXED_SLOW,
270 };
271
272 /**
273 * enum i3c_open_drain_speed - I3C open-drain speed
274 * @I3C_OPEN_DRAIN_SLOW_SPEED: Slow open-drain speed for sending the first
275 * broadcast address. The first broadcast address at this speed
276 * will be visible to all devices on the I3C bus. I3C devices
277 * working in I2C mode will turn off their spike filter when
278 * switching into I3C mode.
279 * @I3C_OPEN_DRAIN_NORMAL_SPEED: Normal open-drain speed in I3C bus mode.
280 */
281 enum i3c_open_drain_speed {
282 I3C_OPEN_DRAIN_SLOW_SPEED,
283 I3C_OPEN_DRAIN_NORMAL_SPEED,
284 };
285
286 /**
287 * enum i3c_addr_slot_status - I3C address slot status
288 * @I3C_ADDR_SLOT_FREE: address is free
289 * @I3C_ADDR_SLOT_RSVD: address is reserved
290 * @I3C_ADDR_SLOT_I2C_DEV: address is assigned to an I2C device
291 * @I3C_ADDR_SLOT_I3C_DEV: address is assigned to an I3C device
292 * @I3C_ADDR_SLOT_STATUS_MASK: address slot mask
293 * @I3C_ADDR_SLOT_EXT_DESIRED: the bitmask represents addresses that are preferred by some devices,
294 * such as the "assigned-address" property in a device tree source.
295 * On an I3C bus, addresses are assigned dynamically, and we need to know which
296 * addresses are free to use and which ones are already assigned.
297 *
298 * Addresses marked as reserved are those reserved by the I3C protocol
299 * (broadcast address, ...).
300 */
301 enum i3c_addr_slot_status {
302 I3C_ADDR_SLOT_FREE,
303 I3C_ADDR_SLOT_RSVD,
304 I3C_ADDR_SLOT_I2C_DEV,
305 I3C_ADDR_SLOT_I3C_DEV,
306 I3C_ADDR_SLOT_STATUS_MASK = 3,
307 I3C_ADDR_SLOT_EXT_STATUS_MASK = 7,
308 I3C_ADDR_SLOT_EXT_DESIRED = BIT(2),
309 };
310
311 #define I3C_ADDR_SLOT_STATUS_BITS 4
312
313 /**
314 * struct i3c_bus - I3C bus object
315 * @cur_master: I3C master currently driving the bus. Since I3C is multi-master
316 * this can change over the time. Will be used to let a master
317 * know whether it needs to request bus ownership before sending
318 * a frame or not
319 * @id: bus ID. Assigned by the framework when register the bus
320 * @addrslots: a bitmap with 2-bits per-slot to encode the address status and
321 * ease the DAA (Dynamic Address Assignment) procedure (see
322 * &enum i3c_addr_slot_status)
323 * @mode: bus mode (see &enum i3c_bus_mode)
324 * @scl_rate.i3c: maximum rate for the clock signal when doing I3C SDR/priv
325 * transfers
326 * @scl_rate.i2c: maximum rate for the clock signal when doing I2C transfers
327 * @scl_rate: SCL signal rate for I3C and I2C mode
328 * @devs.i3c: contains a list of I3C device descriptors representing I3C
329 * devices connected on the bus and successfully attached to the
330 * I3C master
331 * @devs.i2c: contains a list of I2C device descriptors representing I2C
332 * devices connected on the bus and successfully attached to the
333 * I3C master
334 * @devs: 2 lists containing all I3C/I2C devices connected to the bus
335 * @lock: read/write lock on the bus. This is needed to protect against
336 * operations that have an impact on the whole bus and the devices
337 * connected to it. For example, when asking slaves to drop their
338 * dynamic address (RSTDAA CCC), we need to make sure no one is trying
339 * to send I3C frames to these devices.
340 * Note that this lock does not protect against concurrency between
341 * devices: several drivers can send different I3C/I2C frames through
342 * the same master in parallel. This is the responsibility of the
343 * master to guarantee that frames are actually sent sequentially and
344 * not interlaced
345 *
346 * The I3C bus is represented with its own object and not implicitly described
347 * by the I3C master to cope with the multi-master functionality, where one bus
348 * can be shared amongst several masters, each of them requesting bus ownership
349 * when they need to.
350 */
351 struct i3c_bus {
352 struct i3c_dev_desc *cur_master;
353 int id;
354 unsigned long addrslots[((I2C_MAX_ADDR + 1) * I3C_ADDR_SLOT_STATUS_BITS) / BITS_PER_LONG];
355 enum i3c_bus_mode mode;
356 struct {
357 unsigned long i3c;
358 unsigned long i2c;
359 } scl_rate;
360 struct {
361 struct list_head i3c;
362 struct list_head i2c;
363 } devs;
364 struct rw_semaphore lock;
365 };
366
367 /**
368 * struct i3c_master_controller_ops - I3C master methods
369 * @bus_init: hook responsible for the I3C bus initialization. You should at
370 * least call master_set_info() from there and set the bus mode.
371 * You can also put controller specific initialization in there.
372 * This method is mandatory.
373 * @bus_cleanup: cleanup everything done in
374 * &i3c_master_controller_ops->bus_init().
375 * This method is optional.
376 * @attach_i3c_dev: called every time an I3C device is attached to the bus. It
377 * can be after a DAA or when a device is statically declared
378 * by the FW, in which case it will only have a static address
379 * and the dynamic address will be 0.
380 * When this function is called, device information have not
381 * been retrieved yet.
382 * This is a good place to attach master controller specific
383 * data to I3C devices.
384 * This method is optional.
385 * @reattach_i3c_dev: called every time an I3C device has its addressed
386 * changed. It can be because the device has been powered
387 * down and has lost its address, or it can happen when a
388 * device had a static address and has been assigned a
389 * dynamic address with SETDASA.
390 * This method is optional.
391 * @detach_i3c_dev: called when an I3C device is detached from the bus. Usually
392 * happens when the master device is unregistered.
393 * This method is optional.
394 * @do_daa: do a DAA (Dynamic Address Assignment) procedure. This is procedure
395 * should send an ENTDAA CCC command and then add all devices
396 * discovered sure the DAA using i3c_master_add_i3c_dev_locked().
397 * Add devices added with i3c_master_add_i3c_dev_locked() will then be
398 * attached or re-attached to the controller.
399 * This method is mandatory.
400 * @supports_ccc_cmd: should return true if the CCC command is supported, false
401 * otherwise.
402 * This method is optional, if not provided the core assumes
403 * all CCC commands are supported.
404 * @send_ccc_cmd: send a CCC command
405 * This method is mandatory.
406 * @priv_xfers: do one or several private I3C SDR transfers
407 * This method is mandatory.
408 * @attach_i2c_dev: called every time an I2C device is attached to the bus.
409 * This is a good place to attach master controller specific
410 * data to I2C devices.
411 * This method is optional.
412 * @detach_i2c_dev: called when an I2C device is detached from the bus. Usually
413 * happens when the master device is unregistered.
414 * This method is optional.
415 * @i2c_xfers: do one or several I2C transfers. Note that, unlike i3c
416 * transfers, the core does not guarantee that buffers attached to
417 * the transfers are DMA-safe. If drivers want to have DMA-safe
418 * buffers, they should use the i2c_get_dma_safe_msg_buf()
419 * and i2c_put_dma_safe_msg_buf() helpers provided by the I2C
420 * framework.
421 * This method is mandatory.
422 * @request_ibi: attach an IBI handler to an I3C device. This implies defining
423 * an IBI handler and the constraints of the IBI (maximum payload
424 * length and number of pre-allocated slots).
425 * Some controllers support less IBI-capable devices than regular
426 * devices, so this method might return -%EBUSY if there's no
427 * more space for an extra IBI registration
428 * This method is optional.
429 * @free_ibi: free an IBI previously requested with ->request_ibi(). The IBI
430 * should have been disabled with ->disable_irq() prior to that
431 * This method is mandatory only if ->request_ibi is not NULL.
432 * @enable_ibi: enable the IBI. Only valid if ->request_ibi() has been called
433 * prior to ->enable_ibi(). The controller should first enable
434 * the IBI on the controller end (for example, unmask the hardware
435 * IRQ) and then send the ENEC CCC command (with the IBI flag set)
436 * to the I3C device.
437 * This method is mandatory only if ->request_ibi is not NULL.
438 * @disable_ibi: disable an IBI. First send the DISEC CCC command with the IBI
439 * flag set and then deactivate the hardware IRQ on the
440 * controller end.
441 * This method is mandatory only if ->request_ibi is not NULL.
442 * @recycle_ibi_slot: recycle an IBI slot. Called every time an IBI has been
443 * processed by its handler. The IBI slot should be put back
444 * in the IBI slot pool so that the controller can re-use it
445 * for a future IBI
446 * This method is mandatory only if ->request_ibi is not
447 * NULL.
448 * @enable_hotjoin: enable hot join event detect.
449 * @disable_hotjoin: disable hot join event detect.
450 * @set_speed: adjust I3C open drain mode timing.
451 */
452 struct i3c_master_controller_ops {
453 int (*bus_init)(struct i3c_master_controller *master);
454 void (*bus_cleanup)(struct i3c_master_controller *master);
455 int (*attach_i3c_dev)(struct i3c_dev_desc *dev);
456 int (*reattach_i3c_dev)(struct i3c_dev_desc *dev, u8 old_dyn_addr);
457 void (*detach_i3c_dev)(struct i3c_dev_desc *dev);
458 int (*do_daa)(struct i3c_master_controller *master);
459 bool (*supports_ccc_cmd)(struct i3c_master_controller *master,
460 const struct i3c_ccc_cmd *cmd);
461 int (*send_ccc_cmd)(struct i3c_master_controller *master,
462 struct i3c_ccc_cmd *cmd);
463 int (*priv_xfers)(struct i3c_dev_desc *dev,
464 struct i3c_priv_xfer *xfers,
465 int nxfers);
466 int (*attach_i2c_dev)(struct i2c_dev_desc *dev);
467 void (*detach_i2c_dev)(struct i2c_dev_desc *dev);
468 int (*i2c_xfers)(struct i2c_dev_desc *dev,
469 const struct i2c_msg *xfers, int nxfers);
470 int (*request_ibi)(struct i3c_dev_desc *dev,
471 const struct i3c_ibi_setup *req);
472 void (*free_ibi)(struct i3c_dev_desc *dev);
473 int (*enable_ibi)(struct i3c_dev_desc *dev);
474 int (*disable_ibi)(struct i3c_dev_desc *dev);
475 void (*recycle_ibi_slot)(struct i3c_dev_desc *dev,
476 struct i3c_ibi_slot *slot);
477 int (*enable_hotjoin)(struct i3c_master_controller *master);
478 int (*disable_hotjoin)(struct i3c_master_controller *master);
479 int (*set_speed)(struct i3c_master_controller *master, enum i3c_open_drain_speed speed);
480 };
481
482 /**
483 * struct i3c_master_controller - I3C master controller object
484 * @dev: device to be registered to the device-model
485 * @this: an I3C device object representing this master. This device will be
486 * added to the list of I3C devs available on the bus
487 * @i2c: I2C adapter used for backward compatibility. This adapter is
488 * registered to the I2C subsystem to be as transparent as possible to
489 * existing I2C drivers
490 * @ops: master operations. See &struct i3c_master_controller_ops
491 * @secondary: true if the master is a secondary master
492 * @init_done: true when the bus initialization is done
493 * @hotjoin: true if the master support hotjoin
494 * @boardinfo.i3c: list of I3C boardinfo objects
495 * @boardinfo.i2c: list of I2C boardinfo objects
496 * @boardinfo: board-level information attached to devices connected on the bus
497 * @bus: I3C bus exposed by this master
498 * @wq: workqueue used to execute IBI handlers. Can also be used by master
499 * drivers if they need to postpone operations that need to take place
500 * in a thread context. Typical examples are Hot Join processing which
501 * requires taking the bus lock in maintenance, which in turn, can only
502 * be done from a sleep-able context
503 *
504 * A &struct i3c_master_controller has to be registered to the I3C subsystem
505 * through i3c_master_register(). None of &struct i3c_master_controller fields
506 * should be set manually, just pass appropriate values to
507 * i3c_master_register().
508 */
509 struct i3c_master_controller {
510 struct device dev;
511 struct i3c_dev_desc *this;
512 struct i2c_adapter i2c;
513 const struct i3c_master_controller_ops *ops;
514 unsigned int secondary : 1;
515 unsigned int init_done : 1;
516 unsigned int hotjoin: 1;
517 struct {
518 struct list_head i3c;
519 struct list_head i2c;
520 } boardinfo;
521 struct i3c_bus bus;
522 struct workqueue_struct *wq;
523 };
524
525 /**
526 * i3c_bus_for_each_i2cdev() - iterate over all I2C devices present on the bus
527 * @bus: the I3C bus
528 * @dev: an I2C device descriptor pointer updated to point to the current slot
529 * at each iteration of the loop
530 *
531 * Iterate over all I2C devs present on the bus.
532 */
533 #define i3c_bus_for_each_i2cdev(bus, dev) \
534 list_for_each_entry(dev, &(bus)->devs.i2c, common.node)
535
536 /**
537 * i3c_bus_for_each_i3cdev() - iterate over all I3C devices present on the bus
538 * @bus: the I3C bus
539 * @dev: and I3C device descriptor pointer updated to point to the current slot
540 * at each iteration of the loop
541 *
542 * Iterate over all I3C devs present on the bus.
543 */
544 #define i3c_bus_for_each_i3cdev(bus, dev) \
545 list_for_each_entry(dev, &(bus)->devs.i3c, common.node)
546
547 int i3c_master_do_i2c_xfers(struct i3c_master_controller *master,
548 const struct i2c_msg *xfers,
549 int nxfers);
550
551 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
552 u8 evts);
553 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
554 u8 evts);
555 int i3c_master_entdaa_locked(struct i3c_master_controller *master);
556 int i3c_master_defslvs_locked(struct i3c_master_controller *master);
557
558 int i3c_master_get_free_addr(struct i3c_master_controller *master,
559 u8 start_addr);
560
561 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
562 u8 addr);
563 int i3c_master_do_daa(struct i3c_master_controller *master);
564
565 int i3c_master_set_info(struct i3c_master_controller *master,
566 const struct i3c_device_info *info);
567
568 int i3c_master_register(struct i3c_master_controller *master,
569 struct device *parent,
570 const struct i3c_master_controller_ops *ops,
571 bool secondary);
572 void i3c_master_unregister(struct i3c_master_controller *master);
573 int i3c_master_enable_hotjoin(struct i3c_master_controller *master);
574 int i3c_master_disable_hotjoin(struct i3c_master_controller *master);
575
576 /**
577 * i3c_dev_get_master_data() - get master private data attached to an I3C
578 * device descriptor
579 * @dev: the I3C device descriptor to get private data from
580 *
581 * Return: the private data previously attached with i3c_dev_set_master_data()
582 * or NULL if no data has been attached to the device.
583 */
i3c_dev_get_master_data(const struct i3c_dev_desc * dev)584 static inline void *i3c_dev_get_master_data(const struct i3c_dev_desc *dev)
585 {
586 return dev->common.master_priv;
587 }
588
589 /**
590 * i3c_dev_set_master_data() - attach master private data to an I3C device
591 * descriptor
592 * @dev: the I3C device descriptor to attach private data to
593 * @data: private data
594 *
595 * This functions allows a master controller to attach per-device private data
596 * which can then be retrieved with i3c_dev_get_master_data().
597 */
i3c_dev_set_master_data(struct i3c_dev_desc * dev,void * data)598 static inline void i3c_dev_set_master_data(struct i3c_dev_desc *dev,
599 void *data)
600 {
601 dev->common.master_priv = data;
602 }
603
604 /**
605 * i2c_dev_get_master_data() - get master private data attached to an I2C
606 * device descriptor
607 * @dev: the I2C device descriptor to get private data from
608 *
609 * Return: the private data previously attached with i2c_dev_set_master_data()
610 * or NULL if no data has been attached to the device.
611 */
i2c_dev_get_master_data(const struct i2c_dev_desc * dev)612 static inline void *i2c_dev_get_master_data(const struct i2c_dev_desc *dev)
613 {
614 return dev->common.master_priv;
615 }
616
617 /**
618 * i2c_dev_set_master_data() - attach master private data to an I2C device
619 * descriptor
620 * @dev: the I2C device descriptor to attach private data to
621 * @data: private data
622 *
623 * This functions allows a master controller to attach per-device private data
624 * which can then be retrieved with i2c_device_get_master_data().
625 */
i2c_dev_set_master_data(struct i2c_dev_desc * dev,void * data)626 static inline void i2c_dev_set_master_data(struct i2c_dev_desc *dev,
627 void *data)
628 {
629 dev->common.master_priv = data;
630 }
631
632 /**
633 * i3c_dev_get_master() - get master used to communicate with a device
634 * @dev: I3C dev
635 *
636 * Return: the master controller driving @dev
637 */
638 static inline struct i3c_master_controller *
i3c_dev_get_master(struct i3c_dev_desc * dev)639 i3c_dev_get_master(struct i3c_dev_desc *dev)
640 {
641 return dev->common.master;
642 }
643
644 /**
645 * i2c_dev_get_master() - get master used to communicate with a device
646 * @dev: I2C dev
647 *
648 * Return: the master controller driving @dev
649 */
650 static inline struct i3c_master_controller *
i2c_dev_get_master(struct i2c_dev_desc * dev)651 i2c_dev_get_master(struct i2c_dev_desc *dev)
652 {
653 return dev->common.master;
654 }
655
656 /**
657 * i3c_master_get_bus() - get the bus attached to a master
658 * @master: master object
659 *
660 * Return: the I3C bus @master is connected to
661 */
662 static inline struct i3c_bus *
i3c_master_get_bus(struct i3c_master_controller * master)663 i3c_master_get_bus(struct i3c_master_controller *master)
664 {
665 return &master->bus;
666 }
667
668 struct i3c_generic_ibi_pool;
669
670 struct i3c_generic_ibi_pool *
671 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
672 const struct i3c_ibi_setup *req);
673 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool);
674
675 struct i3c_ibi_slot *
676 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool);
677 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
678 struct i3c_ibi_slot *slot);
679
680 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot);
681
682 struct i3c_ibi_slot *i3c_master_get_free_ibi_slot(struct i3c_dev_desc *dev);
683
684 #endif /* I3C_MASTER_H */
685