1 /*
2 * Copyright (c) 2022-2022 Huawei Technologies Co., Ltd. All rights reserved.
3 *
4 * UniProton is licensed under Mulan PSL v2.
5 * You can use this software according to the terms and conditions of the Mulan PSL v2.
6 * You may obtain a copy of Mulan PSL v2 at:
7 * http://license.coscl.org.cn/MulanPSL2
8 * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
9 * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
10 * See the Mulan PSL v2 for more details.
11 * Create: 2022-12-05
12 * Description: openamp configuration
13 */
14
15 #ifndef COMMON_H__
16 #define COMMON_H__
17
18 #include "cpu_config.h"
19 #include "test.h"
20
21 #define VDEV_START_ADDR MMU_OPENAMP_ADDR
22 #define VDEV_SIZE 0x30000
23
24 #define VDEV_STATUS_ADDR VDEV_START_ADDR
25 #define VDEV_STATUS_SIZE 0x4000
26
27 #define SHM_START_ADDR (VDEV_START_ADDR + VDEV_STATUS_SIZE)
28 #define SHM_SIZE (VDEV_SIZE - VDEV_STATUS_SIZE)
29 #define SHM_DEVICE_NAME "lonely_device"
30
31 #define VRING_COUNT 2
32 #define VRING_RX_ADDRESS (VDEV_START_ADDR + SHM_SIZE - VDEV_STATUS_SIZE)
33 #define VRING_TX_ADDRESS (VDEV_START_ADDR + SHM_SIZE)
34 #define VRING_ALIGNMENT 4
35 #define VRING_SIZE 16
36
37 #define CONFIG_RPMSG_SERVICE_NUM_ENDPOINTS 1
38
39 #define DEFAULT_PAGE_SHIFT 0xffffffffffffffffULL
40 #define DEFAULT_PAGE_MASK 0xffffffffffffffffULL
41
42 #define VIRTQUEUE_ID 1
43 #define RPMSG_ROLE RPMSG_REMOTE
44
45 #define OS_OPENAMP_NOTIFY_HWI_NUM OS_HWI_IPI_NO_07
46 #define OS_OPENAMP_NOTIFY_HWI_PRIO 0
47
48 #define BIT(n) (1 << (n))
49
sys_write32(uint32_t data,uintptr_t addr)50 OS_SEC_ALW_INLINE INLINE void sys_write32(uint32_t data, uintptr_t addr)
51 {
52 __asm__ volatile ("dmb sy" : : : "memory");
53 __asm__ volatile ("str %w0, [%1]" : : "r" (data), "r" (addr));
54 }
55
sys_read32(uintptr_t addr)56 OS_SEC_ALW_INLINE INLINE uint32_t sys_read32(uintptr_t addr)
57 {
58 uint32_t val;
59 __asm__ volatile ("ldr %w0, [%1]" : "=r" (val) : "r" (addr));
60 __asm__ volatile ("dmb sy" : : : "memory");
61 return val;
62 }
63
sys_write8(uint8_t data,uintptr_t addr)64 OS_SEC_ALW_INLINE INLINE void sys_write8(uint8_t data, uintptr_t addr)
65 {
66 __asm__ volatile ("dmb sy" : : : "memory");
67 __asm__ volatile ("strb %w0, [%1]" : : "r" (data), "r" (addr));
68 }
69
sys_read8(uintptr_t addr)70 OS_SEC_ALW_INLINE INLINE uint8_t sys_read8(uintptr_t addr)
71 {
72 uint8_t val;
73 __asm__ volatile ("ldrb %w0, [%1]" : "=r" (val) : "r" (addr));
74 __asm__ volatile ("dmb sy" : : : "memory");
75 return val;
76 }
77
78 #endif
79