• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /*
2  * Copyright (c) 2009-2022 Huawei Technologies Co., Ltd. All rights reserved.
3  *
4  * UniProton is licensed under Mulan PSL v2.
5  * You can use this software according to the terms and conditions of the Mulan PSL v2.
6  * You may obtain a copy of Mulan PSL v2 at:
7  *          http://license.coscl.org.cn/MulanPSL2
8  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
9  * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
10  * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
11  * See the Mulan PSL v2 for more details.
12  * Create: 2009-12-22
13  * Description: UniProton hi3093 demo
14  */
15 #ifndef __DW_UART_REGS_H__
16 #define __DW_UART_REGS_H__
17 
18 #define UART0_REG_BASE 0x0872A000
19 #define UART1_REG_BASE 0x0872B000
20 #define UART2_REG_BASE 0x08710000
21 #define UART3_REG_BASE 0x08711000
22 #define UART4_REG_BASE 0x08743000
23 #define UART5_REG_BASE 0x08744000
24 #define UART6_REG_BASE 0x0875D000
25 #define UART7_REG_BASE 0x0875E000
26 
27 #define CCORE_SYS_UART2_INTID 90
28 #define CCORE_SYS_UART3_INTID 91
29 #define CCORE_SYS_UART4_INTID 92
30 #define CCORE_SYS_UART5_INTID 93
31 #define CCORE_SYS_UART6_INTID 94
32 #define CCORE_SYS_UART7_INTID 95
33 
34 /*
35  * UART register offsets
36  */
37 #define DW_UART_RBR 0x00
38 #define DW_UART_THR 0x00
39 #define DW_UART_DLL 0x00
40 
41 #define DW_UART_DLH 0x04
42 #define DW_UART_IER 0x04
43 
44 #define DW_UART_IIR 0x08
45 #define DW_UART_FCR 0x08
46 
47 #define DW_UART_LCR 0x0C
48 
49 #define DW_UART_MCR 0x10
50 
51 #define DW_UART_LSR 0x14
52 #define DW_UART_MSR 0x18
53 
54 #define DW_UART_USR 0x7C
55 #define DW_UART_TFL 0x80
56 #define DW_UART_RFL 0x84
57 
58 #define DW_UART_HTX 0xA4
59 
60 /* LSR 线性状态寄存器区域 */
61 #define DW_UART_LSR_TEMT 0x40
62 #define DW_UART_LSR_THRE 0x20
63 #define DW_UART_LSR_BI   0x10
64 #define DW_UART_LSR_FE   0x08
65 #define DW_UART_LSR_PE   0x04
66 #define DW_UART_LSR_R    0x02
67 #define DW_UART_LSR_DDR  0x01
68 
69 #define BIT(n)           (1 << (n))
70 
71 /* LCR bit field */
72 #define DW_UART_DLAB         BIT(7)
73 #define DW_UART_BREAK        BIT(6)
74 #define DW_UART_STICK        BIT(5)
75 #define DW_UART_EPS          BIT(4)
76 #define DW_UART_PEN          BIT(3)
77 #define DW_UART_STOP         BIT(2)
78 #define DW_UART_8bit         0x3
79 #define DW_UART_7bit         0x2
80 #define DW_UART_6bit         0x1
81 #define DW_UART_5bit         0x0
82 #define DW_UART_DATALEN_MASK 0x03
83 
84 /* IER bit field */
85 #define PTIME  BIT(7)
86 #define EDSSI  BIT(3)
87 #define ELSI   BIT(2)
88 #define ETBEI  BIT(1)
89 #define ERBFI  BIT(0)
90 
91 /* LSR bit field */
92 #define DW_RFE   BIT(7)
93 #define DW_TEMT  BIT(6)
94 #define DW_THRE  BIT(5)
95 #define DW_BI    BIT(4)
96 #define DW_FE    BIT(3)
97 #define DW_PE    BIT(2)
98 #define DW_OE    BIT(1)
99 #define DW_DR    BIT(0)
100 
101 #define UART_DW_DR_PE DW_PE
102 #define UART_DW_DR_FE DW_FE
103 #define UART_DW_DR_OE DW_OE
104 #define UART_DW_DR_BE DW_BI
105 
106 #define DW_RSR_ANY  (DW_OE | DW_PE | DW_FE | DW_BI)
107 #define DW_DUMMY_RSR_RX
108 
109 /* MCR bit field */
110 #define DW_MC_AFCE  BIT(5)
111 #define DW_MC_LOOP  BIT(4)
112 #define DW_MC_OUT2  BIT(3)
113 #define DW_MC_OUT1  BIT(2)
114 #define DW_MC_RTS   BIT(1)
115 #define DW_MC_DTR   BIT(0)
116 
117 /* MSR bit field */
118 #define DW_DCD     BIT(7)
119 #define DW_RI      BIT(6)
120 #define DW_DSR     BIT(5)
121 #define DW_CTS     BIT(4)
122 #define DW_MSR_ANY (DW_DCD | DW_DSR | DW_CTS)
123 
124 /* IIR bit field */
125 #define DW_RECEIVERR       0x06
126 #define DW_RECEIVEAVA      0x04
127 #define DW_RECTIMEOUT      0x0C
128 #define DW_TRANSEMP        0x02
129 #define DW_NOINTERRUPT     0x01
130 #define DW_MODEMSTA        0x0
131 #define DW_BUSY            0x7
132 
133 /* FCR bit field */
134 #define RECFIFO1_2     (0x02 << 6)
135 #define TXFIFO1_2      (0x03 << 4)
136 #define FIFOENA        1
137 #define UART_FCR_RXCLR 0x02
138 #define UART_FCR_TXCLR 0x04
139 
140 /* USR bit field */
141 #define DW_UART_BUSY      0x01
142 #define DW_XFIFO_NOT_FULL 0x02
143 #define DW_XFIFO_EMP      0x04
144 #define DW_RFIFO_NOT_EMP  0x08
145 #define DW_RFIFO_FULL     0x10
146 
147 #endif /* __DW_UART_REGS_H__ */