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Searched defs:OS_NVIC_INT_CTRL (Results 1 – 25 of 30) sorted by relevance

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/kernel/liteos_m/arch/arm/cortex-m3/keil/
Dlos_dispatch.S43 OS_NVIC_INT_CTRL EQU 0xE000ED04 define
/kernel/liteos_m/arch/arm/cortex-m33/iar/NTZ/
Dlos_dispatch.S46 OS_NVIC_INT_CTRL EQU 0xE000ED04 define
Dlos_arch_interrupt.h222 #define OS_NVIC_INT_CTRL 0xE000ED04 macro
/kernel/liteos_m/arch/arm/cortex-m55/iar/NTZ/
Dlos_dispatch.S46 OS_NVIC_INT_CTRL EQU 0xE000ED04 define
Dlos_arch_interrupt.h222 #define OS_NVIC_INT_CTRL 0xE000ED04 macro
/kernel/liteos_m/arch/arm/cortex-m4/iar/
Dlos_dispatch.S46 OS_NVIC_INT_CTRL EQU 0xE000ED04 define
Dlos_arch_interrupt.h222 #define OS_NVIC_INT_CTRL 0xE000ED04 macro
/kernel/liteos_m/arch/arm/cortex-m7/iar/
Dlos_dispatch.S46 OS_NVIC_INT_CTRL EQU 0xE000ED04 define
Dlos_arch_interrupt.h222 #define OS_NVIC_INT_CTRL 0xE000ED04 macro
/kernel/liteos_m/arch/arm/cortex-m4/keil/
Dlos_dispatch.S46 OS_NVIC_INT_CTRL EQU 0xE000ED04 define
Dlos_arch_interrupt.h222 #define OS_NVIC_INT_CTRL 0xE000ED04 macro
/kernel/liteos_m/arch/arm/cortex-m7/gcc/
Dlos_dispatch.S38 .equ OS_NVIC_INT_CTRL, 0xE000ED04 define
Dlos_arch_interrupt.h222 #define OS_NVIC_INT_CTRL 0xE000ED04 macro
/kernel/liteos_m/arch/arm/cortex-m55/gcc/NTZ/
Dlos_dispatch.S36 .equ OS_NVIC_INT_CTRL, 0xE000ED04 define
Dlos_arch_interrupt.h215 #define OS_NVIC_INT_CTRL 0xE000ED04 macro
/kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/
Dlos_dispatch.S55 OS_NVIC_INT_CTRL EQU 0xE000ED04 define
/kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/
Dlos_dispatch.S55 OS_NVIC_INT_CTRL EQU 0xE000ED04 define
/kernel/liteos_m/arch/arm/cortex-m33/gcc/NTZ/
Dlos_dispatch.S41 .equ OS_NVIC_INT_CTRL, 0xE000ED04 define
Dlos_arch_interrupt.h222 #define OS_NVIC_INT_CTRL 0xE000ED04 macro
/kernel/liteos_m/arch/arm/cortex-m4/gcc/
Dlos_dispatch.S38 .equ OS_NVIC_INT_CTRL, 0xE000ED04 define
/kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/
Dlos_dispatch.S39 .equ OS_NVIC_INT_CTRL, 0xE000ED04 define
Dlos_arch_interrupt.h222 #define OS_NVIC_INT_CTRL 0xE000ED04 macro
/kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/
Dlos_dispatch.S39 .equ OS_NVIC_INT_CTRL, 0xE000ED04 define
/kernel/uniproton/src/arch/cpu/armv7-m/common/hwi/
Dprt_hwi_internal.h75 #define OS_NVIC_INT_CTRL 0xE000ED04UL macro
/kernel/uniproton/src/arch/cpu/armv7-m/cortex-m4/
Dprt_dispatch.S62 OS_NVIC_INT_CTRL = 0xE000ED04 define

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