1; 2; Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. 3; Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved. 4; 5; Redistribution and use in source and binary forms, with or without modification, 6; are permitted provided that the following conditions are met: 7; 8; 1. Redistributions of source code must retain the above copyright notice, this list of 9; conditions and the following disclaimer. 10; 11; 2. Redistributions in binary form must reproduce the above copyright notice, this list 12; of conditions and the following disclaimer in the documentation and/or other materials 13; provided with the distribution. 14; 15; 3. Neither the name of the copyright holder nor the names of its contributors may be used 16; to endorse or promote products derived from this software without specific prior written 17; permission. 18; 19; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 23; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 29; ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30; 31 32 PRESERVE8 33 34 EXPORT ArchIntLock 35 EXPORT ArchIntUnLock 36 EXPORT ArchIntRestore 37 EXPORT HalStartToRun 38 EXPORT ArchTaskSchedule 39 EXPORT HalPendSV 40 IMPORT OsSchedTaskSwitch 41 IMPORT OsSignalTaskContextRestore 42 IMPORT g_losTask 43 44OS_FPU_CPACR EQU 0xE000ED88 45OS_FPU_CPACR_ENABLE EQU 0x00F00000 46OS_NVIC_INT_CTRL EQU 0xE000ED04 47OS_NVIC_SYSPRI2 EQU 0xE000ED20 48OS_NVIC_PENDSV_PRI EQU 0xF0F00000 49OS_NVIC_PENDSVSET EQU 0x10000000 50OS_TASK_STATUS_RUNNING EQU 0x0010 51 52 AREA |.text|, CODE, READONLY 53 THUMB 54 REQUIRE8 55 56 MACRO 57 SIGNAL_CONTEXT_RESTORE 58 PUSH {R12, LR} 59 ; BLX OsSignalTaskContextRestore 60 LDR R0, =OsSignalTaskContextRestore 61 BLX R0 62 POP {R12, LR} 63 CMP R0, #0 64 MOV R1, R0 65 BNE SignalContextRestore 66 MEND 67 68HalStartToRun 69 LDR R4, =OS_NVIC_SYSPRI2 70 LDR R5, =OS_NVIC_PENDSV_PRI 71 STR R5, [R4] 72 73 MOV R0, #2 74 MSR CONTROL, R0 75 76 LDR R1, =g_losTask 77 LDR R0, [R1, #4] 78 LDR R12, [R0] 79 80 LDR.W R1, =OS_FPU_CPACR 81 LDR R1, [R1] 82 AND R1, R1, #OS_FPU_CPACR_ENABLE 83 CMP R1, #OS_FPU_CPACR_ENABLE 84 BNE __DisabledFPU 85 ADD R12, R12, #100 86 87 LDMFD R12!, {R0-R7} 88 ADD R12, R12, #72 89 MSR PSP, R12 90 VPUSH S0; 91 VPOP S0; 92 MOV LR, R5 93 CPSIE I 94 BX R6 95 96__DisabledFPU 97 ADD R12, R12, #36 98 99 LDMFD R12!, {R0-R7} 100 MSR PSP, R12 101 MOV LR, R5 102 CPSIE I 103 BX R6 104 105 106ArchIntLock 107 MRS R0, PRIMASK 108 CPSID I 109 BX LR 110 111ArchIntUnLock 112 MRS R0, PRIMASK 113 CPSIE I 114 BX LR 115 116ArchIntRestore 117 MSR PRIMASK, R0 118 BX LR 119 120ArchTaskSchedule 121 LDR R0, =OS_NVIC_INT_CTRL 122 LDR R1, =OS_NVIC_PENDSVSET 123 STR R1, [R0] 124 DSB 125 ISB 126 BX LR 127 128HalPendSV 129 MRS R12, PRIMASK 130 CPSID I 131 132HalTaskSwitch 133 SIGNAL_CONTEXT_RESTORE 134 135 PUSH {R12, LR} 136 ;BLX OsSchedTaskSwitch 137 LDR R0, =OsSchedTaskSwitch 138 BLX R0 139 POP {R12, LR} 140 CMP R0, #0 141 MOV R0, LR 142 BNE TaskContextSwitch 143 MSR PRIMASK, R12 144 BX LR 145 146TaskContextSwitch 147 MOV LR, R0 148 149 MRS R0, PSP 150 STMFD R0!, {R4-R12} 151 LDR.W R3, =OS_FPU_CPACR 152 LDR R3, [R3] 153 AND R3, R3, #OS_FPU_CPACR_ENABLE 154 CMP R3, #OS_FPU_CPACR_ENABLE 155 BNE __DisabledFPU1 156 VSTMDB R0!, {D8-D15} 157 158__DisabledFPU1 159 LDR R5, =g_losTask 160 LDR R6, [R5] 161 STR R0, [R6] 162 163 LDR R0, [R5, #4] 164 STR R0, [R5] 165 LDR R1, [R0] 166 167SignalContextRestore 168 LDR.W R3, =OS_FPU_CPACR 169 LDR R3, [R3] 170 AND R3, R3, #OS_FPU_CPACR_ENABLE 171 CMP R3, #OS_FPU_CPACR_ENABLE 172 BNE __DisabledFPU2 173 VLDMIA R1!, {D8-D15} 174 175__DisabledFPU2 176 LDMFD R1!, {R4-R12} 177 MSR PSP, R1 178 179 MSR PRIMASK, R12 180 BX LR 181 182 NOP 183 184 END