| /kernel/linux/linux-6.6/drivers/pinctrl/mvebu/ |
| D | pinctrl-kirkwood.c | 19 #define V(f6180, f6190, f6192, f6281, f6282, dx4122, dx1135) \ macro
20 ((f6180 << 0) | (f6190 << 1) | (f6192 << 2) | \
25 VARIANT_MV88F6180 = V(1, 0, 0, 0, 0, 0, 0),
26 VARIANT_MV88F6190 = V(0, 1, 0, 0, 0, 0, 0),
27 VARIANT_MV88F6192 = V(0, 0, 1, 0, 0, 0, 0),
28 VARIANT_MV88F6281 = V(0, 0, 0, 1, 0, 0, 0),
29 VARIANT_MV88F6282 = V(0, 0, 0, 0, 1, 0, 0),
30 VARIANT_MV98DX4122 = V(0, 0, 0, 0, 0, 1, 0),
31 VARIANT_MV98DX1135 = V(0, 0, 0, 0, 0, 0, 1),
36 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1, 1, 1)),
[all …]
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| /kernel/linux/linux-5.10/drivers/pinctrl/mvebu/ |
| D | pinctrl-kirkwood.c | 19 #define V(f6180, f6190, f6192, f6281, f6282, dx4122, dx1135) \ macro
20 ((f6180 << 0) | (f6190 << 1) | (f6192 << 2) | \
25 VARIANT_MV88F6180 = V(1, 0, 0, 0, 0, 0, 0),
26 VARIANT_MV88F6190 = V(0, 1, 0, 0, 0, 0, 0),
27 VARIANT_MV88F6192 = V(0, 0, 1, 0, 0, 0, 0),
28 VARIANT_MV88F6281 = V(0, 0, 0, 1, 0, 0, 0),
29 VARIANT_MV88F6282 = V(0, 0, 0, 0, 1, 0, 0),
30 VARIANT_MV98DX4122 = V(0, 0, 0, 0, 0, 1, 0),
31 VARIANT_MV98DX1135 = V(0, 0, 0, 0, 0, 0, 1),
36 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1, 1, 1)),
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | display_mode_vba_30.c | 397 struct vba_vars_st *v,
676 // valid bpp = increments of 1/16 of a bit in dscceComputeDelay()
678 // max = such that compression is 1:1 in dscceComputeDelay()
680 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
692 // #all other modes operate at 1 pixel per clock in dscceComputeDelay()
694 pixelsPerClock = 1; in dscceComputeDelay()
698 pixelsPerClock = 1; in dscceComputeDelay()
718 s = 1; in dscceComputeDelay()
726 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
727 L = (ax + wx - 1) / wx; in dscceComputeDelay()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | display_mode_vba_30.c | 744 // valid bpp = increments of 1/16 of a bit in dscceComputeDelay()
746 // max = such that compression is 1:1 in dscceComputeDelay()
748 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
760 // #all other modes operate at 1 pixel per clock in dscceComputeDelay()
762 pixelsPerClock = 1; in dscceComputeDelay()
766 pixelsPerClock = 1; in dscceComputeDelay()
786 s = 1; in dscceComputeDelay()
794 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
795 L = (ax + wx - 1) / wx; in dscceComputeDelay()
797 lstall = 1; in dscceComputeDelay()
[all …]
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| /kernel/linux/linux-5.10/arch/x86/lib/ |
| D | atomic64_386_32.S | 27 IRQ_SAVE v;
32 IRQ_RESTORE v; \
35 #define v %ecx macro
37 movl (v), %eax
38 movl 4(v), %edx
41 #undef v
43 #define v %esi macro
45 movl %ebx, (v)
46 movl %ecx, 4(v)
49 #undef v
[all …]
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| /kernel/linux/linux-6.6/arch/x86/lib/ |
| D | atomic64_386_32.S | 27 IRQ_SAVE v;
32 IRQ_RESTORE v; \
35 #define v %ecx macro
37 movl (v), %eax
38 movl 4(v), %edx
41 #undef v
43 #define v %esi macro
45 movl %ebx, (v)
46 movl %ecx, 4(v)
49 #undef v
[all …]
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| /kernel/linux/linux-5.10/tools/memory-model/ |
| D | linux-kernel.def | 10 WRITE_ONCE(X,V) { __store{once}(X,V); }
13 smp_store_release(X,V) { __store{release}(*X,V); }
15 rcu_assign_pointer(X,V) { __store{release}(X,V); }
17 smp_store_mb(X,V) { __store{once}(X,V); __fence{mb}; }
30 xchg(X,V) __xchg{mb}(X,V)
31 xchg_relaxed(X,V) __xchg{once}(X,V)
32 xchg_release(X,V) __xchg{release}(X,V)
33 xchg_acquire(X,V) __xchg{acquire}(X,V)
34 cmpxchg(X,V,W) __cmpxchg{mb}(X,V,W)
35 cmpxchg_relaxed(X,V,W) __cmpxchg{once}(X,V,W)
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/calcs/ |
| D | dcn_calc_auto.c | 40 void scaler_settings_calculation(struct dcn_bw_internal_vars *v) in scaler_settings_calculation() argument
43 for (k = 0; k <= v->number_of_active_planes - 1; k++) { in scaler_settings_calculation()
44 if (v->allow_different_hratio_vratio == dcn_bw_yes) { in scaler_settings_calculation()
45 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
46 v->h_ratio[k] = v->viewport_width[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
47 v->v_ratio[k] = v->viewport_height[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
50 v->h_ratio[k] = v->viewport_height[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
51 v->v_ratio[k] = v->viewport_width[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
55 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
56 …v->h_ratio[k] =dcn_bw_max2(v->viewport_width[k] / v->scaler_rec_out_width[k], v->viewport_height[k… in scaler_settings_calculation()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| D | dcn_calc_auto.c | 40 void scaler_settings_calculation(struct dcn_bw_internal_vars *v) in scaler_settings_calculation() argument
43 for (k = 0; k <= v->number_of_active_planes - 1; k++) { in scaler_settings_calculation()
44 if (v->allow_different_hratio_vratio == dcn_bw_yes) { in scaler_settings_calculation()
45 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
46 v->h_ratio[k] = v->viewport_width[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
47 v->v_ratio[k] = v->viewport_height[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
50 v->h_ratio[k] = v->viewport_height[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
51 v->v_ratio[k] = v->viewport_width[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
55 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
56 …v->h_ratio[k] =dcn_bw_max2(v->viewport_width[k] / v->scaler_rec_out_width[k], v->viewport_height[k… in scaler_settings_calculation()
[all …]
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| /kernel/linux/linux-6.6/tools/memory-model/ |
| D | linux-kernel.def | 10 WRITE_ONCE(X,V) { __store{once}(X,V); }
13 smp_store_release(X,V) { __store{release}(*X,V); }
15 rcu_assign_pointer(X,V) { __store{release}(X,V); }
17 smp_store_mb(X,V) { __store{once}(X,V); __fence{mb}; }
31 xchg(X,V) __xchg{mb}(X,V)
32 xchg_relaxed(X,V) __xchg{once}(X,V)
33 xchg_release(X,V) __xchg{release}(X,V)
34 xchg_acquire(X,V) __xchg{acquire}(X,V)
35 cmpxchg(X,V,W) __cmpxchg{mb}(X,V,W)
36 cmpxchg_relaxed(X,V,W) __cmpxchg{once}(X,V,W)
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| D | display_mode_vba_314.c | 57 // Delay in DCFCLK from ARB to DET (1st num is ARB to SDPIF, 2nd number is SDPIF to DET)
700 // valid bpp = increments of 1/16 of a bit in dscceComputeDelay()
702 // max = such that compression is 1:1 in dscceComputeDelay()
704 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
716 pixelsPerClock = 1; in dscceComputeDelay()
719 // #all other modes operate at 1 pixel per clock in dscceComputeDelay()
721 pixelsPerClock = 1; in dscceComputeDelay()
741 s = 1; in dscceComputeDelay()
749 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
750 L = (ax + wx - 1) / wx; in dscceComputeDelay()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| D | display_mode_vba_31.c | 56 // Delay in DCFCLK from ARB to DET (1st num is ARB to SDPIF, 2nd number is SDPIF to DET)
679 // valid bpp = increments of 1/16 of a bit in dscceComputeDelay()
681 // max = such that compression is 1:1 in dscceComputeDelay()
683 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
695 pixelsPerClock = 1; in dscceComputeDelay()
698 // #all other modes operate at 1 pixel per clock in dscceComputeDelay()
700 pixelsPerClock = 1; in dscceComputeDelay()
720 s = 1; in dscceComputeDelay()
728 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
729 L = (ax + wx - 1) / wx; in dscceComputeDelay()
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| D | atomic.h | 25 static __inline__ int atomic_read(const atomic_t *v) in atomic_read() argument
29 __asm__ __volatile__("lwz%U1%X1 %0,%1" : "=r"(t) : "m"(v->counter)); in atomic_read()
34 static __inline__ void atomic_set(atomic_t *v, int i) in atomic_set() argument
36 __asm__ __volatile__("stw%U0%X0 %1,%0" : "=m"(v->counter) : "r"(i)); in atomic_set()
40 static __inline__ void atomic_##op(int a, atomic_t *v) \
45 "1: lwarx %0,0,%3 # atomic_" #op "\n" \
48 " bne- 1b\n" \
49 : "=&r" (t), "+m" (v->counter) \
50 : "r" (a), "r" (&v->counter) \
55 static inline int atomic_##op##_return_relaxed(int a, atomic_t *v) \
[all …]
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| /kernel/linux/linux-5.10/sound/soc/qcom/ |
| D | lpass-lpaif-reg.h | 11 #define LPAIF_I2SCTL_REG_ADDR(v, addr, port) \ argument
12 (v->i2sctrl_reg_base + (addr) + v->i2sctrl_reg_stride * (port))
14 #define LPAIF_I2SCTL_REG(v, port) LPAIF_I2SCTL_REG_ADDR(v, 0x0, (port)) argument
17 #define LPAIF_I2SCTL_LOOPBACK_ENABLE 1
20 #define LPAIF_I2SCTL_SPKEN_ENABLE 1
23 #define LPAIF_I2SCTL_MODE_SD0 1
46 #define LPAIF_I2SCTL_SPKMONO_MONO 1
49 #define LPAIF_I2SCTL_MICEN_ENABLE 1
54 #define LPAIF_I2SCTL_MICMONO_MONO 1
57 #define LPAIF_I2SCTL_WSSRC_EXTERNAL 1
[all …]
|
| /kernel/linux/linux-5.10/drivers/md/ |
| D | dm-verity-target.c | 46 struct dm_verity *v; member
56 * it can be changed to 1 and it is never reset to 0 again.
60 * and write 1 to hash_verified simultaneously.
80 static sector_t verity_map_sector(struct dm_verity *v, sector_t bi_sector) in verity_map_sector() argument
82 return v->data_start + dm_target_offset(v->ti, bi_sector); in verity_map_sector()
91 static sector_t verity_position_at_level(struct dm_verity *v, sector_t block, in verity_position_at_level() argument
94 return block >> (level * v->hash_per_block_bits); in verity_position_at_level()
97 static int verity_hash_update(struct dm_verity *v, struct ahash_request *req, in verity_hash_update() argument
112 sg_init_table(&sg, 1); in verity_hash_update()
128 static int verity_hash_init(struct dm_verity *v, struct ahash_request *req, in verity_hash_init() argument
[all …]
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| /kernel/linux/linux-6.6/arch/sh/mm/ |
| D | flush-sh4.c | 16 reg_size_t aligned_start, v, cnt, end; in sh4__flush_wback_region() local
19 v = aligned_start & ~(L1_CACHE_BYTES-1); in sh4__flush_wback_region()
20 end = (aligned_start + size + L1_CACHE_BYTES-1) in sh4__flush_wback_region()
21 & ~(L1_CACHE_BYTES-1); in sh4__flush_wback_region()
22 cnt = (end - v) / L1_CACHE_BYTES; in sh4__flush_wback_region()
25 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
26 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
27 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
28 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
29 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
[all …]
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| /kernel/linux/linux-5.10/arch/sh/mm/ |
| D | flush-sh4.c | 16 reg_size_t aligned_start, v, cnt, end; in sh4__flush_wback_region() local
19 v = aligned_start & ~(L1_CACHE_BYTES-1); in sh4__flush_wback_region()
20 end = (aligned_start + size + L1_CACHE_BYTES-1) in sh4__flush_wback_region()
21 & ~(L1_CACHE_BYTES-1); in sh4__flush_wback_region()
22 cnt = (end - v) / L1_CACHE_BYTES; in sh4__flush_wback_region()
25 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
26 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
27 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
28 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
29 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
[all …]
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| /kernel/linux/linux-5.10/drivers/staging/media/hantro/ |
| D | rk3399_vpu_hw_mpeg2_dec.c | 23 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
25 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
26 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
27 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
28 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
30 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
31 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
33 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
34 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
35 #define VDPU_REG_STARTMB_Y(v) (((v) << 0) & GENMASK(7, 0)) argument
[all …]
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| D | hantro_g1_mpeg2_dec.c | 23 #define G1_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
25 #define G1_REG_DEC_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24)) argument
26 #define G1_REG_DEC_TIMEOUT_E(v) ((v) ? BIT(23) : 0) argument
27 #define G1_REG_DEC_STRSWAP32_E(v) ((v) ? BIT(22) : 0) argument
28 #define G1_REG_DEC_STRENDIAN_E(v) ((v) ? BIT(21) : 0) argument
29 #define G1_REG_DEC_INSWAP32_E(v) ((v) ? BIT(20) : 0) argument
30 #define G1_REG_DEC_OUTSWAP32_E(v) ((v) ? BIT(19) : 0) argument
31 #define G1_REG_DEC_DATA_DISC_E(v) ((v) ? BIT(18) : 0) argument
32 #define G1_REG_DEC_LATENCY(v) (((v) << 11) & GENMASK(16, 11)) argument
33 #define G1_REG_DEC_CLK_GATE_E(v) ((v) ? BIT(10) : 0) argument
[all …]
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| /kernel/linux/linux-5.10/include/linux/ |
| D | atomic-arch-fallback.h | 82 arch_atomic_read_acquire(const atomic_t *v) in arch_atomic_read_acquire() argument
84 return smp_load_acquire(&(v)->counter); in arch_atomic_read_acquire()
91 arch_atomic_set_release(atomic_t *v, int i) in arch_atomic_set_release() argument
93 smp_store_release(&(v)->counter, i); in arch_atomic_set_release()
106 arch_atomic_add_return_acquire(int i, atomic_t *v) in arch_atomic_add_return_acquire() argument
108 int ret = arch_atomic_add_return_relaxed(i, v); in arch_atomic_add_return_acquire()
117 arch_atomic_add_return_release(int i, atomic_t *v) in arch_atomic_add_return_release() argument
120 return arch_atomic_add_return_relaxed(i, v); in arch_atomic_add_return_release()
127 arch_atomic_add_return(int i, atomic_t *v) in arch_atomic_add_return() argument
131 ret = arch_atomic_add_return_relaxed(i, v); in arch_atomic_add_return()
[all …]
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| /kernel/linux/linux-6.6/sound/soc/qcom/ |
| D | lpass-lpaif-reg.h | 11 #define LPAIF_I2SCTL_REG_ADDR(v, addr, port) \ argument
12 (v->i2sctrl_reg_base + (addr) + v->i2sctrl_reg_stride * (port))
14 #define LPAIF_I2SCTL_REG(v, port) LPAIF_I2SCTL_REG_ADDR(v, 0x0, (port)) argument
17 #define LPAIF_I2SCTL_LOOPBACK_ENABLE 1
20 #define LPAIF_I2SCTL_SPKEN_ENABLE 1
23 #define LPAIF_I2SCTL_MODE_SD0 1
46 #define LPAIF_I2SCTL_SPKMONO_MONO 1
49 #define LPAIF_I2SCTL_MICEN_ENABLE 1
54 #define LPAIF_I2SCTL_MICMONO_MONO 1
57 #define LPAIF_I2SCTL_WSSRC_EXTERNAL 1
[all …]
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| /kernel/linux/linux-6.6/drivers/md/ |
| D | dm-verity-target.c | 53 struct dm_verity *v; member
63 * it can be changed to 1 and it is never reset to 0 again.
67 * and write 1 to hash_verified simultaneously.
87 static sector_t verity_map_sector(struct dm_verity *v, sector_t bi_sector) in verity_map_sector() argument
89 return v->data_start + dm_target_offset(v->ti, bi_sector); in verity_map_sector()
98 static sector_t verity_position_at_level(struct dm_verity *v, sector_t block, in verity_position_at_level() argument
101 return block >> (level * v->hash_per_block_bits); in verity_position_at_level()
104 static int verity_hash_update(struct dm_verity *v, struct ahash_request *req, in verity_hash_update() argument
121 sg_init_table(&sg, 1); in verity_hash_update()
137 static int verity_hash_init(struct dm_verity *v, struct ahash_request *req, in verity_hash_init() argument
[all …]
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| /kernel/linux/linux-6.6/drivers/media/platform/verisilicon/ |
| D | rockchip_vpu2_hw_mpeg2_dec.c | 23 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
25 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
26 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
27 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
28 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
30 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
31 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
33 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
34 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
35 #define VDPU_REG_STARTMB_Y(v) (((v) << 0) & GENMASK(7, 0)) argument
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/exynos/ |
| D | regs-scaler.h | 56 * 1 70 74 78 7c 150 154 158 15c
61 * 6 c0 c4 c8 cc 1a0 1a4 1a8 1ac
62 * 7 d0 d4 d8 dc 1b0 1b4 1b8 1bc
63 * 8 e0 e4 e8 ec 1c0 1c4 1c8 1cc
69 * 0 f0 f4 1d0 1d4
70 * 1 f8 fc 1d8 1dc
71 * 2 100 104 1e0 1e4
72 * 3 108 10c 1e8 1ec
73 * 4 110 114 1f0 1f4
74 * 5 118 11c 1f8 1fc
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/exynos/ |
| D | regs-scaler.h | 56 * 1 70 74 78 7c 150 154 158 15c
61 * 6 c0 c4 c8 cc 1a0 1a4 1a8 1ac
62 * 7 d0 d4 d8 dc 1b0 1b4 1b8 1bc
63 * 8 e0 e4 e8 ec 1c0 1c4 1c8 1cc
69 * 0 f0 f4 1d0 1d4
70 * 1 f8 fc 1d8 1dc
71 * 2 100 104 1e0 1e4
72 * 3 108 10c 1e8 1ec
73 * 4 110 114 1f0 1f4
74 * 5 118 11c 1f8 1fc
[all …]
|