| /kernel/linux/linux-5.10/drivers/staging/vt6655/ |
| D | rf.c | 57 0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 1, Tf = 2412MHz */
58 0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 2, Tf = 2417MHz */
59 0x03E79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 3, Tf = 2422MHz */
60 0x03E79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 4, Tf = 2427MHz */
61 0x03F7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 5, Tf = 2432MHz */
62 0x03F7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 6, Tf = 2437MHz */
63 0x03E7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 7, Tf = 2442MHz */
64 0x03E7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 8, Tf = 2447MHz */
65 0x03F7B000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 9, Tf = 2452MHz */
66 0x03F7B000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 10, Tf = 2457MHz */
[all …]
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| /kernel/linux/linux-6.6/drivers/staging/vt6655/ |
| D | rf.c | 55 0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 1, Tf = 2412MHz */
56 0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 2, Tf = 2417MHz */
57 0x03E79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 3, Tf = 2422MHz */
58 0x03E79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 4, Tf = 2427MHz */
59 0x03F7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 5, Tf = 2432MHz */
60 0x03F7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 6, Tf = 2437MHz */
61 0x03E7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 7, Tf = 2442MHz */
62 0x03E7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 8, Tf = 2447MHz */
63 0x03F7B000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 9, Tf = 2452MHz */
64 0x03F7B000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 10, Tf = 2457MHz */
[all …]
|
| /kernel/linux/linux-6.6/arch/powerpc/boot/dts/ |
| D | ac14xx.dts | 26 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
27 bus-frequency = <160000000>; /* 160 MHz csb bus */
28 clock-frequency = <400000000>; /* 400 MHz ppc core */
145 bus-frequency = <80000000>; /* 80 MHz ips bus */
174 at24@30 {
262 54 30 31 38 30 30 33 44 4D 55 0A 0A 00 00 00 10
263 00 41 30 30 30 30 30 30 30 30 30 30 30 31 00 D5];
|
| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/ |
| D | ac14xx.dts | 26 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
27 bus-frequency = <160000000>; /* 160 MHz csb bus */
28 clock-frequency = <400000000>; /* 400 MHz ppc core */
145 bus-frequency = <80000000>; /* 80 MHz ips bus */
174 at24@30 {
262 54 30 31 38 30 30 33 44 4D 55 0A 0A 00 00 00 10
263 00 41 30 30 30 30 30 30 30 30 30 30 30 31 00 D5];
|
| /kernel/linux/linux-6.6/drivers/clk/ |
| D | clk-tps68470.c | 41 * frequency range of 3 MHz to 27 MHz by a programmable
44 * of 4 MHz to 64 MHz in increments of 0.1 MHz.
46 * hclk_# = osc_in * (((plldiv*2)+320) / (xtaldiv+30)) * (1 / 2^postdiv)
49 * PLL_REF_CLK = input clk / XTALDIV[7:0] + 30)
53 * BOOST should be as close as possible to 2Mhz
56 * BUCK should be as close as possible to 5.2Mhz
60 * 20Mhz 170 32 1 19.2Mhz
61 * 20Mhz 170 40 1 20Mhz
62 * 20Mhz 170 80 1 24Mhz
|
| /kernel/linux/linux-5.10/include/linux/mfd/ |
| D | si476x-platform.h | 72 SI476X_ICIN_IC_LINK = 30,
80 SI476X_ICIP_IC_LINK = 30,
87 SI476X_ICON_IC_LINK = 30,
94 SI476X_ICOP_IC_LINK = 30,
202 * SI476X_XTAL_37P209375_MHZ - 37.209375 Mhz
203 * SI476X_XTAL_36P4_MHZ - 36.4 Mhz
204 * SI476X_XTAL_37P8_MHZ - 37.8 Mhz
|
| /kernel/linux/linux-6.6/include/linux/mfd/ |
| D | si476x-platform.h | 72 SI476X_ICIN_IC_LINK = 30,
80 SI476X_ICIP_IC_LINK = 30,
87 SI476X_ICON_IC_LINK = 30,
94 SI476X_ICOP_IC_LINK = 30,
202 * SI476X_XTAL_37P209375_MHZ - 37.209375 Mhz
203 * SI476X_XTAL_36P4_MHZ - 36.4 Mhz
204 * SI476X_XTAL_37P8_MHZ - 37.8 Mhz
|
| /kernel/linux/linux-5.10/drivers/media/dvb-frontends/ |
| D | s5h1432.c | 90 /* Register [0x2E] bit 3:2 : 8MHz = 0; 7MHz = 1; 6MHz = 2 */ in s5h1432_set_channel_bandwidth()
199 msleep(30); in s5h1432_set_frontend()
201 msleep(30); in s5h1432_set_frontend()
223 msleep(30); in s5h1432_set_frontend()
225 msleep(30); in s5h1432_set_frontend()
269 /*Set 3.3MHz as default IF frequency */ in s5h1432_init()
285 msleep(30); in s5h1432_init()
364 .frequency_min_hz = 177 * MHz,
365 .frequency_max_hz = 858 * MHz,
|
| /kernel/linux/linux-6.6/drivers/media/dvb-frontends/ |
| D | s5h1432.c | 90 /* Register [0x2E] bit 3:2 : 8MHz = 0; 7MHz = 1; 6MHz = 2 */ in s5h1432_set_channel_bandwidth()
199 msleep(30); in s5h1432_set_frontend()
201 msleep(30); in s5h1432_set_frontend()
223 msleep(30); in s5h1432_set_frontend()
225 msleep(30); in s5h1432_set_frontend()
269 /*Set 3.3MHz as default IF frequency */ in s5h1432_init()
285 msleep(30); in s5h1432_init()
364 .frequency_min_hz = 177 * MHz,
365 .frequency_max_hz = 858 * MHz,
|
| /kernel/linux/linux-5.10/net/wireless/ |
| D | chan.c | 146 int mhz; in nl80211_chan_width_to_mhz() local
150 mhz = 1; in nl80211_chan_width_to_mhz()
153 mhz = 2; in nl80211_chan_width_to_mhz()
156 mhz = 4; in nl80211_chan_width_to_mhz()
159 mhz = 8; in nl80211_chan_width_to_mhz()
162 mhz = 16; in nl80211_chan_width_to_mhz()
165 mhz = 5; in nl80211_chan_width_to_mhz()
168 mhz = 10; in nl80211_chan_width_to_mhz()
172 mhz = 20; in nl80211_chan_width_to_mhz()
175 mhz = 40; in nl80211_chan_width_to_mhz()
[all …]
|
| /kernel/linux/linux-5.10/drivers/watchdog/ |
| D | pnx833x_wdt.c | 31 #define WATCHDOG_TIMEOUT 30 /* 30 sec Maximum timeout */
32 #define WATCHDOG_COUNT_FREQUENCY 68000000U /* Watchdog counts at 68MHZ. */
48 /* Set default timeout in MHZ.*/
51 MODULE_PARM_DESC(timeout, "Watchdog timeout in Mhz. (68Mhz clock), default="
52 __MODULE_STRING(PNX_TIMEOUT_VALUE) "(30 seconds).");
|
| D | sc520_wdt.c | 84 * char to /dev/watchdog every 30 seconds.
87 #define WATCHDOG_TIMEOUT 30 /* 30 sec default timeout */
108 #define WDT_EXP_SEL_01 0x0001 /* [01] Time-out = 496 us (with 33 Mhz clk). */
109 #define WDT_EXP_SEL_02 0x0002 /* [02] Time-out = 508 ms (with 33 Mhz clk). */
110 #define WDT_EXP_SEL_03 0x0004 /* [03] Time-out = 1.02 s (with 33 Mhz clk). */
111 #define WDT_EXP_SEL_04 0x0008 /* [04] Time-out = 2.03 s (with 33 Mhz clk). */
112 #define WDT_EXP_SEL_05 0x0010 /* [05] Time-out = 4.07 s (with 33 Mhz clk). */
113 #define WDT_EXP_SEL_06 0x0020 /* [06] Time-out = 8.13 s (with 33 Mhz clk). */
114 #define WDT_EXP_SEL_07 0x0040 /* [07] Time-out = 16.27s (with 33 Mhz clk). */
115 #define WDT_EXP_SEL_08 0x0080 /* [08] Time-out = 32.54s (with 33 Mhz clk). */
|
| D | aspeed_wdt.c | 78 * and bit 30 represents push-pull or open-drain. With respect to write, magic
88 #define WDT_RESET_WIDTH_PUSH_PULL BIT(30)
94 /* 32 bits at 1MHz, in milliseconds */
96 #define WDT_DEFAULT_TIMEOUT 30
278 * - ast2400 wdt can run at PCLK, or 1MHz in aspeed_wdt_probe()
279 * - ast2500 only runs at 1MHz, hard coding bit 4 to 1 in aspeed_wdt_probe()
280 * - ast2600 always runs at 1MHz in aspeed_wdt_probe()
282 * Set the ast2400 to run at 1MHz as it simplifies the driver. in aspeed_wdt_probe()
317 * Primarily, ensure we're using the 1MHz clock source. in aspeed_wdt_probe()
356 * The watchdog is always configured with a 1MHz source, so in aspeed_wdt_probe()
|
| /kernel/linux/linux-6.6/drivers/watchdog/ |
| D | sc520_wdt.c | 84 * char to /dev/watchdog every 30 seconds.
87 #define WATCHDOG_TIMEOUT 30 /* 30 sec default timeout */
108 #define WDT_EXP_SEL_01 0x0001 /* [01] Time-out = 496 us (with 33 Mhz clk). */
109 #define WDT_EXP_SEL_02 0x0002 /* [02] Time-out = 508 ms (with 33 Mhz clk). */
110 #define WDT_EXP_SEL_03 0x0004 /* [03] Time-out = 1.02 s (with 33 Mhz clk). */
111 #define WDT_EXP_SEL_04 0x0008 /* [04] Time-out = 2.03 s (with 33 Mhz clk). */
112 #define WDT_EXP_SEL_05 0x0010 /* [05] Time-out = 4.07 s (with 33 Mhz clk). */
113 #define WDT_EXP_SEL_06 0x0020 /* [06] Time-out = 8.13 s (with 33 Mhz clk). */
114 #define WDT_EXP_SEL_07 0x0040 /* [07] Time-out = 16.27s (with 33 Mhz clk). */
115 #define WDT_EXP_SEL_08 0x0080 /* [08] Time-out = 32.54s (with 33 Mhz clk). */
|
| /kernel/linux/linux-5.10/arch/mips/ralink/ |
| D | mt7620.c | 194 FUNC("jtag", 3, 30, 1),
195 FUNC("utif", 2, 30, 1),
196 FUNC("gpio", 1, 30, 1),
197 FUNC("p4led_kn", 0, 30, 1),
291 #define MT7628_GPIO_MODE_PWM1 30
379 #define MHZ(x) ((x) * 1000 * 1000) macro
388 return MHZ(40); in mt7620_get_xtal_rate()
390 return MHZ(20); in mt7620_get_xtal_rate()
402 return MHZ(40); in mt7620_get_periph_rate()
419 return MHZ(600); in mt7620_get_cpu_pll_rate()
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | rockchip,dwc3.txt | 8 "ref_clk" Controller reference clk, have to be 24 MHz
9 "suspend_clk" Controller suspend clk, have to be 24 MHz or 32 KHz
10 "bus_clk" Master/Core clock, have to be >= 62.5 MHz for SS
11 operation and >= 30MHz for HS operation
|
| /kernel/linux/linux-6.6/drivers/net/wireless/ath/ath10k/ |
| D | rx_desc.h | 44 RX_ATTENTION_FLAGS_FCS_ERR = BIT(30),
371 #define RX_MPDU_END_INFO0_DECRYPT_ERR BIT(30)
586 #define RX_MSDU_END_INFO0_PRE_DELIM_ERR BIT(30)
767 * RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth.
771 * RSSI of RX PPDU on chain 0 of secondary 20 MHz bandwidth.
775 * RSSI of RX PPDU on chain 0 of secondary 40 MHz bandwidth.
779 * RSSI of RX PPDU on chain 0 of secondary 80 MHz bandwidth.
783 * RSSI of RX PPDU on chain 1 of primary 20 MHz bandwidth.
787 * RSSI of RX PPDU on chain 1 of secondary 20 MHz bandwidth.
791 * RSSI of RX PPDU on chain 1 of secondary 40 MHz bandwidth.
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/wireless/ath/ath10k/ |
| D | rx_desc.h | 43 RX_ATTENTION_FLAGS_FCS_ERR = BIT(30),
356 #define RX_MPDU_END_INFO0_DECRYPT_ERR BIT(30)
565 #define RX_MSDU_END_INFO0_PRE_DELIM_ERR BIT(30)
740 * RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth.
744 * RSSI of RX PPDU on chain 0 of secondary 20 MHz bandwidth.
748 * RSSI of RX PPDU on chain 0 of secondary 40 MHz bandwidth.
752 * RSSI of RX PPDU on chain 0 of secondary 80 MHz bandwidth.
756 * RSSI of RX PPDU on chain 1 of primary 20 MHz bandwidth.
760 * RSSI of RX PPDU on chain 1 of secondary 20 MHz bandwidth.
764 * RSSI of RX PPDU on chain 1 of secondary 40 MHz bandwidth.
[all …]
|
| /kernel/linux/linux-6.6/drivers/clk/ingenic/ |
| D | jz4760-cgu.c | 20 #define MHZ (1000 * 1000) macro
63 /* The frequency after the N divider must be between 1 and 50 MHz. */ in jz4760_cgu_calc_m_n_od()
64 n = parent_rate / (1 * MHZ); in jz4760_cgu_calc_m_n_od()
69 rate /= MHZ; in jz4760_cgu_calc_m_n_od()
70 parent_rate /= MHZ; in jz4760_cgu_calc_m_n_od()
243 .mux = { CGU_REG_LPCDR, 30, 1 },
260 .mux = { CGU_REG_PCMCDR, 30, 2 },
268 .mux = { CGU_REG_I2SCDR, 30, 2 },
275 .mux = { CGU_REG_USBCDR, 30, 2 },
382 .gate = { CGU_REG_LCR, 30, false, 150 },
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/ |
| D | rockchip,dwc3.yaml | 54 Controller reference clock, must to be 24 MHz
56 Controller suspend clock, must to be 24 MHz or 32 KHz
58 Master/Core clock, must to be >= 62.5 MHz for SS
59 operation and >= 30MHz for HS operation
|
| /kernel/linux/linux-5.10/drivers/ide/ |
| D | pdc202xx_new.c | 6 * linux/drivers/ide/pdc202xx.c Version 0.35 Mar. 30, 2002
91 * ATA Timing Tables based on 133 MHz PLL output clock.
93 * If the PLL outputs 100 MHz clock, the ASIC hardware will set
95 * issued to the device. However, if the PLL output clock is 133 MHz,
137 * automatically set the timing registers based on 100 MHz PLL output. in pdcnew_set_dma_mode()
139 * As we set up the PLL to output 133 MHz for UltraDMA/133 capable in pdcnew_set_dma_mode()
223 * The 30-bit decrementing counter is read in 4 pieces. in read_counter()
238 * E.g. 16949000 on 33 MHz PCI bus, i.e. half of the PCI clock.
270 * (the clock counter is 30 bit wide and counts down) in detect_pll_input_clock()
316 case 4: /* it's 133 MHz for Ultra133 chips */ in init_chipset_pdcnew()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/mvebu/ |
| D | dove.c | 26 * 5 = 1000 MHz
27 * 6 = 933 MHz
28 * 7 = 933 MHz
29 * 8 = 800 MHz
30 * 9 = 800 MHz
31 * 10 = 800 MHz
32 * 11 = 1067 MHz
33 * 12 = 667 MHz
34 * 13 = 533 MHz
35 * 14 = 400 MHz
[all …]
|
| /kernel/linux/linux-6.6/drivers/clk/mvebu/ |
| D | dove.c | 26 * 5 = 1000 MHz
27 * 6 = 933 MHz
28 * 7 = 933 MHz
29 * 8 = 800 MHz
30 * 9 = 800 MHz
31 * 10 = 800 MHz
32 * 11 = 1067 MHz
33 * 12 = 667 MHz
34 * 13 = 533 MHz
35 * 14 = 400 MHz
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/wireless/intel/iwlwifi/cfg/ |
| D | 9000.c | 16 #define IWL9000_UCODE_API_MIN 30
163 const char iwl9162_160_name[] = "Intel(R) Wireless-AC 9162 160MHz";
164 const char iwl9260_160_name[] = "Intel(R) Wireless-AC 9260 160MHz";
165 const char iwl9270_160_name[] = "Intel(R) Wireless-AC 9270 160MHz";
166 const char iwl9461_160_name[] = "Intel(R) Wireless-AC 9461 160MHz";
167 const char iwl9462_160_name[] = "Intel(R) Wireless-AC 9462 160MHz";
168 const char iwl9560_160_name[] = "Intel(R) Wireless-AC 9560 160MHz";
171 "Killer (R) Wireless-AC 1550 Wireless Network Adapter (9260NGW) 160MHz";
175 "Killer(R) Wireless-AC 1550i Wireless Network Adapter (9560NGW) 160MHz";
179 "Killer(R) Wireless-AC 1550s Wireless Network Adapter (9560D2W) 160MHz";
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/jaketown/ |
| D | uncore-power.json | 10 …quency that is configured in the filter. (filter_band0=XXX with XXX in 100Mhz units). One can als…
20 …quency that is configured in the filter. (filter_band1=XXX with XXX in 100Mhz units). One can als…
30 …quency that is configured in the filter. (filter_band2=XXX with XXX in 100Mhz units). One can als…
40 …uency that is configured in the filter. (filter_band3=XXX, with XXX in 100Mhz units). One can als…
50 …quency that is configured in the filter. (filter_band0=XXX with XXX in 100Mhz units). One can als…
61 …quency that is configured in the filter. (filter_band1=XXX with XXX in 100Mhz units). One can als…
72 …quency that is configured in the filter. (filter_band2=XXX with XXX in 100Mhz units). One can als…
83 …uency that is configured in the filter. (filter_band3=XXX, with XXX in 100Mhz units). One can als…
212 "Filter": "filter_band2=30",
256 "Filter": "edge=1,filter_band2=30",
|