Searched full:aardvark (Results 1 – 11 of 11) sorted by relevance
1 Aardvark PCIe controller5 The Device Tree node describing an Aardvark PCIe controller must26 In addition, the Device Tree describing an Aardvark PCIe controller
99 aardvark@0 {100 compatible = "totalphase,aardvark";
3 * Driver for the Aardvark PCIe controller, used on Marvell Armada67 /* Aardvark Control registers */521 * Note that this Aardvark PCI Bridge does not have compliant Type 1 in advk_pcie_setup_hw()522 * Configuration Space and it even cannot be accessed via Aardvark's in advk_pcie_setup_hw()524 * available in internal Aardvark registers starting at offset 0x0 in advk_pcie_setup_hw()529 * access to configuration space via internal Aardvark registers or in advk_pcie_setup_hw()730 * So return -EAGAIN and caller (pci-aardvark.c driver) will in advk_pcie_check_pio_status()873 * PCI_EXP_LNKCAP_DLLLARC bit is hardwired in aardvark HW to 0. in advk_pci_bridge_emul_pcie_conf_read()1059 * Aardvark HW provides PCIe Capability structure in version 2 and in advk_sw_pci_bridge_init()1591 * Aardvark HW returns zero for PCI_EXP_FLAGS_IRQ, so use PCIe interrupt 0. in advk_pcie_handle_pme()[all …]
7 tristate "Aardvark PCIe controller"13 Add support for Aardvark 64bit PCIe Host Controller. This
8 obj-$(CONFIG_PCI_AARDVARK) += pci-aardvark.o
3 * Driver for the Aardvark PCIe controller, used on Marvell Armada67 /* Aardvark Control registers */526 * Note that this Aardvark PCI Bridge does not have compliant Type 1 in advk_pcie_setup_hw()527 * Configuration Space and it even cannot be accessed via Aardvark's in advk_pcie_setup_hw()529 * available in internal Aardvark registers starting at offset 0x0 in advk_pcie_setup_hw()534 * access to configuration space via internal Aardvark registers or in advk_pcie_setup_hw()725 * So return -EAGAIN and caller (pci-aardvark.c driver) will in advk_pcie_check_pio_status()865 * PCI_EXP_LNKCAP_DLLLARC bit is hardwired in aardvark HW to 0. in advk_pci_bridge_emul_pcie_conf_read()966 /* Aardvark HW provides PCIe Capability structure in version 2 */ in advk_sw_pci_bridge_init()1539 * Aardvark hardware allows to configure also PCIe window in advk_pcie_probe()[all …]
15 tristate "Aardvark PCIe controller"21 Add support for Aardvark 64bit PCIe Host Controller. This
7 obj-$(CONFIG_PCI_AARDVARK) += pci-aardvark.o
13317 PCI DRIVER FOR AARDVARK (Marvell Armada 3700)13323 F: Documentation/devicetree/bindings/pci/aardvark-pci.txt13324 F: drivers/pci/controller/pci-aardvark.c
16287 PCI DRIVER FOR AARDVARK (Marvell Armada 3700)16293 F: Documentation/devicetree/bindings/pci/aardvark-pci.txt16294 F: drivers/pci/controller/pci-aardvark.c