Searched +full:assigned +full:- +full:address (Results 1 – 25 of 1129) sorted by relevance
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/msm/ |
| D | dpu.txt | 6 sub-blocks like DPU display controller, DSI and DP interfaces etc. 11 - compatible: "qcom,sdm845-mdss", "qcom,sc7180-mdss" 12 - reg: physical base address and length of contoller's registers. 13 - reg-names: register region names. The following region is required: 15 - power-domains: a power domain consumer specifier according to 17 - clocks: list of clock specifiers for clocks needed by the device. 18 - clock-names: device clock names, must be in same order as clocks property. 23 - interrupts: interrupt signal from MDSS. 24 - interrupt-controller: identifies the node as an interrupt controller. 25 - #interrupt-cells: specifies the number of cells needed to encode an interrupt [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/i3c/ |
| D | i3c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Belloni <alexandre.belloni@bootlin.com> 11 - Miquel Raynal <miquel.raynal@bootlin.com> 20 pattern: "^i3c-master@[0-9a-f]+$" 22 "#address-cells": 27 All I3C devices are supposed to support DAA (Dynamic Address Assignment), 35 this I3C device has a static I2C address and we want to assign it a 36 specific I3C dynamic address before the DAA takes place (so that other [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | ti,phy-j721e-wiz.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: "http://devicetree.org/schemas/phy/ti,phy-j721e-wiz.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 11 - Kishon Vijay Abraham I <kishon@ti.com> 16 - ti,j721e-wiz-16g 17 - ti,j721e-wiz-10g 19 power-domains: 24 description: clock-specifier to represent input to the WIZ [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/ |
| D | imx8ulp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8ulp-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/power/imx8ulp-power.h> 10 #include <dt-bindings/thermal/thermal.h> 12 #include "imx8ulp-pinfunc.h" 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; [all …]
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| D | imx8mp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mp-clock.h> 7 #include <dt-bindings/power/imx8mp-power.h> 8 #include <dt-bindings/reset/imx8mp-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interconnect/fsl,imx8mp.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 15 #include "imx8mp-pinfunc.h" [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/ti/ |
| D | k3-j721s2-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 9 sms: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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| D | k3-j7200-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 9 dmsc: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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| D | k3-j721e-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ 9 dmsc: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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| D | k3-j784s4-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ 9 sms: system-controller@44083000 { 10 bootph-all; 11 compatible = "ti,k2g-sci"; 12 ti,host-id = <12>; 14 mbox-names = "rx", "tx"; 19 reg-names = "debug_messages"; 22 k3_pds: power-controller { 23 bootph-all; [all …]
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| D | k3-am62-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 19 #address-cells = <2>; 20 #size-cells = <2>; 22 #interrupt-cells = <3>; [all …]
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| D | k3-am62a-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 24 #address-cells = <2>; 25 #size-cells = <2>; 27 #interrupt-cells = <3>; [all …]
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| D | k3-am64-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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| D | k3-j7200-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 9 serdes_refclk: serdes-refclk { 10 #clock-cells = <0>; 11 compatible = "fixed-clock"; 17 compatible = "mmio-sram"; 19 #address-cells = <1>; 20 #size-cells = <1>; 23 atf-sram@0 { 28 scm_conf: scm-conf@100000 { [all …]
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| D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/phy/phy-ti.h> 9 #include <dt-bindings/mux/mux.h> 11 #include "k3-serdes.h" 14 cmn_refclk: clock-cmnrefclk { 15 #clock-cells = <0>; 16 compatible = "fixed-clock"; 17 clock-frequency = <0>; [all …]
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| D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/ |
| D | nvidia,tegra-audio-graph-card.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-graph-card.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 15 - Jon Hunter <jonathanh@nvidia.com> 16 - Sameer Pujar <spujar@nvidia.com> 19 - $ref: audio-graph.yaml# 24 - nvidia,tegra210-audio-graph-card 25 - nvidia,tegra186-audio-graph-card 30 clock-names: [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/ |
| D | sama7g5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC 12 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 #include <dt-bindings/clock/at91.h> 16 #include <dt-bindings/dma/at91.h> 17 #include <dt-bindings/gpio/gpio.h> 18 #include <dt-bindings/mfd/at91-usart.h> 19 #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h> [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | nvidia,tegra210-ahub.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 for audio pre-processing, post-processing and a programmable full 17 - Jon Hunter <jonathanh@nvidia.com> 18 - Sameer Pujar <spujar@nvidia.com> 22 pattern: "^ahub@[0-9a-f]*$" 26 - enum: 27 - nvidia,tegra210-ahub [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/ |
| D | ti,phy-j721e-wiz.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/phy/ti,phy-j721e-wiz.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Kishon Vijay Abraham I <kishon@ti.com> 16 - ti,j721e-wiz-16g 17 - ti,j721e-wiz-10g 18 - ti,j721s2-wiz-10g 19 - ti,am64-wiz-10g [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/ufs/ |
| D | ti,j721e-ufs.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/ufs/ti,j721e-ufs.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vignesh Raghavendra <vigneshr@ti.com> 15 - const: ti,j721e-ufs 19 description: address of TI UFS glue registers 23 description: phandle to the M-PHY clock 25 power-domains: 28 assigned-clocks: [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/ufs/ |
| D | ti,j721e-ufs.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/ufs/ti,j721e-ufs.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vignesh Raghavendra <vigneshr@ti.com> 15 - const: ti,j721e-ufs 19 description: address of TI UFS glue registers 23 description: phandle to the M-PHY clock 25 power-domains: 28 assigned-clocks: [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/ |
| D | imx7ulp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright 2017-2018 NXP 8 #include <dt-bindings/clock/imx7ulp-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include "imx7ulp-pinfunc.h" 15 interrupt-parent = <&intc>; 17 #address-cells = <1>; 18 #size-cells = <1>; 37 #address-cells = <1>; [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | imx7ulp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright 2017-2018 NXP 8 #include <dt-bindings/clock/imx7ulp-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include "imx7ulp-pinfunc.h" 15 interrupt-parent = <&intc>; 17 #address-cells = <1>; 18 #size-cells = <1>; 37 #address-cells = <1>; [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/i2c/ |
| D | sony,imx334.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Paul J. Murphy <paul.j.murphy@intel.com> 12 - Daniele Alessandrelli <daniele.alessandrelli@intel.com> 17 I2C client address is fixed to 0x1a as per sensor data sheet. Image data is 18 sent through MIPI CSI-2. 24 description: I2C address 27 assigned-clocks: true 28 assigned-clock-parents: true [all …]
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| D | sony,imx335.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Paul J. Murphy <paul.j.murphy@intel.com> 12 - Daniele Alessandrelli <daniele.alessandrelli@intel.com> 17 I2C client address is fixed to 0x1a as per sensor data sheet. Image data is 18 sent through MIPI CSI-2. 24 description: I2C address 27 assigned-clocks: true 28 assigned-clock-parents: true [all …]
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