| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpu/host1x/ |
| D | nvidia,tegra234-nvdec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra234-nvdec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvdec@[0-9a-f]*$"
24 - nvidia,tegra234-nvdec
32 clock-names:
34 - const: nvdec
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| /kernel/linux/linux-6.6/drivers/gpu/drm/tegra/ |
| D | riscv.c | 1 // SPDX-License-Identifier: GPL-2.0-only
32 static void riscv_writel(struct tegra_drm_riscv *riscv, u32 value, u32 offset) in riscv_writel() argument
34 writel(value, riscv->regs + offset); in riscv_writel()
39 struct tegra_drm_riscv_descriptor *bl = &riscv->bl_desc; in tegra_drm_riscv_read_descriptors() local
40 struct tegra_drm_riscv_descriptor *os = &riscv->os_desc; in tegra_drm_riscv_read_descriptors()
41 const struct device_node *np = riscv->dev->of_node; in tegra_drm_riscv_read_descriptors()
47 dev_err(riscv->dev, "failed to read " name ": %d\n", err); \ in tegra_drm_riscv_read_descriptors()
51 READ_PROP("nvidia,bl-manifest-offset", &bl->manifest_offset); in tegra_drm_riscv_read_descriptors()
52 READ_PROP("nvidia,bl-code-offset", &bl->code_offset); in tegra_drm_riscv_read_descriptors()
53 READ_PROP("nvidia,bl-data-offset", &bl->data_offset); in tegra_drm_riscv_read_descriptors()
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| /kernel/linux/linux-5.10/arch/arm/lib/ |
| D | backtrace-clang.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/lib/backtrace-clang.S
39 * If the call instruction was a bl we can look at the callers branch
45 * Unfortunately due to the stack frame layout we can't dump r0 - r3, but these
52 * optionally saved caller registers (r4 - r10)
53 * optionally saved arguments (r0 - r3)
57 * Functions start with the following code sequence:
60 * stmfd sp!, {r0 - r3} (optional)
69 * The frame for c_backtrace has pointers to the code of dump_stack. This is
82 * show_stack. It points at the instruction directly after the bl dump_stack.
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| /kernel/linux/linux-6.6/arch/arm/lib/ |
| D | backtrace-clang.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/lib/backtrace-clang.S
39 * If the call instruction was a bl we can look at the callers branch
45 * Unfortunately due to the stack frame layout we can't dump r0 - r3, but these
52 * optionally saved caller registers (r4 - r10)
53 * optionally saved arguments (r0 - r3)
57 * Functions start with the following code sequence:
60 * stmfd sp!, {r0 - r3} (optional)
69 * The frame for c_backtrace has pointers to the code of dump_stack. This is
82 * show_stack. It points at the instruction directly after the bl dump_stack.
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| /kernel/linux/linux-6.6/drivers/gpu/drm/display/ |
| D | drm_dp_helper.c | 75 return link_status[r - DP_LANE0_1_STATUS]; in dp_link_status()
229 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_clock_recovery_delay_us()
230 aux->name, rd_interval); in __8b10b_clock_recovery_delay_us()
241 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_channel_eq_delay_us()
242 aux->name, rd_interval); in __8b10b_channel_eq_delay_us()
254 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x\n", in __128b132b_channel_eq_delay_us()
255 aux->name, rd_interval); in __128b132b_channel_eq_delay_us()
277 * - Clock recovery vs. channel equalization
278 * - DPRX vs. LTTPR
279 * - 128b/132b vs. 8b/10b
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| /kernel/linux/linux-6.6/arch/arm64/kernel/ |
| D | head.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Low-level CPU initialisation
6 * Copyright (C) 1994-2002 Russell King
7 * Copyright (C) 2003-2012 ARM Ltd.
21 #include <asm/asm-offsets.h>
27 #include <asm/kernel-pgtable.h>
30 #include <asm/pgtable-hwdef.h>
38 #include "efi-header.S"
46 * ---------------------------
49 * MMU = off, D-cache = off, I-cache = on or off,
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| D | ftrace.c | 1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <asm/debug-monitors.h>
23 int offset; member
29 .offset = offsetof(struct ftrace_regs, field), \
55 if (!strcmp(roff->name, name)) in ftrace_regs_query_register_offset()
56 return roff->offset; in ftrace_regs_query_register_offset()
59 return -EINVAL; in ftrace_regs_query_register_offset()
73 * When using patchable-function-entry without pre-function NOPS, addr in ftrace_call_adjust()
79 * addr+04: NOP // To be patched to BL <caller> in ftrace_call_adjust()
83 * addr-04: BTI C in ftrace_call_adjust()
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| /kernel/linux/linux-5.10/arch/powerpc/kernel/ |
| D | head_64.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
9 * Low-level exception handlers and MMU support
16 * This file contains the entry point for the 64-bit kernel along
17 * with some early initialization code common to all 64-bit powerpc
27 #include <asm/head-64.h>
28 #include <asm/asm-offsets.h>
41 #include <asm/ppc-opcode.h>
43 #include <asm/feature-fixups.h>
46 * spin code sits at 0x0000...0x00ff. On server, the vectors follow
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| D | misc_64.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * This file contains miscellaneous low-level functions.
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
19 #include <asm/asm-offsets.h>
26 #include <asm/feature-fixups.h>
33 stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r3)
35 bl __do_softirq
44 stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r4)
46 bl __do_irq
205 * The address passed in is the 24 bits register address. This code
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| D | head_fsl_booke.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Kernel execution entry point code.
5 * Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
10 * Low-level exception handers, MMU support, and rewrite.
13 * Copyright (c) 1998-1999 TiVo, Inc.
23 * Copyright 2002-2004 MontaVista Software, Inc.
38 #include <asm/asm-offsets.h>
42 #include <asm/feature-fixups.h>
45 /* As with the other PowerPC ports, it is expected that when code
49 * r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.)
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| /kernel/linux/linux-6.6/arch/powerpc/kernel/ |
| D | head_64.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
9 * Low-level exception handlers and MMU support
16 * This file contains the entry point for the 64-bit kernel along
17 * with some early initialization code common to all 64-bit powerpc
28 #include <asm/head-64.h>
29 #include <asm/asm-offsets.h>
42 #include <asm/ppc-opcode.h>
43 #include <asm/feature-fixups.h>
45 #include <asm/exception-64s.h>
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| D | head_85xx.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Kernel execution entry point code.
5 * Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
10 * Low-level exception handers, MMU support, and rewrite.
13 * Copyright (c) 1998-1999 TiVo, Inc.
23 * Copyright 2002-2004 MontaVista Software, Inc.
40 #include <asm/asm-offsets.h>
43 #include <asm/feature-fixups.h>
46 /* As with the other PowerPC ports, it is expected that when code
50 * r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.)
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| D | head_booke.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
13 * Macros used for common Book-e exception handling
32 * Note that entries 0-3 are used for the prolog code, and the remaining
36 #define THREAD_NORMSAVE(offset) (THREAD_NORMSAVES + (offset * 4))
63 lwz r11, TASK_STACK - THREAD(r10); \
101 addi r2, r2, -THREAD
110 bl prepare_transfer_to_handler
139 lwz r1, TASK_STACK - THREAD(r10)
141 ALLOC_STACK_FRAME(r1, THREAD_SIZE - INT_FRAME_SIZE)
148 /* To handle the additional exception priority levels on 40x and Book-E
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| /kernel/liteos_a/arch/arm/arm/src/startup/ |
| D | reset_vector_mp.S | 2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
8 * 1. Redistributions of source code must retain the above copyright notice, this list of
63 .fpu neon-vfpv4
65 .arch armv7-a
72 bl sp_set
80 bl excstack_magic
83 .code 32
89 *Assumption: ROM code has these vectors at the hardware reset address.
90 *A simple jump removes any address-space dependencies [i.e. safer]
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| D | reset_vector_up.S | 2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
8 * 1. Redistributions of source code must retain the above copyright notice, this list of
61 .fpu neon-vfpv4
63 .arch armv7-a
70 bl sp_set
78 bl excstack_magic
81 .code 32
86 *Assumption: ROM code has these vectors at the hardware reset address.
87 *A simple jump removes any address-space dependencies [i.e. safer]
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| /kernel/linux/linux-5.10/arch/arm64/kernel/ |
| D | head.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Low-level CPU initialisation
6 * Copyright (C) 1994-2002 Russell King
7 * Copyright (C) 2003-2012 ARM Ltd.
14 #include <linux/irqchip/arm-gic-v3.h>
21 #include <asm/asm-offsets.h>
26 #include <asm/kernel-pgtable.h>
29 #include <asm/pgtable-hwdef.h>
37 #include "efi-header.S"
47 * ---------------------------
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| D | ftrace.c | 1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <asm/debug-monitors.h>
33 * Carefully read and modify the code with aarch64_insn_*() which uses in ftrace_modify_code()
39 return -EFAULT; in ftrace_modify_code()
42 return -EINVAL; in ftrace_modify_code()
45 return -EPERM; in ftrace_modify_code()
68 struct plt_entry *plt = mod->arch.ftrace_trampolines; in get_ftrace_plt()
82 * Due to the limited range of 'BL' instructions, modules may be placed too far
92 unsigned long pc = rec->ip; in ftrace_find_callable_addr()
93 long offset = (long)*addr - (long)pc; in ftrace_find_callable_addr() local
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| /kernel/linux/linux-5.10/fs/nfs/blocklayout/ |
| D | blocklayout.c | 54 switch (be->be_state) { in is_hole()
58 return be->be_tag ? false : true; in is_hole()
79 rv->data = data; in alloc_parallel()
80 kref_init(&rv->refcnt); in alloc_parallel()
87 kref_get(&p->refcnt); in get_parallel()
95 p->pnfs_callback(p->data); in destroy_parallel()
101 kref_put(&p->refcnt, destroy_parallel); in put_parallel()
108 get_parallel(bio->bi_private); in bl_submit_bio()
111 bio->bi_iter.bi_size, in bl_submit_bio()
112 (unsigned long long)bio->bi_iter.bi_sector); in bl_submit_bio()
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| /kernel/linux/linux-6.6/fs/nfs/blocklayout/ |
| D | blocklayout.c | 54 switch (be->be_state) { in is_hole()
58 return be->be_tag ? false : true; in is_hole()
79 rv->data = data; in alloc_parallel()
80 kref_init(&rv->refcnt); in alloc_parallel()
87 kref_get(&p->refcnt); in get_parallel()
95 p->pnfs_callback(p->data); in destroy_parallel()
101 kref_put(&p->refcnt, destroy_parallel); in put_parallel()
108 get_parallel(bio->bi_private); in bl_submit_bio()
111 bio->bi_iter.bi_size, in bl_submit_bio()
112 (unsigned long long)bio->bi_iter.bi_sector); in bl_submit_bio()
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| /kernel/linux/linux-6.6/arch/arm/boot/compressed/ |
| D | head.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1996-2002 Russell King
12 #include "efi-header.S"
20 AR_CLASS( .arch armv7-a )
21 M_CLASS( .arch armv7-m )
26 * Note that these macros must not contain any code which is not
82 bl putc
88 bl phex
101 kputc #'-'
105 kputc #'-'
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| /kernel/linux/linux-5.10/arch/arm/kernel/ |
| D | head.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1994-2002 Russell King
9 * Kernel startup code for all 32-bit CPUs
19 #include <asm/asm-offsets.h>
72 * ---------------------------
74 * This is normally called from the decompressor code. The requirements
75 * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
78 * This code is mostly position independent, so if you link the kernel at
81 * See linux/arch/arm/tools/mach-types for the complete list of machine
85 * crap here - that's what the boot loader (or in extreme, well justified
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| /kernel/linux/linux-5.10/drivers/video/fbdev/ |
| D | mx3fb.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
21 #include <linux/dma-mapping.h>
26 #include <linux/dma/ipu-dma.h>
29 #include <linux/platform_data/dma-imx.h>
30 #include <linux/platform_data/video-mx3fb.h>
40 #define SDC_COM_CONF (0xB4 - MX3FB_REG_OFFSET)
41 #define SDC_GW_CTRL (0xB8 - MX3FB_REG_OFFSET)
42 #define SDC_FG_POS (0xBC - MX3FB_REG_OFFSET)
43 #define SDC_BG_POS (0xC0 - MX3FB_REG_OFFSET)
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| /kernel/linux/linux-6.6/arch/loongarch/kernel/ |
| D | head.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
18 #include "efi-header.S"
23 .word MZ_MAGIC /* "MZ", MS-DOS header */
27 .quad PHYS_LINK_KADDR /* Kernel image load offset from start of RAM */
30 .long pe_header - _head /* Offset to the PE header */
64 la.pcrel t1, __bss_stop - LONGSIZE
84 PTR_LI sp, (_THREAD_SIZE - PT_SIZE)
90 bl relocate_kernel
94 PTR_LI sp, (_THREAD_SIZE - PT_SIZE)
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| /kernel/linux/linux-5.10/arch/arm/boot/compressed/ |
| D | head.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1996-2002 Russell King
12 #include "efi-header.S"
14 AR_CLASS( .arch armv7-a )
15 M_CLASS( .arch armv7-m )
20 * Note that these macros must not contain any code which is not
80 bl putc
86 bl phex
99 kputc #'-'
103 kputc #'-'
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| /kernel/linux/linux-5.10/arch/powerpc/kexec/ |
| D | relocate_32.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * This file contains kexec low-level functions.
5 * Copyright (C) 2002-2003 Eric Biederman <ebiederm@xmission.com>
20 * Must be relocatable PIC code callable as a C function.
63 * Code for setting up 1:1 mapping for PPC440x for KEXEC
68 * 2) Create a tmp mapping for our code in the other address space(TS) and
70 * 3) Create a 1:1 mapping for 0-2GiB in chunks of 256M in original TS.
74 * - Based on the kexec support code for FSL BookE
96 bl 0f /* Find our address */
128 rlwinm r11, r3, 0, 24, 27 /* bits 24-27 */
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