Home
last modified time | relevance | path

Searched +full:bl +full:- +full:data +full:- +full:offset (Results 1 – 25 of 220) sorted by relevance

123456789

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpu/host1x/
Dnvidia,tegra234-nvdec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra234-nvdec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvdec@[0-9a-f]*$"
24 - nvidia,tegra234-nvdec
32 clock-names:
34 - const: nvdec
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/tegra/
Driscv.c1 // SPDX-License-Identifier: GPL-2.0-only
32 static void riscv_writel(struct tegra_drm_riscv *riscv, u32 value, u32 offset) in riscv_writel() argument
34 writel(value, riscv->regs + offset); in riscv_writel()
39 struct tegra_drm_riscv_descriptor *bl = &riscv->bl_desc; in tegra_drm_riscv_read_descriptors() local
40 struct tegra_drm_riscv_descriptor *os = &riscv->os_desc; in tegra_drm_riscv_read_descriptors()
41 const struct device_node *np = riscv->dev->of_node; in tegra_drm_riscv_read_descriptors()
47 dev_err(riscv->dev, "failed to read " name ": %d\n", err); \ in tegra_drm_riscv_read_descriptors()
51 READ_PROP("nvidia,bl-manifest-offset", &bl->manifest_offset); in tegra_drm_riscv_read_descriptors()
52 READ_PROP("nvidia,bl-code-offset", &bl->code_offset); in tegra_drm_riscv_read_descriptors()
53 READ_PROP("nvidia,bl-data-offset", &bl->data_offset); in tegra_drm_riscv_read_descriptors()
[all …]
/kernel/linux/linux-5.10/fs/nfs/blocklayout/
Dblocklayout.c54 switch (be->be_state) { in is_hole()
58 return be->be_tag ? false : true; in is_hole()
64 /* The data we are handed might be spread across several bios. We need
69 void (*pnfs_callback) (void *data);
70 void *data; member
73 static inline struct parallel_io *alloc_parallel(void *data) in alloc_parallel() argument
79 rv->data = data; in alloc_parallel()
80 kref_init(&rv->refcnt); in alloc_parallel()
87 kref_get(&p->refcnt); in get_parallel()
95 p->pnfs_callback(p->data); in destroy_parallel()
[all …]
/kernel/linux/linux-6.6/fs/nfs/blocklayout/
Dblocklayout.c54 switch (be->be_state) { in is_hole()
58 return be->be_tag ? false : true; in is_hole()
64 /* The data we are handed might be spread across several bios. We need
69 void (*pnfs_callback) (void *data);
70 void *data; member
73 static inline struct parallel_io *alloc_parallel(void *data) in alloc_parallel() argument
79 rv->data = data; in alloc_parallel()
80 kref_init(&rv->refcnt); in alloc_parallel()
87 kref_get(&p->refcnt); in get_parallel()
95 p->pnfs_callback(p->data); in destroy_parallel()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/acr/
Dtu102.c46 u32 offset = 0; in tu102_acr_wpr_build() local
49 /*XXX: shared sub-WPR headers, fill terminator for now. */ in tu102_acr_wpr_build()
50 nvkm_wo32(acr->wpr, 0x200, 0xffffffff); in tu102_acr_wpr_build()
52 /* Fill per-LSF structures. */ in tu102_acr_wpr_build()
53 list_for_each_entry(lsfw, &acr->lsfw, head) { in tu102_acr_wpr_build()
54 struct lsf_signature_v1 *sig = (void *)lsfw->sig->data; in tu102_acr_wpr_build()
56 .falcon_id = lsfw->id, in tu102_acr_wpr_build()
57 .lsb_offset = lsfw->offset.lsb, in tu102_acr_wpr_build()
60 .bin_version = sig->version, in tu102_acr_wpr_build()
65 nvkm_wobj(acr->wpr, offset, &hdr, sizeof(hdr)); in tu102_acr_wpr_build()
[all …]
Dgm200.c42 nvkm_warn(&acr->subdev, "firmware unavailable\n"); in gm200_acr_nofw()
55 struct nvkm_device *device = acr->subdev.device; in gm200_acr_wpr_check()
67 struct nvkm_subdev *subdev = &acr->subdev; in gm200_acr_wpr_patch()
71 u32 offset = 0; in gm200_acr_wpr_patch() local
74 nvkm_robj(acr->wpr, offset, &hdr, sizeof(hdr)); in gm200_acr_wpr_patch()
77 list_for_each_entry(lsfw, &acr->lsfw, head) { in gm200_acr_wpr_patch()
78 if (lsfw->id != hdr.falcon_id) in gm200_acr_wpr_patch()
81 nvkm_robj(acr->wpr, hdr.lsb_offset, &lsb, sizeof(lsb)); in gm200_acr_wpr_patch()
84 lsfw->func->bld_patch(acr, lsb.tail.bl_data_off, adjust); in gm200_acr_wpr_patch()
87 offset += sizeof(hdr); in gm200_acr_wpr_patch()
[all …]
Dgp102.c38 u32 offset = 0; in gp102_acr_wpr_patch() local
41 nvkm_robj(acr->wpr, offset, &hdr, sizeof(hdr)); in gp102_acr_wpr_patch()
42 wpr_header_v1_dump(&acr->subdev, &hdr); in gp102_acr_wpr_patch()
44 list_for_each_entry(lsfw, &acr->lsfw, head) { in gp102_acr_wpr_patch()
45 if (lsfw->id != hdr.falcon_id) in gp102_acr_wpr_patch()
48 nvkm_robj(acr->wpr, hdr.lsb_offset, &lsb, sizeof(lsb)); in gp102_acr_wpr_patch()
49 lsb_header_v1_dump(&acr->subdev, &lsb); in gp102_acr_wpr_patch()
51 lsfw->func->bld_patch(acr, lsb.tail.bl_data_off, adjust); in gp102_acr_wpr_patch()
55 offset += sizeof(hdr); in gp102_acr_wpr_patch()
66 if (WARN_ON(lsfw->sig->size != sizeof(hdr.signature))) in gp102_acr_wpr_build_lsb()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/acr/
Dtu102.c46 u32 offset = 0; in tu102_acr_wpr_build() local
49 /*XXX: shared sub-WPR headers, fill terminator for now. */ in tu102_acr_wpr_build()
50 nvkm_wo32(acr->wpr, 0x200, 0xffffffff); in tu102_acr_wpr_build()
52 /* Fill per-LSF structures. */ in tu102_acr_wpr_build()
53 list_for_each_entry(lsfw, &acr->lsfw, head) { in tu102_acr_wpr_build()
54 struct lsf_signature_v1 *sig = (void *)lsfw->sig->data; in tu102_acr_wpr_build()
56 .falcon_id = lsfw->id, in tu102_acr_wpr_build()
57 .lsb_offset = lsfw->offset.lsb, in tu102_acr_wpr_build()
60 .bin_version = sig->version, in tu102_acr_wpr_build()
65 nvkm_wobj(acr->wpr, offset, &hdr, sizeof(hdr)); in tu102_acr_wpr_build()
[all …]
Dgp102.c38 u32 offset = 0; in gp102_acr_wpr_patch() local
41 nvkm_robj(acr->wpr, offset, &hdr, sizeof(hdr)); in gp102_acr_wpr_patch()
42 wpr_header_v1_dump(&acr->subdev, &hdr); in gp102_acr_wpr_patch()
44 list_for_each_entry(lsfw, &acr->lsfw, head) { in gp102_acr_wpr_patch()
45 if (lsfw->id != hdr.falcon_id) in gp102_acr_wpr_patch()
48 nvkm_robj(acr->wpr, hdr.lsb_offset, &lsb, sizeof(lsb)); in gp102_acr_wpr_patch()
49 lsb_header_v1_dump(&acr->subdev, &lsb); in gp102_acr_wpr_patch()
51 lsfw->func->bld_patch(acr, lsb.tail.bl_data_off, adjust); in gp102_acr_wpr_patch()
55 offset += sizeof(hdr); in gp102_acr_wpr_patch()
64 if (WARN_ON(lsfw->sig->size != sizeof(hdr.signature))) in gp102_acr_wpr_build_lsb()
[all …]
Dgm200.c42 nvkm_warn(&acr->subdev, "firmware unavailable\n"); in gm200_acr_nofw()
55 struct nvkm_device *device = acr->subdev.device; in gm200_acr_wpr_check()
67 struct nvkm_subdev *subdev = &acr->subdev; in gm200_acr_wpr_patch()
71 u32 offset = 0; in gm200_acr_wpr_patch() local
74 nvkm_robj(acr->wpr, offset, &hdr, sizeof(hdr)); in gm200_acr_wpr_patch()
77 list_for_each_entry(lsfw, &acr->lsfw, head) { in gm200_acr_wpr_patch()
78 if (lsfw->id != hdr.falcon_id) in gm200_acr_wpr_patch()
81 nvkm_robj(acr->wpr, hdr.lsb_offset, &lsb, sizeof(lsb)); in gm200_acr_wpr_patch()
84 lsfw->func->bld_patch(acr, lsb.tail.bl_data_off, adjust); in gm200_acr_wpr_patch()
87 offset += sizeof(hdr); in gm200_acr_wpr_patch()
[all …]
/kernel/linux/linux-6.6/include/linux/
Dbio.h1 /* SPDX-License-Identifier: GPL-2.0 */
23 #define bio_prio(bio) (bio)->bi_ioprio
24 #define bio_set_prio(bio, prio) ((bio)->bi_ioprio = prio)
27 bvec_iter_bvec((bio)->bi_io_vec, (iter))
30 bvec_iter_page((bio)->bi_io_vec, (iter))
32 bvec_iter_len((bio)->bi_io_vec, (iter))
34 bvec_iter_offset((bio)->bi_io_vec, (iter))
36 #define bio_page(bio) bio_iter_page((bio), (bio)->bi_iter)
37 #define bio_offset(bio) bio_iter_offset((bio), (bio)->bi_iter)
38 #define bio_iovec(bio) bio_iter_iovec((bio), (bio)->bi_iter)
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/display/
Ddrm_dp_helper.c18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
75 return link_status[r - DP_LANE0_1_STATUS]; in dp_link_status()
229 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_clock_recovery_delay_us()
230 aux->name, rd_interval); in __8b10b_clock_recovery_delay_us()
241 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_channel_eq_delay_us()
242 aux->name, rd_interval); in __8b10b_channel_eq_delay_us()
254 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x\n", in __128b132b_channel_eq_delay_us()
255 aux->name, rd_interval); in __128b132b_channel_eq_delay_us()
277 * - Clock recovery vs. channel equalization
278 * - DPRX vs. LTTPR
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/
Datmel_lcdfb.c13 #include <linux/dma-mapping.h>
38 /* LCD Controller info data structure, stored in device platform_data */
70 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
71 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
108 /* some bl->props field just changed */
109 static int atmel_bl_update_status(struct backlight_device *bl) in atmel_bl_update_status() argument
111 struct atmel_lcdfb_info *sinfo = bl_get_data(bl); in atmel_bl_update_status()
112 int power = sinfo->bl_power; in atmel_bl_update_status()
113 int brightness = bl->props.brightness; in atmel_bl_update_status()
119 if (bl->props.fb_blank != sinfo->bl_power) in atmel_bl_update_status()
[all …]
Dmx3fb.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
21 #include <linux/dma-mapping.h>
26 #include <linux/dma/ipu-dma.h>
29 #include <linux/platform_data/dma-imx.h>
30 #include <linux/platform_data/video-mx3fb.h>
40 #define SDC_COM_CONF (0xB4 - MX3FB_REG_OFFSET)
41 #define SDC_GW_CTRL (0xB8 - MX3FB_REG_OFFSET)
42 #define SDC_FG_POS (0xBC - MX3FB_REG_OFFSET)
43 #define SDC_BG_POS (0xC0 - MX3FB_REG_OFFSET)
[all …]
/kernel/linux/linux-5.10/arch/arm64/kernel/
Dhead.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Low-level CPU initialisation
6 * Copyright (C) 1994-2002 Russell King
7 * Copyright (C) 2003-2012 ARM Ltd.
14 #include <linux/irqchip/arm-gic-v3.h>
21 #include <asm/asm-offsets.h>
26 #include <asm/kernel-pgtable.h>
29 #include <asm/pgtable-hwdef.h>
37 #include "efi-header.S"
47 * ---------------------------
[all …]
/kernel/linux/linux-5.10/arch/arm/kernel/
Dhead-common.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/kernel/head-common.S
5 * Copyright (C) 1994-2002 Russell King
18 #define OF_DT_MAGIC 0xedfe0dd0 /* 0xd00dfeed in big-endian */
71 * r0 = cp#15 control register (exc_ret for M-class)
88 bl __inflate_kernel_data @ decompress .data to RAM
98 bl __memcpy @ copy .data to RAM
107 bl __memset @ clear .bss
110 bl kasan_early_init
127 * This provides a C-API version of __lookup_processor_type
[all …]
Dhead.S1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1994-2002 Russell King
9 * Kernel startup code for all 32-bit CPUs
19 #include <asm/asm-offsets.h>
72 * ---------------------------
75 * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
81 * See linux/arch/arm/tools/mach-types for the complete list of machine
85 * crap here - that's what the boot loader (or in extreme, well justified
92 .equ swapper_pg_dir, . - PG_DIR_SIZE
95 mov r3, #0 @ normal entry point - clear r3
[all …]
/kernel/linux/linux-6.6/drivers/video/fbdev/
Datmel_lcdfb.c13 #include <linux/dma-mapping.h>
38 /* LCD Controller info data structure, stored in device platform_data */
69 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
70 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
107 /* some bl->props field just changed */
108 static int atmel_bl_update_status(struct backlight_device *bl) in atmel_bl_update_status() argument
110 struct atmel_lcdfb_info *sinfo = bl_get_data(bl); in atmel_bl_update_status()
111 int brightness = backlight_get_brightness(bl); in atmel_bl_update_status()
123 static int atmel_bl_get_brightness(struct backlight_device *bl) in atmel_bl_get_brightness() argument
125 struct atmel_lcdfb_info *sinfo = bl_get_data(bl); in atmel_bl_get_brightness()
[all …]
/kernel/liteos_a/arch/arm/arm/src/startup/
Dreset_vector_mp.S2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
63 .fpu neon-vfpv4
65 .arch armv7-a
72 bl sp_set
80 bl excstack_magic
90 *A simple jump removes any address-space dependencies [i.e. safer]
172 sub r11, r11, r12 /* r11: eventual address offset */
181 bl memset_optimized /* optimized memset since r0 is 64-byte aligned */
[all …]
Dreset_vector_up.S2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
61 .fpu neon-vfpv4
63 .arch armv7-a
70 bl sp_set
78 bl excstack_magic
87 *A simple jump removes any address-space dependencies [i.e. safer]
147 sub r11, r11, r12 /* r11: eventual address offset */
156 bl memset_optimized /* optimized memset since r0 is 64-byte aligned */
[all …]
/kernel/linux/linux-6.6/arch/powerpc/kernel/
Dhead_85xx.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
10 * Low-level exception handers, MMU support, and rewrite.
13 * Copyright (c) 1998-1999 TiVo, Inc.
23 * Copyright 2002-2004 MontaVista Software, Inc.
40 #include <asm/asm-offsets.h>
43 #include <asm/feature-fixups.h>
50 * r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.)
51 * r4 - Starting address of the init RAM disk
52 * r5 - Ending address of the init RAM disk
[all …]
/kernel/linux/linux-6.6/arch/arm/kernel/
Dhead-common.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/kernel/head-common.S
5 * Copyright (C) 1994-2002 Russell King
18 #define OF_DT_MAGIC 0xedfe0dd0 /* 0xd00dfeed in big-endian */
71 * r0 = cp#15 control register (exc_ret for M-class)
90 bl __inflate_kernel_data @ decompress .data to RAM
98 bl __memcpy @ copy .data to RAM
106 bl __memset @ clear .bss
118 bl kasan_early_init
149 .size __mmap_switched_data, . - __mmap_switched_data
[all …]
/kernel/linux/linux-5.10/include/linux/
Dbio.h1 /* SPDX-License-Identifier: GPL-2.0 */
24 #define bio_prio(bio) (bio)->bi_ioprio
25 #define bio_set_prio(bio, prio) ((bio)->bi_ioprio = prio)
28 bvec_iter_bvec((bio)->bi_io_vec, (iter))
31 bvec_iter_page((bio)->bi_io_vec, (iter))
33 bvec_iter_len((bio)->bi_io_vec, (iter))
35 bvec_iter_offset((bio)->bi_io_vec, (iter))
37 #define bio_page(bio) bio_iter_page((bio), (bio)->bi_iter)
38 #define bio_offset(bio) bio_iter_offset((bio), (bio)->bi_iter)
39 #define bio_iovec(bio) bio_iter_iovec((bio), (bio)->bi_iter)
[all …]
/kernel/linux/linux-5.10/arch/powerpc/kernel/
Dhead_fsl_booke.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
10 * Low-level exception handers, MMU support, and rewrite.
13 * Copyright (c) 1998-1999 TiVo, Inc.
23 * Copyright 2002-2004 MontaVista Software, Inc.
38 #include <asm/asm-offsets.h>
42 #include <asm/feature-fixups.h>
49 * r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.)
50 * r4 - Starting address of the init RAM disk
51 * r5 - Ending address of the init RAM disk
[all …]
Dmisc_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * This file contains miscellaneous low-level functions.
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
19 #include <asm/asm-offsets.h>
26 #include <asm/feature-fixups.h>
33 stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r3)
35 bl __do_softirq
44 stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r4)
46 bl __do_irq
257 mtspr SPRN_SCOMD,r4 /* write data */
[all …]

123456789