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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 *  linux/arch/arm/kernel/head-common.S
4 *
5 *  Copyright (C) 1994-2002 Russell King
6 *  Copyright (c) 2003 ARM Limited
7 *  All Rights Reserved
8 */
9#include <asm/assembler.h>
10
11#define ATAG_CORE 0x54410001
12#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
13#define ATAG_CORE_SIZE_EMPTY ((2*4) >> 2)
14
15#ifdef CONFIG_CPU_BIG_ENDIAN
16#define OF_DT_MAGIC 0xd00dfeed
17#else
18#define OF_DT_MAGIC 0xedfe0dd0 /* 0xd00dfeed in big-endian */
19#endif
20
21/*
22 * Exception handling.  Something went wrong and we can't proceed.  We
23 * ought to tell the user, but since we don't have any guarantee that
24 * we're even running on the right architecture, we do virtually nothing.
25 *
26 * If CONFIG_DEBUG_LL is set we try to print out something about the error
27 * and hope for the best (useful if bootloader fails to pass a proper
28 * machine ID for example).
29 */
30	__HEAD
31
32/* Determine validity of the r2 atags pointer.  The heuristic requires
33 * that the pointer be aligned, in the first 16k of physical RAM and
34 * that the ATAG_CORE marker is first and present.  If CONFIG_OF_FLATTREE
35 * is selected, then it will also accept a dtb pointer.  Future revisions
36 * of this function may be more lenient with the physical address and
37 * may also be able to move the ATAGS block if necessary.
38 *
39 * Returns:
40 *  r2 either valid atags pointer, valid dtb pointer, or zero
41 *  r5, r6 corrupted
42 */
43__vet_atags:
44	tst	r2, #0x3			@ aligned?
45	bne	1f
46
47	ldr	r5, [r2, #0]
48#ifdef CONFIG_OF_FLATTREE
49	ldr	r6, =OF_DT_MAGIC		@ is it a DTB?
50	cmp	r5, r6
51	beq	2f
52#endif
53	cmp	r5, #ATAG_CORE_SIZE		@ is first tag ATAG_CORE?
54	cmpne	r5, #ATAG_CORE_SIZE_EMPTY
55	bne	1f
56	ldr	r5, [r2, #4]
57	ldr	r6, =ATAG_CORE
58	cmp	r5, r6
59	bne	1f
60
612:	ret	lr				@ atag/dtb pointer is ok
62
631:	mov	r2, #0
64	ret	lr
65ENDPROC(__vet_atags)
66
67/*
68 * The following fragment of code is executed with the MMU on in MMU mode,
69 * and uses absolute addresses; this is not position independent.
70 *
71 *  r0  = cp#15 control register (exc_ret for M-class)
72 *  r1  = machine ID
73 *  r2  = atags/dtb pointer
74 *  r9  = processor ID
75 */
76	__INIT
77__mmap_switched:
78
79	mov	r7, r1
80	mov	r8, r2
81	mov	r10, r0
82
83	mov	fp, #0
84
85#if defined(CONFIG_XIP_DEFLATED_DATA)
86	adr_l	r4, __bss_stop
87	mov	sp, r4				@ sp (temporary stack in .bss)
88	bl	__inflate_kernel_data		@ decompress .data to RAM
89	teq	r0, #0
90	bne	__error
91#elif defined(CONFIG_XIP_KERNEL)
92	adr_l	r0, _sdata
93	adr_l	r1, __data_loc
94	adr_l	r2, _edata_loc
95	adr_l	r3, __bss_stop
96	mov	sp, r3				@ sp (temporary stack in .bss)
97	sub	r2, r2, r1
98	bl	__memcpy			@ copy .data to RAM
99#endif
100
101	adr_l	r0, __bss_start
102	adr_l	r1, __bss_stop
103	adr_l	r3, init_thread_union + THREAD_START_SP
104	mov	sp, r3
105	sub	r2, r1, r0
106	mov	r1, #0
107	bl	__memset			@ clear .bss
108
109#ifdef CONFIG_KASAN
110	bl	kasan_early_init
111#endif
112
113	str_l	r9, processor_id, r4		@ Save processor ID
114	str_l	r7, __machine_arch_type, r4	@ Save machine type
115	str_l	r8, __atags_pointer, r4		@ Save atags pointer
116#ifdef CONFIG_CPU_CP15
117	str_l	r10, cr_alignment, r4		@ Save control register values
118#endif
119	mov	lr, #0
120	b	start_kernel
121ENDPROC(__mmap_switched)
122
123	__FINIT
124	.text
125
126/*
127 * This provides a C-API version of __lookup_processor_type
128 */
129ENTRY(lookup_processor_type)
130	stmfd	sp!, {r4 - r6, r9, lr}
131	mov	r9, r0
132	bl	__lookup_processor_type
133	mov	r0, r5
134	ldmfd	sp!, {r4 - r6, r9, pc}
135ENDPROC(lookup_processor_type)
136
137/*
138 * Read processor ID register (CP#15, CR0), and look up in the linker-built
139 * supported processor list.  Note that we can't use the absolute addresses
140 * for the __proc_info lists since we aren't running with the MMU on
141 * (and therefore, we are not in the correct address space).  We have to
142 * calculate the offset.
143 *
144 *	r9 = cpuid
145 * Returns:
146 *	r3, r4, r6 corrupted
147 *	r5 = proc_info pointer in physical address space
148 *	r9 = cpuid (preserved)
149 */
150__lookup_processor_type:
151	/*
152	 * Look in <asm/procinfo.h> for information about the __proc_info
153	 * structure.
154	 */
155	adr_l	r5, __proc_info_begin
156	adr_l	r6, __proc_info_end
1571:	ldmia	r5, {r3, r4}			@ value, mask
158	and	r4, r4, r9			@ mask wanted bits
159	teq	r3, r4
160	beq	2f
161	add	r5, r5, #PROC_INFO_SZ		@ sizeof(proc_info_list)
162	cmp	r5, r6
163	blo	1b
164	mov	r5, #0				@ unknown processor
1652:	ret	lr
166ENDPROC(__lookup_processor_type)
167
168__error_lpae:
169#ifdef CONFIG_DEBUG_LL
170	adr	r0, str_lpae
171	bl 	printascii
172	b	__error
173str_lpae: .asciz "\nError: Kernel with LPAE support, but CPU does not support LPAE.\n"
174#else
175	b	__error
176#endif
177	.align
178ENDPROC(__error_lpae)
179
180__error_p:
181#ifdef CONFIG_DEBUG_LL
182	adr	r0, str_p1
183	bl	printascii
184	mov	r0, r9
185	bl	printhex8
186	adr	r0, str_p2
187	bl	printascii
188	b	__error
189str_p1:	.asciz	"\nError: unrecognized/unsupported processor variant (0x"
190str_p2:	.asciz	").\n"
191	.align
192#endif
193ENDPROC(__error_p)
194
195__error:
196#ifdef CONFIG_ARCH_RPC
197/*
198 * Turn the screen red on a error - RiscPC only.
199 */
200	mov	r0, #0x02000000
201	mov	r3, #0x11
202	orr	r3, r3, r3, lsl #8
203	orr	r3, r3, r3, lsl #16
204	str	r3, [r0], #4
205	str	r3, [r0], #4
206	str	r3, [r0], #4
207	str	r3, [r0], #4
208#endif
2091:	mov	r0, r0
210	b	1b
211ENDPROC(__error)
212