| /kernel/linux/linux-6.6/drivers/clk/keystone/ |
| D | sci-clk.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
6 * Tero Kristo <t-kristo@ti.com>
8 #include <linux/clk-provider.h>
24 * struct sci_clk_provider - TI SCI clock provider representation
27 * @dev: Device pointer for the clock provider
29 * @num_clocks: Total number of clocks for this provider
40 * struct sci_clk - TI SCI clock representation
45 * @provider: Master clock provider
56 struct sci_clk_provider *provider; member
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| /kernel/linux/linux-5.10/drivers/clk/keystone/ |
| D | sci-clk.c | 4 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
5 * Tero Kristo <t-kristo@ti.com>
16 #include <linux/clk-provider.h>
33 * struct sci_clk_provider - TI SCI clock provider representation
36 * @dev: Device pointer for the clock provider
38 * @num_clocks: Total number of clocks for this provider
49 * struct sci_clk - TI SCI clock representation
54 * @provider: Master clock provider
65 struct sci_clk_provider *provider; member
75 * sci_clk_prepare - Prepare (enable) a TI SCI clock
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| /kernel/linux/linux-6.6/drivers/interconnect/ |
| D | icc-clk.c | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <linux/clk.h>
8 #include <linux/interconnect-clk.h>
9 #include <linux/interconnect-provider.h>
12 struct clk *clk; member
17 struct icc_provider provider; member
23 container_of(_provider, struct icc_clk_provider, provider)
27 struct icc_clk_node *qn = src->data; in icc_clk_set()
30 if (!qn || !qn->clk) in icc_clk_set()
33 if (!src->peak_bw) { in icc_clk_set()
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| /kernel/linux/linux-5.10/drivers/clk/tegra/ |
| D | clk-tegra210-emc.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015-2020, NVIDIA CORPORATION. All rights reserved.
7 #include <linux/clk.h>
8 #include <linux/clk-provider.h>
9 #include <linux/clk/tegra.h>
15 #include "clk.h"
35 struct tegra210_clk_emc_provider *provider; member
37 struct clk *parents[8];
57 value = readl_relaxed(emc->regs + CLK_SOURCE_EMC); in tegra210_clk_emc_get_parent()
71 * ->set_rate(), so the parent rate passed in here was cached from the in tegra210_clk_emc_recalc_rate()
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| /kernel/linux/linux-6.6/drivers/clk/tegra/ |
| D | clk-tegra210-emc.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015-2020, NVIDIA CORPORATION. All rights reserved.
7 #include <linux/clk.h>
8 #include <linux/clk-provider.h>
9 #include <linux/clk/tegra.h>
15 #include "clk.h"
35 struct tegra210_clk_emc_provider *provider; member
37 struct clk *parents[8];
57 value = readl_relaxed(emc->regs + CLK_SOURCE_EMC); in tegra210_clk_emc_get_parent()
71 * ->set_rate(), so the parent rate passed in here was cached from the in tegra210_clk_emc_recalc_rate()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/ti/ |
| D | clkctrl.c | 6 * Tero Kristo <t-kristo@ti.com>
18 #include <linux/clk-provider.h>
22 #include <linux/clk/ti.h>
57 struct clk_hw *clk; member
101 * one is during suspend-resume cycle while timekeeping is in _omap4_is_timeout()
110 if (time->cycles++ < timeout) { in _omap4_is_timeout()
115 if (!ktime_to_ns(time->start)) { in _omap4_is_timeout()
116 time->start = ktime_get(); in _omap4_is_timeout()
120 if (ktime_us_delta(ktime_get(), time->start) < timeout) { in _omap4_is_timeout()
139 struct clk_hw_omap *clk = to_clk_hw_omap(hw); in _omap4_clkctrl_clk_enable() local
[all …]
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| D | clk.c | 6 * Tero Kristo <t-kristo@ti.com>
18 #include <linux/clk.h>
19 #include <linux/clk-provider.h>
21 #include <linux/clk/ti.h>
50 struct clk_iomap *io = clk_memmaps[reg->index]; in clk_memmap_writel()
52 if (reg->ptr) in clk_memmap_writel()
53 writel_relaxed(val, reg->ptr); in clk_memmap_writel()
54 else if (io->regmap) in clk_memmap_writel()
55 regmap_write(io->regmap, reg->offset, val); in clk_memmap_writel()
57 writel_relaxed(val, io->mem + reg->offset); in clk_memmap_writel()
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/ti/ |
| D | clkctrl.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 * Tero Kristo <t-kristo@ti.com>
10 #include <linux/clk-provider.h>
14 #include <linux/clk/ti.h>
50 struct clk_hw *clk; member
94 * one is during suspend-resume cycle while timekeeping is in _omap4_is_timeout()
103 if (time->cycles++ < timeout) { in _omap4_is_timeout()
108 if (!ktime_to_ns(time->start)) { in _omap4_is_timeout()
109 time->start = ktime_get(); in _omap4_is_timeout()
113 if (ktime_us_delta(ktime_get(), time->start) < timeout) { in _omap4_is_timeout()
[all …]
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| D | clk.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 * Tero Kristo <t-kristo@ti.com>
10 #include <linux/clk.h>
11 #include <linux/clk-provider.h>
13 #include <linux/clk/ti.h>
43 struct clk_iomap *io = clk_memmaps[reg->index]; in clk_memmap_writel()
45 if (reg->ptr) in clk_memmap_writel()
46 writel_relaxed(val, reg->ptr); in clk_memmap_writel()
47 else if (io->regmap) in clk_memmap_writel()
48 regmap_write(io->regmap, reg->offset, val); in clk_memmap_writel()
[all …]
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| /kernel/linux/linux-5.10/drivers/interconnect/qcom/ |
| D | osm-l3.c | 1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk.h>
8 #include <linux/interconnect-provider.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
41 container_of(_provider, struct qcom_osm_l3_icc_provider, provider)
48 struct icc_provider provider; member
52 * struct qcom_icc_node - Qualcomm specific interconnect nodes
151 struct icc_provider *provider; in qcom_icc_set() local
159 qn = src->data; in qcom_icc_set()
160 provider = src->provider; in qcom_icc_set()
[all …]
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| /kernel/linux/linux-6.6/drivers/interconnect/qcom/ |
| D | osm-l3.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
8 #include <linux/clk.h>
9 #include <linux/interconnect-provider.h>
16 #include <dt-bindings/interconnect/qcom,osm-l3.h>
38 container_of(_provider, struct qcom_osm_l3_icc_provider, provider)
45 struct icc_provider provider; member
49 * struct qcom_osm_l3_node - Qualcomm specific interconnect nodes
129 struct icc_provider *provider; in qcom_osm_l3_set() local
134 qn = src->data; in qcom_osm_l3_set()
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| D | icc-rpm.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
9 #include <linux/soc/qcom/smd-rpm.h>
11 #include <dt-bindings/interconnect/qcom,rpm-icc.h>
12 #include <linux/clk.h>
13 #include <linux/interconnect-provider.h>
20 container_of(_provider, struct qcom_icc_provider, provider)
29 * struct rpm_clk_resource - RPM bus clock resource
41 * struct qcom_icc_provider - Qualcomm specific interconnect provider
42 * @provider: generic interconnect provider
44 * @type: the ICC provider type
[all …]
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| /kernel/linux/linux-6.6/drivers/memory/tegra/ |
| D | tegra186-emc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk.h>
24 struct clk *clk; member
35 struct icc_provider provider; member
42 * to control the EMC frequency. The top-level directory can be found here:
48 * - available_rates: This file contains a list of valid, space-separated
51 * - min_rate: Writing a value to this file sets the given frequency as the
56 * - max_rate: Similarily to the min_rate file, writing a value to this file
68 for (i = 0; i < emc->num_dvfs; i++) in tegra186_emc_validate_rate()
69 if (rate == emc->dvfs[i].rate) in tegra186_emc_validate_rate()
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/qcom/ |
| D | clk-cbf-8996.c | 1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk.h>
7 #include <linux/clk-provider.h>
8 #include <linux/interconnect-clk.h>
9 #include <linux/interconnect-provider.h>
15 #include <dt-bindings/interconnect/qcom,msm8996-cbf.h>
17 #include "clk-alpha-pll.h"
18 #include "clk-regmap.h"
123 regmap_read(clkr->regmap, mux->reg, &val); in clk_cbf_8996_mux_get_parent()
136 return regmap_update_bits(clkr->regmap, mux->reg, CBF_MUX_PARENT_MASK, val); in clk_cbf_8996_mux_set_parent()
[all …]
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| /kernel/linux/linux-6.6/drivers/phy/renesas/ |
| D | phy-rcar-gen3-usb3.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas R-Car Gen3 for USB3.0 PHY driver
8 #include <linux/clk.h>
65 writew(val, r->base + USB30_CLKSET1); in write_clkset1_for_usb_extal()
72 switch (r->ssc_range) { in rcar_gen3_phy_usb3_enable_ssc()
83 dev_err(&r->phy->dev, "%s: unsupported range (%x)\n", __func__, in rcar_gen3_phy_usb3_enable_ssc()
84 r->ssc_range); in rcar_gen3_phy_usb3_enable_ssc()
88 writew(val, r->base + USB30_SSC_SET); in rcar_gen3_phy_usb3_enable_ssc()
94 if (r->ssc_range) in rcar_gen3_phy_usb3_select_usb_extal()
97 r->base + USB30_CLKSET0); in rcar_gen3_phy_usb3_select_usb_extal()
[all …]
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| /kernel/linux/linux-5.10/drivers/phy/renesas/ |
| D | phy-rcar-gen3-usb3.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas R-Car Gen3 for USB3.0 PHY driver
8 #include <linux/clk.h>
65 writew(val, r->base + USB30_CLKSET1); in write_clkset1_for_usb_extal()
72 switch (r->ssc_range) { in rcar_gen3_phy_usb3_enable_ssc()
83 dev_err(&r->phy->dev, "%s: unsupported range (%x)\n", __func__, in rcar_gen3_phy_usb3_enable_ssc()
84 r->ssc_range); in rcar_gen3_phy_usb3_enable_ssc()
88 writew(val, r->base + USB30_SSC_SET); in rcar_gen3_phy_usb3_enable_ssc()
94 if (r->ssc_range) in rcar_gen3_phy_usb3_select_usb_extal()
97 r->base + USB30_CLKSET0); in rcar_gen3_phy_usb3_select_usb_extal()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/ |
| D | clk.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
9 #include <linux/clk.h>
10 #include <linux/clk-provider.h>
11 #include <linux/clk/clk-conf.h>
25 #include "clk.h"
100 #include <trace/events/clk.h>
102 struct clk { struct
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| D | clk-mt7622-eth.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
14 #include "clk-mtk.h"
15 #include "clk-gate.h"
17 #include <dt-bindings/clock/mt7622-clk.h>
71 struct device_node *node = pdev->dev.of_node; in clk_mt7622_ethsys_init()
81 dev_err(&pdev->dev, in clk_mt7622_ethsys_init()
82 "could not register clock provider: %s: %d\n", in clk_mt7622_ethsys_init()
83 pdev->name, r); in clk_mt7622_ethsys_init()
93 struct device_node *node = pdev->dev.of_node; in clk_mt7622_sgmiisys_init()
[all …]
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| D | clk-mt2701-g3d.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
14 #include "clk-mtk.h"
15 #include "clk-gate.h"
17 #include <dt-bindings/clock/mt2701-clk.h>
41 struct device_node *node = pdev->dev.of_node; in clk_mt2701_g3dsys_init()
51 dev_err(&pdev->dev, in clk_mt2701_g3dsys_init()
52 "could not register clock provider: %s: %d\n", in clk_mt2701_g3dsys_init()
53 pdev->name, r); in clk_mt2701_g3dsys_init()
62 .compatible = "mediatek,mt2701-g3dsys",
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| D | clk-mt7629-eth.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
14 #include "clk-mtk.h"
15 #include "clk-gate.h"
17 #include <dt-bindings/clock/mt7629-clk.h>
82 struct device_node *node = pdev->dev.of_node; in clk_mt7629_ethsys_init()
87 return -ENOMEM; in clk_mt7629_ethsys_init()
93 dev_err(&pdev->dev, in clk_mt7629_ethsys_init()
94 "could not register clock provider: %s: %d\n", in clk_mt7629_ethsys_init()
95 pdev->name, r); in clk_mt7629_ethsys_init()
[all …]
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| D | clk-mt7629-hif.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
14 #include "clk-mtk.h"
15 #include "clk-gate.h"
17 #include <dt-bindings/clock/mt7629-clk.h>
77 struct device_node *node = pdev->dev.of_node; in clk_mt7629_ssusbsys_init()
87 dev_err(&pdev->dev, in clk_mt7629_ssusbsys_init()
88 "could not register clock provider: %s: %d\n", in clk_mt7629_ssusbsys_init()
89 pdev->name, r); in clk_mt7629_ssusbsys_init()
99 struct device_node *node = pdev->dev.of_node; in clk_mt7629_pciesys_init()
[all …]
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| D | clk-mt7622-hif.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
14 #include "clk-mtk.h"
15 #include "clk-gate.h"
17 #include <dt-bindings/clock/mt7622-clk.h>
82 struct device_node *node = pdev->dev.of_node; in clk_mt7622_ssusbsys_init()
92 dev_err(&pdev->dev, in clk_mt7622_ssusbsys_init()
93 "could not register clock provider: %s: %d\n", in clk_mt7622_ssusbsys_init()
94 pdev->name, r); in clk_mt7622_ssusbsys_init()
104 struct device_node *node = pdev->dev.of_node; in clk_mt7622_pciesys_init()
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/ |
| D | clk.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
9 #include <linux/clk.h>
10 #include <linux/clk-provider.h>
11 #include <linux/clk/clk-conf.h>
25 #include "clk.h"
100 #include <trace/events/clk.h>
102 struct clk { struct
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| D | clk-mt7629-eth.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
12 #include "clk-mtk.h"
13 #include "clk-gate.h"
15 #include <dt-bindings/clock/mt7629-clk.h>
76 struct device_node *node = pdev->dev.of_node; in clk_mt7629_ethsys_init()
81 return -ENOMEM; in clk_mt7629_ethsys_init()
83 mtk_clk_register_gates(&pdev->dev, node, eth_clks, in clk_mt7629_ethsys_init()
88 dev_err(&pdev->dev, in clk_mt7629_ethsys_init()
89 "could not register clock provider: %s: %d\n", in clk_mt7629_ethsys_init()
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/interconnect/ |
| D | qcom,qdu1000-rpmh.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,qdu1000-rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on QDU1000
10 - Georgi Djakov <djakov@kernel.org>
11 - Odelu Kukatla <quic_okukatla@quicinc.com>
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
17 associated with each execution environment. Provider nodes must point to at
18 least one RPMh device child node pertaining to their RSC and each provider
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