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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/
Drohm,bd9576-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd9576-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 powering the R-Car series processors.
21 - rohm,bd9576
22 - rohm,bd9573
32 rohm,vout1-en-low:
35 controlled by a GPIO. This is dictated by state of vout1-en pin during
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/kernel/linux/linux-5.10/drivers/regulator/
Dbd9571mwv-regulator.c1 // SPDX-License-Identifier: GPL-2.0
3 * ROHM BD9571MWV-M regulator driver
22 /* DDR Backup Power */
23 u8 bkup_mode_cnt_keepon; /* from "rohm,ddr-backup-power" */
56 ret = regmap_read(rdev->regmap, BD9571MWV_AVS_SET_MONI, &val); in bd9571mwv_avs_get_moni_state()
64 unsigned int sel) in bd9571mwv_avs_set_voltage_sel_regmap() argument
72 return regmap_write_bits(rdev->regmap, BD9571MWV_AVS_VD09_VID(ret), in bd9571mwv_avs_set_voltage_sel_regmap()
73 rdev->desc->vsel_mask, sel); in bd9571mwv_avs_set_voltage_sel_regmap()
85 ret = regmap_read(rdev->regmap, BD9571MWV_AVS_VD09_VID(ret), &val); in bd9571mwv_avs_get_voltage_sel_regmap()
89 val &= rdev->desc->vsel_mask; in bd9571mwv_avs_get_voltage_sel_regmap()
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Dbd9576-regulator.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/mfd/rohm-bd957x.h>
11 #include <linux/mfd/rohm-generic.h>
47 const struct regulator_desc *desc = rdev->desc; in bd957x_vout34_list_voltage()
48 int multiplier = selector & desc->vsel_mask & 0x7f; in bd957x_vout34_list_voltage()
55 return desc->fixed_uV - tune; in bd957x_vout34_list_voltage()
57 return desc->fixed_uV + tune; in bd957x_vout34_list_voltage()
63 const struct regulator_desc *desc = rdev->desc; in bd957x_list_voltage()
64 int index = selector & desc->vsel_mask & 0x7f; in bd957x_list_voltage()
67 index += desc->n_voltages/2; in bd957x_list_voltage()
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/kernel/linux/linux-6.6/drivers/regulator/
Dbd9571mwv-regulator.c1 // SPDX-License-Identifier: GPL-2.0
3 * ROHM BD9571MWV-M and BD9574MWF-M regulator driver
12 #include <linux/mfd/rohm-generic.h>
23 /* DDR Backup Power */
24 u8 bkup_mode_cnt_keepon; /* from "rohm,ddr-backup-power" */
57 ret = regmap_read(rdev->regmap, BD9571MWV_AVS_SET_MONI, &val); in bd9571mwv_avs_get_moni_state()
65 unsigned int sel) in bd9571mwv_avs_set_voltage_sel_regmap() argument
73 return regmap_write_bits(rdev->regmap, BD9571MWV_AVS_VD09_VID(ret), in bd9571mwv_avs_set_voltage_sel_regmap()
74 rdev->desc->vsel_mask, sel); in bd9571mwv_avs_set_voltage_sel_regmap()
86 ret = regmap_read(rdev->regmap, BD9571MWV_AVS_VD09_VID(ret), &val); in bd9571mwv_avs_get_voltage_sel_regmap()
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Dbd9576-regulator.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/mfd/rohm-bd957x.h>
11 #include <linux/mfd/rohm-generic.h>
137 const struct regulator_desc *desc = rdev->desc; in bd957x_vout34_list_voltage()
138 int multiplier = selector & desc->vsel_mask & 0x7f; in bd957x_vout34_list_voltage()
145 return desc->fixed_uV - tune; in bd957x_vout34_list_voltage()
147 return desc->fixed_uV + tune; in bd957x_vout34_list_voltage()
153 const struct regulator_desc *desc = rdev->desc; in bd957x_list_voltage()
154 int index = selector & desc->vsel_mask & 0x7f; in bd957x_list_voltage()
157 index += desc->n_voltages/2; in bd957x_list_voltage()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/mmc/sdhci-am654.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: mmc-controller.yaml#
19 - ti,am654-sdhci-5.1
20 - ti,j721e-sdhci-8bit
21 - ti,j721e-sdhci-4bit
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: sdhci-common.yaml#
19 - enum:
20 - ti,am62-sdhci
21 - ti,am64-sdhci-4bit
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/kernel/linux/linux-6.6/arch/arm/boot/dts/aspeed/
Daspeed-bmc-ampere-mtmitchell.dts1 // SPDX-License-Identifier: GPL-2.0-only
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/gpio/aspeed-gpio.h>
12 compatible = "ampere,mtmitchell-bmc", "aspeed,ast2600";
20 stdout-path = &uart5;
28 reserved-memory {
29 #address-cells = <1>;
30 #size-cells = <1>;
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/
Dk3-j7200-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 atf-sram@0 {
21 scm_conf: scm-conf@100000 {
22 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
24 #address-cells = <1>;
25 #size-cells = <1>;
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Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
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/kernel/linux/linux-6.6/drivers/staging/media/atomisp/pci/
Datomisp_v4l2.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2017 Intel Corporation. All Rights Reserved.
30 #include <media/v4l2-fwnode.h>
41 #include "atomisp-regs.h"
55 /* G-Min addition: pull this in from intel_mid_pm.h */
341 video->pad.flags = MEDIA_PAD_FL_SINK; in atomisp_video_init()
342 ret = media_entity_pads_init(&video->vdev.entity, 1, &video->pad); in atomisp_video_init()
347 strscpy(video->vdev.name, "ATOMISP video output", sizeof(video->vdev.name)); in atomisp_video_init()
348 video->vdev.fops = &atomisp_fops; in atomisp_video_init()
349 video->vdev.ioctl_ops = &atomisp_ioctl_ops; in atomisp_video_init()
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/ti/
Dk3-am62-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 #interrupt-cells = <3>;
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Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
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Dk3-j7200-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
9 serdes_refclk: serdes-refclk {
10 #clock-cells = <0>;
11 compatible = "fixed-clock";
17 compatible = "mmio-sram";
19 #address-cells = <1>;
20 #size-cells = <1>;
23 atf-sram@0 {
28 scm_conf: scm-conf@100000 {
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Dk3-am64-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
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Dk3-j784s4-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 atf-sram@0 {
20 tifs-sram@1f0000 {
24 l3cache-sram@200000 {
29 gic500: interrupt-controller@1800000 {
30 compatible = "arm,gic-v3";
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Dk3-j721s2-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
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Dk3-j721e-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/phy/phy-ti.h>
9 #include <dt-bindings/mux/mux.h>
11 #include "k3-serdes.h"
14 cmn_refclk: clock-cmnrefclk {
15 #clock-cells = <0>;
16 compatible = "fixed-clock";
17 clock-frequency = <0>;
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dstm32mp15xx-dhcom-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
6 #include "stm32mp15-pinctrl.dtsi"
7 #include "stm32mp15xxaa-pinctrl.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/mfd/st,stpmic1.h>
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
27 compatible = "shared-dma-pool";
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/kernel/linux/linux-5.10/drivers/mtd/nand/raw/
Ddenali.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright © 2009-2010, Intel Corporation and its suppliers.
6 * Copyright (c) 2017-2019 Socionext Inc.
12 #include <linux/dma-mapping.h>
23 #define DENALI_NAND_NAME "denali-nand"
31 #define DENALI_MAP10 (2 << 26) /* high-level control plane */
39 #define DENALI_BANK(denali) ((denali)->active_bank << 24)
41 #define DENALI_INVALID_BANK -1
50 return container_of(chip->controller, struct denali_controller, in to_denali_controller()
55 * Direct Addressing - the slave address forms the control information (command
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/kernel/linux/linux-6.6/drivers/mtd/nand/raw/
Ddenali.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright © 2009-2010, Intel Corporation and its suppliers.
6 * Copyright (c) 2017-2019 Socionext Inc.
12 #include <linux/dma-mapping.h>
23 #define DENALI_NAND_NAME "denali-nand"
31 #define DENALI_MAP10 (2 << 26) /* high-level control plane */
39 #define DENALI_BANK(denali) ((denali)->active_bank << 24)
41 #define DENALI_INVALID_BANK -1
50 return container_of(chip->controller, struct denali_controller, in to_denali_controller()
55 * Direct Addressing - the slave address forms the control information (command
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/kernel/linux/linux-6.6/arch/arm/boot/dts/st/
Dstm32mp157c-phycore-stm32mp15-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de>
4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/leds/leds-pca9532.h>
14 #include <dt-bindings/mfd/st,stpmic1.h>
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/kernel/linux/linux-6.6/drivers/perf/
Dalibaba_uncore_drw_pmu.c1 // SPDX-License-Identifier: GPL-2.0
3 * Alibaba DDR Sub-System Driveway PMU driver
55 /* PMU EVENT SEL 0-3 are paired in 32-bit registers on a 4-byte stride */
57 /* counter 0-3 use sel0, counter 4-7 use sel1...*/
65 /* PMU COMMON COUNTER 0-15, are paired in 32-bit registers on a 4-byte stride */
111 #define GET_DRW_EVENTID(event) FIELD_GET(DRW_CONFIG_EVENTID, (event)->attr.config)
120 return sprintf(buf, "%s\n", (char *)eattr->var); in ali_drw_pmu_format_show()
133 return sprintf(page, "config=0x%lx\n", (unsigned long)eattr->var); in ali_drw_pmu_event_show()
209 ALI_DRW_PMU_FORMAT_ATTR(event, "config:0-7"),
224 return cpumap_print_to_pagebuf(true, buf, cpumask_of(drw_pmu->cpu)); in ali_drw_pmu_cpumask_show()
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/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/
Dam43xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 sys_clkin_ck: clock-sys-clkin-31@40 {
9 #clock-cells = <0>;
10 compatible = "ti,mux-clock";
11 clock-output-names = "sys_clkin_ck";
13 ti,bit-shift = <31>;
17 crystal_freq_sel_ck: clock-crystal-freq-sel-29@40 {
18 #clock-cells = <0>;
19 compatible = "ti,mux-clock";
20 clock-output-names = "crystal_freq_sel_ck";
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
10 #include "rk3399-op1-opp.dtsi"
14 stdout-path = "serial2:115200n8";
23 * - Rails that only connect to the EC (or devices that the EC talks to)
25 * - Rails _are_ included if the rails go to the AP even if the AP
34 * - The EC controls the enable and the EC always enables a rail as
36 * - The rails are actually connected to each other by a jumper and
41 ppvar_sys: ppvar-sys {
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