| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/ |
| D | rockchip-dw-mshc.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 controller that are not already included in the synopsys-dw-mshc-common.yaml
17 - $ref: synopsys-dw-mshc-common.yaml#
20 - Heiko Stuebner <heiko@sntech.de>
27 - const: rockchip,rk2928-dw-mshc
29 - const: rockchip,rk3288-dw-mshc
30 - items:
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | rockchip-dw-mshc.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 controller that are not already included in the synopsys-dw-mshc-common.yaml
17 - $ref: "synopsys-dw-mshc-common.yaml#"
20 - Heiko Stuebner <heiko@sntech.de>
27 - const: rockchip,rk2928-dw-mshc
29 - const: rockchip,rk3288-dw-mshc
30 - items:
[all …]
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| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | dw_mmc-rockchip.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/mmc/slot-gpio.h>
16 #include "dw_mmc-pltfm.h"
29 struct dw_mci_rockchip_priv_data *priv = host->priv; in dw_mci_rk3288_set_ios()
34 if (ios->clock == 0) in dw_mci_rk3288_set_ios()
41 * ios->clock = (div == 0) ? bus_hz : (bus_hz / (2 * div)) in dw_mci_rk3288_set_ios()
44 * DDR52 8-bit mode. in dw_mci_rk3288_set_ios()
46 if (ios->bus_width == MMC_BUS_WIDTH_8 && in dw_mci_rk3288_set_ios()
47 ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_rk3288_set_ios()
48 cclkin = 2 * ios->clock * RK3288_CLKGEN_DIV; in dw_mci_rk3288_set_ios()
[all …]
|
| D | sdhci-of-arasan.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
9 * Based on sdhci-of-esdhc.c
18 #include <linux/clk-provider.h>
25 #include <linux/firmware/xlnx-zynqmp.h>
28 #include "sdhci-cqhci.h"
29 #include "sdhci-pltfm.h"
48 /* Default settings for ZynqMP Clock Phases */
56 * On some SoCs the syscon area has a feature where the upper 16-bits of
57 * each 32-bit register act as a write mask for the lower 16-bits. This allows
[all …]
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| /kernel/linux/linux-6.6/drivers/mmc/host/ |
| D | dw_mmc-rockchip.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/mmc/slot-gpio.h>
16 #include "dw_mmc-pltfm.h"
31 struct dw_mci_rockchip_priv_data *priv = host->priv; in dw_mci_rk3288_set_ios()
36 if (ios->clock == 0) in dw_mci_rk3288_set_ios()
43 * ios->clock = (div == 0) ? bus_hz : (bus_hz / (2 * div)) in dw_mci_rk3288_set_ios()
46 * DDR52 8-bit mode. in dw_mci_rk3288_set_ios()
48 if (ios->bus_width == MMC_BUS_WIDTH_8 && in dw_mci_rk3288_set_ios()
49 ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_rk3288_set_ios()
50 cclkin = 2 * ios->clock * RK3288_CLKGEN_DIV; in dw_mci_rk3288_set_ios()
[all …]
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| /kernel/linux/linux-6.6/Documentation/networking/ |
| D | can.rst | 2 SocketCAN - Controller Area Network
20 .. _socketcan-motivation:
29 functionality. Usually, there is only a hardware-specific device
32 Queueing of frames and higher-level transport protocols like ISO-TP
34 character-device implementations support only one single process to
47 protocol family module and also vice-versa. Also, the protocol family
57 communicate using a specific transport protocol, e.g. ISO-TP, just
60 CAN-IDs, frames, etc.
62 Similar functionality visible from user-space could be provided by a
74 * **Abstraction:** In most existing character-device implementations, the
[all …]
|
| /kernel/linux/linux-5.10/Documentation/networking/ |
| D | can.rst | 2 SocketCAN - Controller Area Network
20 .. _socketcan-motivation:
29 functionality. Usually, there is only a hardware-specific device
32 Queueing of frames and higher-level transport protocols like ISO-TP
34 character-device implementations support only one single process to
47 protocol family module and also vice-versa. Also, the protocol family
57 communicate using a specific transport protocol, e.g. ISO-TP, just
60 CAN-IDs, frames, etc.
62 Similar functionality visible from user-space could be provided by a
74 * **Abstraction:** In most existing character-device implementations, the
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/rockchip/ |
| D | clk-mmc-phase.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk-provider.h>
41 * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
54 /* Constant signal, no measurable phase shift */ in rockchip_mmc_get_phase()
58 raw_value = readl(mmc_clock->reg) >> (mmc_clock->shift); in rockchip_mmc_get_phase()
86 * MMC host to the card, which expects the phase clock inherits in rockchip_mmc_set_phase()
98 return -EINVAL; in rockchip_mmc_set_phase()
106 * actually go non-monotonic. We don't go _too_ monotonic in rockchip_mmc_set_phase()
125 * don't overflow 32-bit / 64-bit numbers. in rockchip_mmc_set_phase()
138 writel(HIWORD_UPDATE(raw_value, 0x07ff, mmc_clock->shift), in rockchip_mmc_set_phase()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/rockchip/ |
| D | clk-mmc-phase.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk-provider.h>
41 * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
54 /* Constant signal, no measurable phase shift */ in rockchip_mmc_get_phase()
58 raw_value = readl(mmc_clock->reg) >> (mmc_clock->shift); in rockchip_mmc_get_phase()
86 * MMC host to the card, which expects the phase clock inherits in rockchip_mmc_set_phase()
98 return -EINVAL; in rockchip_mmc_set_phase()
106 * actually go non-monotonic. We don't go _too_ monotonic in rockchip_mmc_set_phase()
125 * don't overflow 32-bit / 64-bit numbers. in rockchip_mmc_set_phase()
138 writel(HIWORD_UPDATE(raw_value, 0x07ff, mmc_clock->shift), in rockchip_mmc_set_phase()
[all …]
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| /kernel/linux/linux-5.10/Documentation/driver-api/media/drivers/ |
| D | cx88-devel.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 -------------------------------------------
13 .. code-block:: none
15 Previous default from DScaler: 0x1c1f0008
16 Digit 8: 31-28
19 Digit 7: 27-24 (0xc = 12 = b1100 )
24 Digits 6,5: 23-16
25 25-16: COMB_RANGE = 0x1f [default] (9 bits -> max 512)
27 Digit 4: 15-12
33 Digit 3: 11-8
[all …]
|
| /kernel/linux/linux-6.6/Documentation/driver-api/media/drivers/ |
| D | cx88-devel.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 -------------------------------------------
13 .. code-block:: none
15 Previous default from DScaler: 0x1c1f0008
16 Digit 8: 31-28
19 Digit 7: 27-24 (0xc = 12 = b1100 )
24 Digits 6,5: 23-16
25 25-16: COMB_RANGE = 0x1f [default] (9 bits -> max 512)
27 Digit 4: 15-12
33 Digit 3: 11-8
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_audio.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc.
35 aud->base.ctx
40 (aud->regs->reg)
44 aud->shifts->field_name, aud->masks->field_name
99 for (index = 0; index < audio_info->mode_count; index++) { in is_audio_format_supported()
100 if (audio_info->modes[index].format_code == audio_format_code) { in is_audio_format_supported()
104 if (audio_info->modes[index].channel_count > in is_audio_format_supported()
105 audio_info->modes[max_channe_index].channel_count) { in is_audio_format_supported()
123 /*For HDMI, calculate if specified sample rates can fit into a given timing */
142 if ((crtc_info->requested_pixel_clock_100Hz <= 270000) && in check_audio_bandwidth_hdmi()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_audio.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc.
37 aud->base.ctx
42 (aud->regs->reg)
46 aud->shifts->field_name, aud->masks->field_name
107 for (index = 0; index < audio_info->mode_count; index++) { in is_audio_format_supported()
108 if (audio_info->modes[index].format_code == audio_format_code) { in is_audio_format_supported()
112 if (audio_info->modes[index].channel_count > in is_audio_format_supported()
113 audio_info->modes[max_channe_index].channel_count) { in is_audio_format_supported()
131 /*For HDMI, calculate if specified sample rates can fit into a given timing */
150 if ((crtc_info->requested_pixel_clock_100Hz <= 270000) && in check_audio_bandwidth_hdmi()
[all …]
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| /kernel/linux/linux-6.6/sound/soc/meson/ |
| D | axg-tdm-interface.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
11 #include <sound/soc-dai.h>
13 #include "axg-tdm.h"
53 dev_err(dai->dev, "interface has no slot\n"); in axg_tdm_set_tdm_slots()
54 return -EINVAL; in axg_tdm_set_tdm_slots()
57 iface->slots = slots; in axg_tdm_set_tdm_slots()
76 default: in axg_tdm_set_tdm_slots()
77 dev_err(dai->dev, "unsupported slot width: %d\n", slot_width); in axg_tdm_set_tdm_slots()
78 return -EINVAL; in axg_tdm_set_tdm_slots()
81 iface->slot_width = slot_width; in axg_tdm_set_tdm_slots()
[all …]
|
| /kernel/linux/linux-5.10/sound/soc/meson/ |
| D | axg-tdm-interface.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
11 #include <sound/soc-dai.h>
13 #include "axg-tdm.h"
41 dai->playback_dma_data; in axg_tdm_set_tdm_slots()
43 dai->capture_dma_data; in axg_tdm_set_tdm_slots()
52 dev_err(dai->dev, "interface has no slot\n"); in axg_tdm_set_tdm_slots()
53 return -EINVAL; in axg_tdm_set_tdm_slots()
56 iface->slots = slots; in axg_tdm_set_tdm_slots()
75 default: in axg_tdm_set_tdm_slots()
76 dev_err(dai->dev, "unsupported slot width: %d\n", slot_width); in axg_tdm_set_tdm_slots()
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/rockchip/ |
| D | rv1126-edgeble-neu2.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 compatible = "edgeble,neural-compute-module-2", "rockchip,rv1126";
14 vccio_flash: vccio-flash-regulator {
15 compatible = "regulator-fixed";
16 enable-active-high;
18 pinctrl-names = "default";
19 pinctrl-0 = <&flash_vol_sel>;
20 regulator-name = "vccio_flash";
21 regulator-always-on;
22 regulator-boot-on;
[all …]
|
| D | rv1126-edgeble-neu2-io.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "rv1126-edgeble-neu2.dtsi"
13 compatible = "edgeble,neural-compute-module-2-io",
14 "edgeble,neural-compute-module-2", "rockchip,rv1126";
21 stdout-path = "serial2:1500000n8";
24 vcc12v_dcin: vcc12v-dcin-regulator {
25 compatible = "regulator-fixed";
26 regulator-name = "vcc12v_dcin";
27 regulator-always-on;
[all …]
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| /kernel/linux/linux-6.6/Documentation/trace/rv/ |
| D | da_monitor_instrumentation.rst | 51 --------------------------
84 Otherwise, the monitor and the system could be out-of-sync.
113 ----------------------------
132 But no change was required because: by default, these functions *attach* and
136 -----------------------
139 kernel event, at the monitoring enable phase.
143 adds "rv_attach_trace_probe()" function call for each model event in the enable phase, as
146 For example, from the wip sample model::
163 The probes then need to be detached at the disable phase.
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/ |
| D | rk3368-lion-haikou.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "rk3368-lion.dtsi"
10 model = "Theobroma Systems RK3368-uQ7 Baseboard";
11 compatible = "tsd,rk3368-lion-haikou", "rockchip,rk3368";
14 stdout-path = "serial0:115200n8";
28 pinctrl-0 = <&module_led_pins>, <&sd_card_led_pin>;
30 sd_card_led: led-3 {
33 linux,default-trigger = "mmc0";
37 dc_12v: dc-12v {
[all …]
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/ |
| D | rk3368-lion-haikou.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "rk3368-lion.dtsi"
10 model = "Theobroma Systems RK3368-uQ7 Baseboard";
11 compatible = "tsd,rk3368-lion-haikou", "rockchip,rk3368";
18 stdout-path = "serial0:115200n8";
32 pinctrl-0 = <&module_led_pins>, <&sd_card_led_pin>;
34 sd_card_led: led-3 {
37 linux,default-trigger = "mmc0";
41 dc_12v: dc-12v {
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | rk3288-veyron-sdmmc.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 sdcard-supply = <&vccio_sd>;
18 sdmmc_bus4: sdmmc-bus4 {
25 sdmmc_clk: sdmmc-clk {
29 sdmmc_cmd: sdmmc-cmd {
39 sdmmc_cd_disabled: sdmmc-cd-disabled {
44 sdmmc_cd_pin: sdmmc-cd-pin {
51 vcc9-supply = <&vcc_5v>;
55 regulator-name = "vccio_sd";
56 regulator-min-microvolt = <1800000>;
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/scripts/python/ |
| D | gecko.py | 1 # gecko.py - Convert perf record output to Firefox's gecko profile format
2 # SPDX-License-Identifier: GPL-2.0
9 # perf record -a -g -F 99 sleep 60
14 # perf script gecko -F 99 -a sleep 60
32 # Add the Perf-Trace-Util library to the Python path
34 '/scripts/python/Perf-Trace-Util/lib/Perf/Trace')
48 # https://github.com/firefox-devtools/profiler/blob/53970305b51b9b472e26d7457fee1d66cd4e2737/src/ty…
49 …llow Brendan Gregg's Flamegraph convention: orange for kernel and yellow for user space by default.
53 PRODUCT = os.popen('uname -op').read().strip()
68 # https://github.com/firefox-devtools/profiler/blob/53970305b51b9b472e26d7457fee1d66cd4e2737/src/ty…
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| D | skl_scaler.c | 1 // SPDX-License-Identifier: MIT
14 * The hardware phase 0.0 refers to the center of the pixel.
15 * We want to start from the top/left edge which is phase
16 * -0.5. That matches how the hardware calculates the scaling
17 * factors (from top-left of the first pixel to bottom-right
21 * adjust that so that the chroma sample position lands in
28 * The same behaviour is observed on pre-SKL platforms as well.
30 * Theory behind the formula (note that we ignore sub-pixel
32 * s = source sample position
33 * d = destination sample position
[all …]
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| /kernel/linux/linux-5.10/net/ipv4/ |
| D | tcp_bbr.c | 21 * +---> STARTUP ----+
24 * | DRAIN ----+
27 * +---> PROBE_BW ----+
30 * | +----+ |
32 * +---- PROBE_RTT <--+
37 * A long-lived BBR flow spends the vast majority of its time remaining
41 * sample that matches or decreases its min_rtt estimate for 10 seconds, then
42 * it briefly enters PROBE_RTT to cut inflight to a minimum value to re-probe
43 * the path's two-way propagation delay (min_rtt). When exiting PROBE_RTT, if
48 * "BBR: Congestion-Based Congestion Control",
[all …]
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| /kernel/linux/linux-6.6/net/ipv4/ |
| D | tcp_bbr.c | 21 * +---> STARTUP ----+
24 * | DRAIN ----+
27 * +---> PROBE_BW ----+
30 * | +----+ |
32 * +---- PROBE_RTT <--+
37 * A long-lived BBR flow spends the vast majority of its time remaining
41 * sample that matches or decreases its min_rtt estimate for 10 seconds, then
42 * it briefly enters PROBE_RTT to cut inflight to a minimum value to re-probe
43 * the path's two-way propagation delay (min_rtt). When exiting PROBE_RTT, if
48 * "BBR: Congestion-Based Congestion Control",
[all …]
|