| /kernel/linux/linux-6.6/sound/soc/atmel/ |
| D | atmel-pcm.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * at91-pcm.h - ALSA PCM interface for the Atmel AT91 SoC.
10 * Based on at91-pcm. by:
14 * Based on pxa2xx-pcm.c by:
24 #include <linux/atmel-ssc.h>
40 u32 ssc_enable; /* SSC recv/trans enable */
41 u32 ssc_disable; /* SSC recv/trans disable */
42 u32 ssc_error; /* SSC error conditions */
43 u32 ssc_endx; /* SSC ENDTX or ENDRX */
44 u32 ssc_endbuf; /* SSC TXBUFE or RXBUFF */
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| D | atmel_ssc_dai.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * atmel_ssc_dai.c -- ALSA SoC ATMEL SSC Audio Layer Platform driver
11 * Based on at91-ssc.c by
25 #include <linux/atmel-ssc.h>
32 #include "atmel-pcm.h"
39 * SSC PDC registers required by the PCM DMA engine.
56 * SSC & PDC status bits for transmit and receive.
136 * SSC interrupt handler. Passes PDC interrupts to the DMA
147 ssc_sr = (unsigned long)ssc_readl(ssc_p->ssc->regs, SR) in atmel_ssc_interrupt()
148 & (unsigned long)ssc_readl(ssc_p->ssc->regs, IMR); in atmel_ssc_interrupt()
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| /kernel/linux/linux-5.10/sound/soc/atmel/ |
| D | atmel-pcm.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * at91-pcm.h - ALSA PCM interface for the Atmel AT91 SoC.
10 * Based on at91-pcm. by:
14 * Based on pxa2xx-pcm.c by:
24 #include <linux/atmel-ssc.h>
40 u32 ssc_enable; /* SSC recv/trans enable */
41 u32 ssc_disable; /* SSC recv/trans disable */
42 u32 ssc_error; /* SSC error conditions */
43 u32 ssc_endx; /* SSC ENDTX or ENDRX */
44 u32 ssc_endbuf; /* SSC TXBUFE or RXBUFF */
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| D | atmel_ssc_dai.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * atmel_ssc_dai.c -- ALSA SoC ATMEL SSC Audio Layer Platform driver
11 * Based on at91-ssc.c by
25 #include <linux/atmel-ssc.h>
32 #include "atmel-pcm.h"
39 * SSC PDC registers required by the PCM DMA engine.
56 * SSC & PDC status bits for transmit and receive.
136 * SSC interrupt handler. Passes PDC interrupts to the DMA
147 ssc_sr = (unsigned long)ssc_readl(ssc_p->ssc->regs, SR) in atmel_ssc_interrupt()
148 & (unsigned long)ssc_readl(ssc_p->ssc->regs, IMR); in atmel_ssc_interrupt()
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| /kernel/linux/linux-6.6/drivers/mmc/host/ |
| D | sdhci-pci-gli.c | 1 // SPDX-License-Identifier: GPL-2.0+
7 * Version: v0.9.0 (2019-08-08)
18 #include "sdhci-cqhci.h"
19 #include "sdhci-pci.h"
335 /* enable tuning parameters control */ in gli_set_9750()
392 if (!host->tuning_done) { in __sdhci_execute_tuning_9750()
405 if (!host->tuning_done) { in __sdhci_execute_tuning_9750()
407 mmc_hostname(host->mmc)); in __sdhci_execute_tuning_9750()
408 return -ETIMEDOUT; in __sdhci_execute_tuning_9750()
412 mmc_hostname(host->mmc)); in __sdhci_execute_tuning_9750()
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| /kernel/linux/linux-5.10/include/linux/ |
| D | atmel-ssc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
28 void ssc_free(struct ssc_device *ssc);
30 /* SSC register offsets */
32 /* SSC Control Register */
45 /* SSC Clock Mode Register */
50 /* SSC Receive Clock Mode Register */
69 /* SSC Receive Frame Mode Register */
92 /* SSC Transmit Clock Mode Register */
109 /* SSC Transmit Frame Mode Register */
134 /* SSC Receive Hold Register */
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| /kernel/linux/linux-6.6/include/linux/ |
| D | atmel-ssc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
28 void ssc_free(struct ssc_device *ssc);
30 /* SSC register offsets */
32 /* SSC Control Register */
45 /* SSC Clock Mode Register */
50 /* SSC Receive Clock Mode Register */
69 /* SSC Receive Frame Mode Register */
92 /* SSC Transmit Clock Mode Register */
109 /* SSC Transmit Frame Mode Register */
134 /* SSC Receive Hold Register */
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| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | sdhci-pci-gli.c | 1 // SPDX-License-Identifier: GPL-2.0+
7 * Version: v0.9.0 (2019-08-08)
16 #include "sdhci-pci.h"
218 /* enable tuning parameters control */ in gli_set_9750()
275 if (!host->tuning_done) { in __sdhci_execute_tuning_9750()
288 if (!host->tuning_done) { in __sdhci_execute_tuning_9750()
290 mmc_hostname(host->mmc)); in __sdhci_execute_tuning_9750()
291 return -ETIMEDOUT; in __sdhci_execute_tuning_9750()
295 mmc_hostname(host->mmc)); in __sdhci_execute_tuning_9750()
298 return -EAGAIN; in __sdhci_execute_tuning_9750()
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| /kernel/linux/linux-6.6/include/linux/clk/ |
| D | ti.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
10 #include <linux/clk-provider.h>
14 * struct clk_omap_reg - OMAP register declaration
26 * struct dpll_data - DPLL registers and integration data
40 * @max_multiplier: maximum valid non-bypass multiplier value (actual)
42 * @min_divider: minimum valid non-bypass divider value (actual)
43 * @max_divider: maximum valid non-bypass divider value (actual)
53 * @lpmode_mask: mask of the DPLL low-power mode bitfield in @control_reg
55 * @auto_recal_bit: bitshift of the driftguard enable bit in @control_reg
58 * @ssc_deltam_reg: register containing the DPLL SSC frequency spreading
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| D | intel_pch_refclk.c | 1 // SPDX-License-Identifier: MIT
19 drm_err(&dev_priv->drm, "FDI mPHY reset assert timeout\n"); in lpt_fdi_reset_mphy()
25 drm_err(&dev_priv->drm, "FDI mPHY reset de-assert timeout\n"); in lpt_fdi_reset_mphy()
111 mutex_lock(&dev_priv->sb_lock); in lpt_disable_iclkip()
117 mutex_unlock(&dev_priv->sb_lock); in lpt_disable_iclkip()
130 p->iclk_virtual_root_freq = 172800 * 1000; in iclkip_params_init()
131 p->iclk_pi_range = 64; in iclkip_params_init()
136 return DIV_ROUND_CLOSEST(p->iclk_virtual_root_freq, in lpt_iclkip_freq()
137 p->desired_divisor << p->auxdiv); in lpt_iclkip_freq()
145 * but the adjusted_mode->crtc_clock in KHz. To get the in lpt_compute_iclkip()
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ti/ |
| D | dpll.txt | 3 Binding status: Unstable - ABI compatibility may be broken in the future
6 register-mapped DPLL with usually two selectable input clocks
11 sub-types, which effectively result in slightly different setup
14 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
17 - compatible : shall be one of:
18 "ti,omap3-dpll-clock",
19 "ti,omap3-dpll-core-clock",
20 "ti,omap3-dpll-per-clock",
21 "ti,omap3-dpll-per-j-type-clock",
22 "ti,omap4-dpll-clock",
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| /kernel/linux/linux-5.10/drivers/scsi/isci/ |
| D | probe_roms.h | 7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
80 * This field specifies the NOTIFY (ENABLE SPIN UP) primitive
103 * - A value of 1 indicates generation 1 (i.e. 1.5 Gb/s).
104 * - A value of 2 indicates generation 2 (i.e. 3.0 Gb/s).
105 * - A value of 3 indicates generation 3 (i.e. 6.0 Gb/s).
228 * Spread Spectrum Clocking (SSC) settings for SATA and SAS.
229 * NOTE: Default SSC Modulation Frequency is 31.5KHz.
234 * NOTE: Max spread for SATA is +0 / -5000 PPM.
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| /kernel/linux/linux-6.6/drivers/scsi/isci/ |
| D | probe_roms.h | 7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
80 * This field specifies the NOTIFY (ENABLE SPIN UP) primitive
103 * - A value of 1 indicates generation 1 (i.e. 1.5 Gb/s).
104 * - A value of 2 indicates generation 2 (i.e. 3.0 Gb/s).
105 * - A value of 3 indicates generation 3 (i.e. 6.0 Gb/s).
228 * Spread Spectrum Clocking (SSC) settings for SATA and SAS.
229 * NOTE: Default SSC Modulation Frequency is 31.5KHz.
234 * NOTE: Max spread for SATA is +0 / -5000 PPM.
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| /kernel/linux/linux-5.10/drivers/scsi/mvsas/ |
| D | mv_94xx.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
45 MVS_STP_REG_SET_0 = 0x118, /* STP/SATA Register Set Enable */
61 MVS_INT_MASK = 0x154, /* Central int enable */
66 MVS_NON_NCQ_ERR_0 = 0x168, /* SRS Non-specific NCQ Error */
72 /* ports 1-3 follow after this */
75 /* ports 5-7 follow after this */
77 MVS_P4_INT_MASK = 0x1A4, /* Port4 interrupt enable mask */
79 /* ports 1-3 follow after this */
81 /* ports 5-7 follow after this */
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| /kernel/linux/linux-6.6/drivers/scsi/mvsas/ |
| D | mv_94xx.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
45 MVS_STP_REG_SET_0 = 0x118, /* STP/SATA Register Set Enable */
61 MVS_INT_MASK = 0x154, /* Central int enable */
66 MVS_NON_NCQ_ERR_0 = 0x168, /* SRS Non-specific NCQ Error */
72 /* ports 1-3 follow after this */
75 /* ports 5-7 follow after this */
77 MVS_P4_INT_MASK = 0x1A4, /* Port4 interrupt enable mask */
79 /* ports 1-3 follow after this */
81 /* ports 5-7 follow after this */
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/ |
| D | renesas,usb3-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/renesas,usb3-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car generation 3 USB 3.0 PHY
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - enum:
16 - renesas,r8a774a1-usb3-phy # RZ/G2M
17 - renesas,r8a774b1-usb3-phy # RZ/G2N
18 - renesas,r8a774e1-usb3-phy # RZ/G2H
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| D | phy-rockchip-naneng-combphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-naneng-combphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,rk3568-naneng-combphy
16 - rockchip,rk3588-naneng-combphy
23 - description: reference clock
24 - description: apb clock
25 - description: pipe clock
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | renesas,usb3-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/renesas,usb3-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car generation 3 USB 3.0 PHY
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - enum:
16 - renesas,r8a774a1-usb3-phy # RZ/G2M
17 - renesas,r8a774b1-usb3-phy # RZ/G2N
18 - renesas,r8a774e1-usb3-phy # RZ/G2H
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| /kernel/linux/linux-5.10/sound/spi/ |
| D | at73c213.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for AT73C213 16-bit stereo DAC connected to Atmel SSC
5 * Copyright (C) 2006-2007 Atmel Norway
14 #include <linux/dma-mapping.h>
27 #include <linux/atmel-ssc.h>
41 0x00, /* 00 - CTRL */
42 0x05, /* 01 - LLIG */
43 0x05, /* 02 - RLIG */
44 0x08, /* 03 - LPMG */
45 0x08, /* 04 - RPMG */
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| /kernel/linux/linux-6.6/sound/spi/ |
| D | at73c213.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for AT73C213 16-bit stereo DAC connected to Atmel SSC
5 * Copyright (C) 2006-2007 Atmel Norway
14 #include <linux/dma-mapping.h>
27 #include <linux/atmel-ssc.h>
41 0x00, /* 00 - CTRL */
42 0x05, /* 01 - LLIG */
43 0x05, /* 02 - RLIG */
44 0x08, /* 03 - LPMG */
45 0x08, /* 04 - RPMG */
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| /kernel/linux/linux-5.10/drivers/spi/ |
| D | spi-st-ssc4.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2008-2014 STMicroelectronics Limited
26 /* SSC registers */
34 /* SSC Control */
49 /* SSC Interrupt Enable */
55 /* SSC SPI Controller */
60 /* SSC SPI current transaction */
75 if (spi_st->words_remaining > FIFO_SIZE) in ssc_write_tx_fifo()
78 count = spi_st->words_remaining; in ssc_write_tx_fifo()
81 if (spi_st->tx_ptr) { in ssc_write_tx_fifo()
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| /kernel/linux/linux-6.6/drivers/spi/ |
| D | spi-st-ssc4.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2008-2014 STMicroelectronics Limited
25 /* SSC registers */
33 /* SSC Control */
48 /* SSC Interrupt Enable */
54 /* SSC SPI Controller */
59 /* SSC SPI current transaction */
74 if (spi_st->words_remaining > FIFO_SIZE) in ssc_write_tx_fifo()
77 count = spi_st->words_remaining; in ssc_write_tx_fifo()
80 if (spi_st->tx_ptr) { in ssc_write_tx_fifo()
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| /kernel/linux/linux-6.6/include/linux/phy/ |
| D | phy-dp.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
12 * struct phy_configure_opts_dp - DisplayPort PHY configuration set
51 * Pre-emphasis levels, as specified by DisplayPort specification, to be
59 * @ssc:
61 * Flag indicating, whether or not to enable spread-spectrum clocking.
64 u8 ssc : 1; member
69 * Flag indicating, whether or not reconfigure link rate and SSC to
88 * and pre-emphasis to requested values. Only lanes specified
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| /kernel/linux/linux-5.10/include/linux/phy/ |
| D | phy-dp.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
12 * struct phy_configure_opts_dp - DisplayPort PHY configuration set
51 * Pre-emphasis levels, as specified by DisplayPort specification, to be
59 * @ssc:
61 * Flag indicating, whether or not to enable spread-spectrum clocking.
64 u8 ssc : 1; member
69 * Flag indicating, whether or not reconfigure link rate and SSC to
88 * and pre-emphasis to requested values. Only lanes specified
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| /kernel/linux/linux-5.10/drivers/phy/cadence/ |
| D | phy-cadence-torrent.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/phy/phy.h>
303 u32 rate, bool ssc);
308 u32 rate, bool ssc);
365 u32 offset = reg << ctx->reg_offset_shift; in cdns_regmap_write()
367 writew(val, ctx->base + offset); in cdns_regmap_write()
375 u32 offset = reg << ctx->reg_offset_shift; in cdns_regmap_read()
377 *val = readw(ctx->base + offset); in cdns_regmap_read()
387 writel(val, ctx->base + offset); in cdns_regmap_dptx_write()
398 *val = readl(ctx->base + offset); in cdns_regmap_dptx_read()
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