| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_kms.c | 56 if (gpu_instance->adev == adev) { in amdgpu_unregister_gpu_instance()
58 mgpu_info.gpu_ins[mgpu_info.num_gpu - 1]; in amdgpu_unregister_gpu_instance()
59 mgpu_info.num_gpu--; in amdgpu_unregister_gpu_instance()
60 if (adev->flags & AMD_IS_APU) in amdgpu_unregister_gpu_instance()
61 mgpu_info.num_apu--; in amdgpu_unregister_gpu_instance()
63 mgpu_info.num_dgpu--; in amdgpu_unregister_gpu_instance()
72 * amdgpu_driver_unload_kms - Main unload function for KMS.
88 if (adev->rmmio == NULL) in amdgpu_driver_unload_kms()
91 if (adev->runpm) { in amdgpu_driver_unload_kms()
92 pm_runtime_get_sync(dev->dev); in amdgpu_driver_unload_kms()
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| D | amdgpu_amdkfd_gpuvm.c | 2 * Copyright 2014-2018 Advanced Micro Devices, Inc.
22 #include <linux/dma-buf.h>
60 #define domain_string(domain) domain_bit_to_string[ffs(domain)-1]
71 struct kgd_mem *mem) in check_if_add_bo_to_vm() argument
75 list_for_each_entry(entry, &mem->bo_va_list, bo_list) in check_if_add_bo_to_vm()
76 if (entry->bo_va->base.vm == avm) in check_if_add_bo_to_vm()
83 * System (TTM + userptr) memory - 15/16th System RAM
84 * TTM memory - 3/8th System RAM
89 uint64_t mem; in amdgpu_amdkfd_gpuvm_init_mem_limits() local
92 mem = si.totalram - si.totalhigh; in amdgpu_amdkfd_gpuvm_init_mem_limits()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_kms.c | 58 if (gpu_instance->adev == adev) { in amdgpu_unregister_gpu_instance()
60 mgpu_info.gpu_ins[mgpu_info.num_gpu - 1]; in amdgpu_unregister_gpu_instance()
61 mgpu_info.num_gpu--; in amdgpu_unregister_gpu_instance()
62 if (adev->flags & AMD_IS_APU) in amdgpu_unregister_gpu_instance()
63 mgpu_info.num_apu--; in amdgpu_unregister_gpu_instance()
65 mgpu_info.num_dgpu--; in amdgpu_unregister_gpu_instance()
74 * amdgpu_driver_unload_kms - Main unload function for KMS.
90 if (adev->rmmio == NULL) in amdgpu_driver_unload_kms()
113 gpu_instance->adev = adev; in amdgpu_register_gpu_instance()
114 gpu_instance->mgpu_fan_enabled = 0; in amdgpu_register_gpu_instance()
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| D | gfx_v9_4_2.c | 198 { SOC15_REG_ENTRY(GC, 0, regCOMPUTE_PGM_RSRC3), 0x3F }, /* 63 - accum-offset = 256 */
368 dev_err(adev->dev, "failed to get ib (%d).\n", r); in gfx_v9_4_2_run_shader()
374 ib->ptr[i + (shader_offset / 4)] = shader_ptr[i]; in gfx_v9_4_2_run_shader()
377 ib->length_dw = 0; in gfx_v9_4_2_run_shader()
381 ib->ptr[ib->length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v9_4_2_run_shader()
382 ib->ptr[ib->length_dw++] = SOC15_REG_ENTRY_OFFSET(init_regs[i]) in gfx_v9_4_2_run_shader()
383 - PACKET3_SET_SH_REG_START; in gfx_v9_4_2_run_shader()
384 ib->ptr[ib->length_dw++] = init_regs[i].reg_value; in gfx_v9_4_2_run_shader()
388 gpu_addr = (ib->gpu_addr + (u64)shader_offset) >> 8; in gfx_v9_4_2_run_shader()
389 ib->ptr[ib->length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v9_4_2_run_shader()
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| D | amdgpu_atomfirmware.c | 48 struct amdgpu_mode_info *mode_info = &adev->mode_info; in amdgpu_atomfirmware_query_firmware_capability()
58 if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context, in amdgpu_atomfirmware_query_firmware_capability()
63 (mode_info->atom_context->bios + data_offset); in amdgpu_atomfirmware_query_firmware_capability()
64 fw_cap = le32_to_cpu(firmware_info->v31.firmware_capability); in amdgpu_atomfirmware_query_firmware_capability()
82 fw_cap = adev->mode_info.firmware_flags; in amdgpu_atomfirmware_gpu_virtualization_supported()
93 if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context, index, NULL, in amdgpu_atomfirmware_scratch_regs_init()
96 (struct atom_firmware_info_v3_1 *)(adev->mode_info.atom_context->bios + in amdgpu_atomfirmware_scratch_regs_init()
99 adev->bios_scratch_reg_offset = in amdgpu_atomfirmware_scratch_regs_init()
100 le32_to_cpu(firmware_info->bios_scratch_reg_startaddr); in amdgpu_atomfirmware_scratch_regs_init()
109 start_addr = le32_to_cpu(fw_usage->start_address_in_kb); in amdgpu_atomfirmware_allocate_fb_v2_1()
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| D | amdgpu_amdkfd_gpuvm.c | 1 // SPDX-License-Identifier: MIT
3 * Copyright 2014-2018 Advanced Micro Devices, Inc.
23 #include <linux/dma-buf.h>
72 #define domain_string(domain) domain_bit_to_string[ffs(domain)-1]
77 struct kgd_mem *mem) in kfd_mem_is_attached() argument
81 list_for_each_entry(entry, &mem->attachments, list) in kfd_mem_is_attached()
82 if (entry->bo_va->base.vm == avm) in kfd_mem_is_attached()
89 * reuse_dmamap() - Check whether adev can share the original
103 return (adev->ram_is_direct_mapped && bo_adev->ram_is_direct_mapped) || in reuse_dmamap()
104 (adev->dev->iommu_group == bo_adev->dev->iommu_group); in reuse_dmamap()
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| D | gfx_v9_4_3.c | 34 #include "ivsrcid/gfx/irqsrcs_gfx_9_0.h"
81 struct amdgpu_device *adev = kiq_ring->adev; in gfx_v9_4_3_kiq_map_queues()
82 uint64_t mqd_addr = amdgpu_bo_gpu_offset(ring->mqd_obj); in gfx_v9_4_3_kiq_map_queues()
83 uint64_t wptr_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); in gfx_v9_4_3_kiq_map_queues()
84 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v9_4_3_kiq_map_queues()
91 PACKET3_MAP_QUEUES_QUEUE(ring->queue) | in gfx_v9_4_3_kiq_map_queues()
92 PACKET3_MAP_QUEUES_PIPE(ring->pipe) | in gfx_v9_4_3_kiq_map_queues()
93 PACKET3_MAP_QUEUES_ME((ring->me == 1 ? 0 : 1)) | in gfx_v9_4_3_kiq_map_queues()
102 PACKET3_MAP_QUEUES_DOORBELL_OFFSET(ring->doorbell_index)); in gfx_v9_4_3_kiq_map_queues()
114 uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0; in gfx_v9_4_3_kiq_unmap_queues()
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| /kernel/linux/linux-6.6/arch/mips/include/asm/sgi/ |
| D | mc.h | 22 #define SGIMC_CCTRL0_EPERRMEM 0x00000040 /* Main mem parity error enable */
32 #define SGIMC_CCTRL0_WRESETPMEM 0x00010000 /* Perform warm reset, preserves mem */
33 #define SGIMC_CCTRL0_LENDIAN 0x00020000 /* Put MC in little-endian mode */
34 #define SGIMC_CCTRL0_WRESETDMEM 0x00040000 /* Warm reset, destroys mem contents */
35 #define SGIMC_CCTRL0_CMEMBADPAR 0x02000000 /* Generate bad perr from cpu to mem */
36 #define SGIMC_CCTRL0_R4KNOCHKPARR 0x04000000 /* Don't chk parity on mem data reads */
64 #define SGIMC_EEPROM_SDATAO 0x00000008 /* Serial EEPROM data-out */
65 #define SGIMC_EEPROM_SDATAI 0x00000010 /* Serial EEPROM data-in */
75 #define SGIMC_GIOPAR_HPC64 0x00000001 /* HPC talks to GIO using 64-bits */
76 #define SGIMC_GIOPAR_GFX64 0x00000002 /* GFX talks to GIO using 64-bits */
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| D | heart.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2004-2007 Stanislaw Skowronek <skylark@unaligned.org>
7 * 2007-2015 Joshua Kinard <kumba@gentoo.org>
27 * struct ip30_heart_regs - struct that maps IP30 HEART registers.
28 * @mode: HEART_MODE - Purpose Unknown, machine reset called from here.
29 * @sdram_mode: HEART_SDRAM_MODE - purpose unknown.
30 * @mem_refresh: HEART_MEM_REF - purpose unknown.
31 * @mem_req_arb: HEART_MEM_REQ_ARB - purpose unknown.
32 * @mem_cfg.q: union for 64bit access to HEART_MEMCFG - 4x 64bit registers.
33 * @mem_cfg.l: union for 32bit access to HEART_MEMCFG - 8x 32bit registers.
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| /kernel/linux/linux-5.10/arch/mips/include/asm/sgi/ |
| D | mc.h | 22 #define SGIMC_CCTRL0_EPERRMEM 0x00000040 /* Main mem parity error enable */
32 #define SGIMC_CCTRL0_WRESETPMEM 0x00010000 /* Perform warm reset, preserves mem */
33 #define SGIMC_CCTRL0_LENDIAN 0x00020000 /* Put MC in little-endian mode */
34 #define SGIMC_CCTRL0_WRESETDMEM 0x00040000 /* Warm reset, destroys mem contents */
35 #define SGIMC_CCTRL0_CMEMBADPAR 0x02000000 /* Generate bad perr from cpu to mem */
36 #define SGIMC_CCTRL0_R4KNOCHKPARR 0x04000000 /* Don't chk parity on mem data reads */
64 #define SGIMC_EEPROM_SDATAO 0x00000008 /* Serial EEPROM data-out */
65 #define SGIMC_EEPROM_SDATAI 0x00000010 /* Serial EEPROM data-in */
75 #define SGIMC_GIOPAR_HPC64 0x00000001 /* HPC talks to GIO using 64-bits */
76 #define SGIMC_GIOPAR_GFX64 0x00000002 /* GFX talks to GIO using 64-bits */
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| D | heart.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2004-2007 Stanislaw Skowronek <skylark@unaligned.org>
7 * 2007-2015 Joshua Kinard <kumba@gentoo.org>
27 * struct ip30_heart_regs - struct that maps IP30 HEART registers.
28 * @mode: HEART_MODE - Purpose Unknown, machine reset called from here.
29 * @sdram_mode: HEART_SDRAM_MODE - purpose unknown.
30 * @mem_refresh: HEART_MEM_REF - purpose unknown.
31 * @mem_req_arb: HEART_MEM_REQ_ARB - purpose unknown.
32 * @mem_cfg.q: union for 64bit access to HEART_MEMCFG - 4x 64bit registers.
33 * @mem_cfg.l: union for 32bit access to HEART_MEMCFG - 8x 32bit registers.
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdkfd/ |
| D | kfd_crat.c | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2015-2022 Advanced Micro Devices, Inc.
40 * @total_cu_count - Total CUs present in the GPU including ones
934 dev->node_props.cpu_cores_count = cu->num_cpu_cores; in kfd_populated_cu_info_cpu()
935 dev->node_props.cpu_core_id_base = cu->processor_id_low; in kfd_populated_cu_info_cpu()
936 if (cu->hsa_capability & CRAT_CU_FLAGS_IOMMU_PRESENT) in kfd_populated_cu_info_cpu()
937 dev->node_props.capability |= HSA_CAP_ATS_PRESENT; in kfd_populated_cu_info_cpu()
939 pr_debug("CU CPU: cores=%d id_base=%d\n", cu->num_cpu_cores, in kfd_populated_cu_info_cpu()
940 cu->processor_id_low); in kfd_populated_cu_info_cpu()
946 dev->node_props.simd_id_base = cu->processor_id_low; in kfd_populated_cu_info_gpu()
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| D | kfd_topology.c | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2014-2022 Advanced Micro Devices, Inc.
45 /* topology_device_list - Master list of all topology devices */
59 if (top_dev->proximity_domain == proximity_domain) { in kfd_topology_device_by_proximity_domain_no_lock()
89 if (top_dev->gpu_id == gpu_id) { in kfd_topology_device_by_id()
107 return top_dev->gpu; in kfd_device_by_id()
118 if (top_dev->gpu && top_dev->gpu->adev->pdev == pdev) { in kfd_device_by_pci_dev()
119 device = top_dev->gpu; in kfd_device_by_pci_dev()
131 struct kfd_mem_properties *mem; in kfd_release_topology_device() local
137 list_del(&dev->list); in kfd_release_topology_device()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/msm/ |
| D | gpu.txt | 4 - compatible: "qcom,adreno-XYZ.W", "qcom,adreno" or
5 "amd,imageon-XYZ.W", "amd,imageon"
6 for example: "qcom,adreno-306.0", "qcom,adreno"
9 with the chip-id.
11 - reg: Physical base address and length of the controller's registers.
12 - interrupts: The interrupt signal from the gpu.
13 - clocks: device clocks (if applicable)
14 See ../clocks/clock-bindings.txt for details.
15 - clock-names: the following clocks are required by a3xx, a4xx and a5xx
22 - qcom,adreno-630.2
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| /kernel/linux/linux-5.10/drivers/gpu/drm/aspeed/ |
| D | aspeed_gfx_drv.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 #include <linux/dma-mapping.h>
30 * DOC: ASPEED GFX Driver
32 * This driver is for the ASPEED BMC SoC's 'GFX' display hardware, also called
74 drm->mode_config.min_width = 0; in aspeed_gfx_setup_mode_config()
75 drm->mode_config.min_height = 0; in aspeed_gfx_setup_mode_config()
76 drm->mode_config.max_width = 800; in aspeed_gfx_setup_mode_config()
77 drm->mode_config.max_height = 600; in aspeed_gfx_setup_mode_config()
78 drm->mode_config.funcs = &aspeed_gfx_mode_config_funcs; in aspeed_gfx_setup_mode_config()
89 reg = readl(priv->base + CRT_CTRL1); in aspeed_gfx_irq_handler()
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/msm/ |
| D | gpu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Rob Clark <robdclark@gmail.com>
16 - description: |
18 figure out the chip-id.
20 … - pattern: '^qcom,adreno-[0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f]$'
21 - const: qcom,adreno
22 - description: |
24 figure out the gpu-id and patch level.
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| /kernel/linux/linux-6.6/drivers/gpu/drm/aspeed/ |
| D | aspeed_gfx_drv.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 #include <linux/dma-mapping.h>
30 * DOC: ASPEED GFX Driver
32 * This driver is for the ASPEED BMC SoC's 'GFX' display hardware, also called
93 { .compatible = "aspeed,ast2400-gfx", .data = &ast2400_config },
94 { .compatible = "aspeed,ast2500-gfx", .data = &ast2500_config },
95 { .compatible = "aspeed,ast2600-gfx", .data = &ast2600_config },
114 drm->mode_config.min_width = 0; in aspeed_gfx_setup_mode_config()
115 drm->mode_config.min_height = 0; in aspeed_gfx_setup_mode_config()
116 drm->mode_config.max_width = 800; in aspeed_gfx_setup_mode_config()
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| /kernel/linux/linux-6.6/drivers/usb/misc/sisusbvga/ |
| D | sisusb.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
3 * sisusb - usb kernel driver for Net2280/SiS315 based USB2VGA dongles
83 p->header = cpu_to_le16(p->header); \
84 p->address = cpu_to_le32(p->address); \
85 p->data = cpu_to_le32(p->data); \
93 struct sisusb_urb_context { /* urb->context for outbound bulk URBs */
140 #define SISUSB_EP_GFX_IN 0x0e /* gfx std packet out(0e)/in(8e) */
143 #define SISUSB_EP_GFX_BULK_OUT 0x01 /* gfx mem bulk out/in */
146 #define SISUSB_EP_GFX_LBULK_OUT 0x03 /* gfx large mem bulk out */
148 #define SISUSB_EP_UNKNOWN_04 0x04 /* ? 4 is "OUT" ? - unused */
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| /kernel/linux/linux-5.10/drivers/usb/misc/sisusbvga/ |
| D | sisusb.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
3 * sisusb - usb kernel driver for Net2280/SiS315 based USB2VGA dongles
84 p->header = cpu_to_le16(p->header); \
85 p->address = cpu_to_le32(p->address); \
86 p->data = cpu_to_le32(p->data); \
94 struct sisusb_urb_context { /* urb->context for outbound bulk URBs */
161 #define SISUSB_EP_GFX_IN 0x0e /* gfx std packet out(0e)/in(8e) */
164 #define SISUSB_EP_GFX_BULK_OUT 0x01 /* gfx mem bulk out/in */
167 #define SISUSB_EP_GFX_LBULK_OUT 0x03 /* gfx large mem bulk out */
169 #define SISUSB_EP_UNKNOWN_04 0x04 /* ? 4 is "OUT" ? - unused */
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| /kernel/linux/linux-5.10/drivers/clk/sirf/ |
| D | clk-atlas6.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2011 - 2014 Cambridge Silicon Radio Limited, a CSR plc group
13 #include <linux/clk-provider.h>
18 #include "clk-common.c"
61 rtc, osc, pll1, pll2, pll3, mem, sys, security, dsp, gps, enumerator
64 usp2, vip, gfx, gfx2d, lcd, vpp, mmc01, mmc23, mmc45, usbpll, enumerator
121 rscnp = of_find_compatible_node(NULL, NULL, "sirf,prima2-rsc"); in atlas6_clk_init()
142 clk_register_clkdev(atlas6_clks[mem], NULL, "mem"); in atlas6_clk_init()
143 clk_register_clkdev(atlas6_clks[mem], NULL, "osc"); in atlas6_clk_init()
150 CLK_OF_DECLARE(atlas6_clk, "sirf,atlas6-clkc", atlas6_clk_init);
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| D | clk-prima2.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2011 - 2014 Cambridge Silicon Radio Limited, a CSR plc group
13 #include <linux/clk-provider.h>
18 #include "clk-common.c"
60 rtc, osc, pll1, pll2, pll3, mem, sys, security, dsp, gps, enumerator
63 usp2, vip, gfx, mm, lcd, vpp, mmc01, mmc23, mmc45, usbpll, enumerator
120 rscnp = of_find_compatible_node(NULL, NULL, "sirf,prima2-rsc"); in prima2_clk_init()
141 clk_register_clkdev(prima2_clks[mem], NULL, "mem"); in prima2_clk_init()
142 clk_register_clkdev(prima2_clks[mem], NULL, "osc"); in prima2_clk_init()
149 CLK_OF_DECLARE(prima2_clk, "sirf,prima2-clkc", prima2_clk_init);
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| D | clk-common.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2011 - 2014 Cambridge Silicon Radio Limited, a CSR plc group
20 * - 2 oscillators: osc-26MHz, rtc-32.768KHz
21 * - 3 standard configurable plls: pll1, pll2 & pll3
22 * - 2 exclusive plls: usb phy pll and sata phy pll
23 * - 8 clock domains: cpu/cpudiv, mem/memdiv, sys/io, dsp, graphic, multimedia,
28 * - dsp domain: gps, mf
29 * - io domain: dmac, nand, audio, uart, i2c, spi, usp, pwm, pulse
30 * - sys domain: security
78 u32 regcfg2 = clk->regofs + SIRFSOC_CLKC_PLL1_CFG2 - in pll_clk_recalc_rate()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | prima2-clock.txt | 4 - compatible: Should be "sirf,prima2-clkc"
5 - reg: Address and length of the register set
6 - interrupts: Should contain clock controller interrupt
7 - #clock-cells: Should be <1>
14 ---------------------------
20 mem 5
47 gfx 32
60 clks: clock-controller@88000000 {
61 compatible = "sirf,prima2-clkc";
64 #clock-cells = <1>;
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| /kernel/linux/linux-5.10/drivers/video/fbdev/ |
| D | sstfb.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/video/sstfb.c -- voodoo graphics frame buffer
5 * Copyright (c) 2000-2002 Ghozlane Toumi <gtoumi@laposte.net>
16 * (enable driver on big-endian machines (hppa), ioctl fixes)
26 * add /sys/class/graphics/fbX/vgapass sysfs-interface
34 * 0x000000 - 0x3fffff : registers (4MB)
35 * 0x400000 - 0x7fffff : linear frame buffer (4MB)
36 * 0x800000 - 0xffffff : texture memory (8MB)
42 -TODO: at one time or another test that the mode is acceptable by the monitor
43 -ASK: Can I choose different ordering for the color bitfields (rgba argb ...)
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| /kernel/linux/linux-6.6/drivers/video/fbdev/ |
| D | sstfb.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/video/sstfb.c -- voodoo graphics frame buffer
5 * Copyright (c) 2000-2002 Ghozlane Toumi <gtoumi@laposte.net>
16 * (enable driver on big-endian machines (hppa), ioctl fixes)
26 * add /sys/class/graphics/fbX/vgapass sysfs-interface
34 * 0x000000 - 0x3fffff : registers (4MB)
35 * 0x400000 - 0x7fffff : linear frame buffer (4MB)
36 * 0x800000 - 0xffffff : texture memory (8MB)
42 -TODO: at one time or another test that the mode is acceptable by the monitor
43 -ASK: Can I choose different ordering for the color bitfields (rgba argb ...)
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