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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/adc/
Dmediatek,mt2701-auxadc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/mediatek,mt2701-auxadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek AUXADC - ADC on Mediatek mobile SoC (mt65xx/mt81xx/mt27xx)
10 - Zhiyong Tao <zhiyong.tao@mediatek.com>
11 - Matthias Brugger <matthias.bgg@gmail.com>
14 The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found
17 used by thermal controller which reads the temperatures from the AUXADC
18 directly via its own bus interface. See mediatek-thermal bindings
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/
Dmt6577_auxadc.txt1 * Mediatek AUXADC - Analog to Digital Converter on Mediatek mobile soc (mt65xx/mt81xx/mt27xx)
4 The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found
7 used by thermal controller which reads the temperatures from the AUXADC
9 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
10 for the Thermal Controller which holds a phandle to the AUXADC.
13 - compatible: Should be one of:
14 - "mediatek,mt2701-auxadc": For MT2701 family of SoCs
15 - "mediatek,mt2712-auxadc": For MT2712 family of SoCs
16 - "mediatek,mt6765-auxadc": For MT6765 family of SoCs
17 - "mediatek,mt7622-auxadc": For MT7622 family of SoCs
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/thermal/
Dmediatek-thermal.txt4 which measures the on-SoC temperatures. This device does not have its own ADC,
5 instead it directly controls the AUXADC via AHB bus accesses. For this reason
6 this device needs phandles to the AUXADC. Also it controls a mux in the
11 - compatible:
12 - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
13 - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
14 - "mediatek,mt2712-thermal" : For MT2712 family of SoCs
15 - "mediatek,mt7622-thermal" : For MT7622 SoC
16 - "mediatek,mt8183-thermal" : For MT8183 family of SoCs
17 - reg: Address range of the thermal controller
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/thermal/
Dmediatek-thermal.txt4 which measures the on-SoC temperatures. This device does not have its own ADC,
5 instead it directly controls the AUXADC via AHB bus accesses. For this reason
6 this device needs phandles to the AUXADC. Also it controls a mux in the
11 - compatible:
12 - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
13 - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
14 - "mediatek,mt2712-thermal" : For MT2712 family of SoCs
15 - "mediatek,mt7622-thermal" : For MT7622 SoC
16 - "mediatek,mt7981-thermal", "mediatek,mt7986-thermal" : For MT7981 SoC
17 - "mediatek,mt7986-thermal" : For MT7986 SoC
[all …]
/kernel/linux/linux-5.10/drivers/thermal/
Dmtk_thermal.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/nvmem-consumer.h>
26 /* AUXADC Registers */
98 /* AUXADC channel 11 is used for the temperature sensors */
118 * These macros could be used for MT8183, MT8173, MT2701, and MT2712.
119 * MT8183 has 6 sensors and needs 6 VTS calibration data.
171 /* AUXADC channel 11 is used for the temperature sensors */
192 /* AUXADC channel 11 is used for the temperature sensors */
220 /* MT8183 thermal sensors */
228 /* AUXADC channel is used for the temperature sensors */
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/kernel/linux/linux-6.6/drivers/thermal/mediatek/
Dauxadc_thermal.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/nvmem-consumer.h>
27 /* AUXADC Registers */
100 /* AUXADC channel 11 is used for the temperature sensors */
119 #define MT8173_TEMP_MIN -20000
124 * These macros could be used for MT8183, MT8173, MT2701, and MT2712.
125 * MT8183 has 6 sensors and needs 6 VTS calibration data.
192 /* AUXADC channel 11 is used for the temperature sensors */
213 /* AUXADC channel 11 is used for the temperature sensors */
241 /* MT8183 thermal sensors */
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt8183.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt8183-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/reset-controller/mt8183-resets.h>
12 #include <dt-bindings/phy/phy.h>
13 #include "mt8183-pinfunc.h"
16 compatible = "mediatek,mt8183";
17 interrupt-parent = <&sysirq>;
18 #address-cells = <2>;
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Dmt8183-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include "mt8183.dtsi"
13 model = "MediaTek MT8183 evaluation board";
14 compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
26 stdout-path = "serial0:921600n8";
29 reserved-memory {
30 #address-cells = <2>;
31 #size-cells = <2>;
34 compatible = "shared-dma-pool";
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Dmt8183-kukui.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include "mt8183.dtsi"
19 stdout-path = "serial0:115200n8";
28 compatible = "fixed-clock";
29 #clock-cells = <0>;
30 clock-frequency = <32768>;
31 clock-output-names = "clk32k";
35 compatible = "regulator-fixed";
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/
Dmt8183.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt8183-clk.h>
9 #include <dt-bindings/gce/mt8183-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8183-larb-port.h>
13 #include <dt-bindings/power/mt8183-power.h>
14 #include <dt-bindings/reset/mt8183-resets.h>
15 #include <dt-bindings/phy/phy.h>
16 #include <dt-bindings/thermal/thermal.h>
[all …]
Dmt8183-pumpkin.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include "mt8183.dtsi"
15 model = "Pumpkin MT8183";
16 compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183";
28 stdout-path = "serial0:921600n8";
31 reserved-memory {
32 #address-cells = <2>;
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Dmt8183-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include "mt8183.dtsi"
13 model = "MediaTek MT8183 evaluation board";
14 chassis-type = "embedded";
15 compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
27 stdout-path = "serial0:921600n8";
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
[all …]
Dmt8183-kukui.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include "mt8183.dtsi"
21 stdout-path = "serial0:115200n8";
25 compatible = "pwm-backlight";
27 power-supply = <&bl_pp5000>;
28 enable-gpios = <&pio 176 0>;
29 brightness-levels = <0 1023>;
30 num-interpolated-steps = <1023>;
[all …]
Dmt8186.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
6 /dts-v1/;
7 #include <dt-bindings/clock/mt8186-clk.h>
8 #include <dt-bindings/gce/mt8186-gce.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/memory/mt8186-memory-port.h>
12 #include <dt-bindings/pinctrl/mt8186-pinfunc.h>
13 #include <dt-bindings/power/mt8186-power.h>
[all …]
Dmt8195.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8195-clk.h>
9 #include <dt-bindings/gce/mt8195-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8195-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
15 #include <dt-bindings/power/mt8195-power.h>
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