Searched +full:mt8195 +full:- +full:vdecsys (Results 1 – 9 of 9) sorted by relevance
| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 42 bool "Clock driver for MediaTek MT2701 vdecsys" 45 This driver supports MediaTek MT2701 vdecsys clocks. 116 tristate "Clock driver for MediaTek MT2712 vdecsys" 119 This driver supports MediaTek MT2712 vdecsys clocks. 246 tristate "Clock driver for MediaTek MT6779 vdecsys" 249 This driver supports MediaTek MT6779 vdecsys clocks. 294 tristate "Clock driver for MediaTek MT6795 VDECSYS" 298 This driver supports MediaTek MT6795 vdecsys clocks. 328 tristate "Clock driver for MediaTek MT6797 vdecsys" [all …]
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o clk-cpumux.o rese… 3 obj-$(CONFIG_COMMON_CLK_MEDIATEK_FHCTL) += clk-fhctl.o clk-pllfh.o 5 obj-$(CONFIG_COMMON_CLK_MT6765) += clk-mt6765.o 6 obj-$(CONFIG_COMMON_CLK_MT6765_AUDIOSYS) += clk-mt6765-audio.o 7 obj-$(CONFIG_COMMON_CLK_MT6765_CAMSYS) += clk-mt6765-cam.o 8 obj-$(CONFIG_COMMON_CLK_MT6765_IMGSYS) += clk-mt6765-img.o 9 obj-$(CONFIG_COMMON_CLK_MT6765_MIPI0ASYS) += clk-mt6765-mipi0a.o 10 obj-$(CONFIG_COMMON_CLK_MT6765_MMSYS) += clk-mt6765-mm.o 11 obj-$(CONFIG_COMMON_CLK_MT6765_VCODECSYS) += clk-mt6765-vcodec.o [all …]
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| D | clk-mt8195-vdec.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com> 6 #include "clk-gate.h" 7 #include "clk-mtk.h" 9 #include <dt-bindings/clock/mt8195-clk.h> 10 #include <linux/clk-provider.h> 84 .compatible = "mediatek,mt8195-vdecsys", 87 .compatible = "mediatek,mt8195-vdecsys_core1", 90 .compatible = "mediatek,mt8195-vdecsys_soc", 102 .name = "clk-mt8195-vdec",
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/mediatek/ |
| D | mediatek,mt8195-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8195-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek Functional Clock Controller for MT8195 10 - Chun-Jie Chen <chun-jie.chen@mediatek.com> 14 PLLs --> 15 dividers --> 17 --> 26 - enum: [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ |
| D | mediatek,smi-larb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-larb.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Yong Wu <yong.wu@mediatek.com> 19 - enum: 20 - mediatek,mt2701-smi-larb 21 - mediatek,mt2712-smi-larb 22 - mediatek,mt6779-smi-larb 23 - mediatek,mt6795-smi-larb [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/ |
| D | mediatek,vcodec-subdev-decoder.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-subdev-decoder.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Yunfei Dong <yunfei.dong@mediatek.com> 20 +------------------------------------------------+-------------------------------------+ 22 | input -> lat soc HW -> lat HW -> lat buffer --|--> lat buffer -> core HW -> output | 24 +------------||-------------||-------------------+---------------------||--------------+ 26 -------------||-------------||-------------------|---------------------||--------------- 27 ||<------------||----------------HW index---------------->|| <child> [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/ |
| D | mt8195.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8195-clk.h> 9 #include <dt-bindings/gce/mt8195-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8195-memory-port.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 15 #include <dt-bindings/power/mt8195-power.h> [all …]
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| D | mt8186.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com> 6 /dts-v1/; 7 #include <dt-bindings/clock/mt8186-clk.h> 8 #include <dt-bindings/gce/mt8186-gce.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/memory/mt8186-memory-port.h> 12 #include <dt-bindings/pinctrl/mt8186-pinfunc.h> 13 #include <dt-bindings/power/mt8186-power.h> [all …]
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| /kernel/linux/linux-6.6/drivers/media/platform/mediatek/vcodec/decoder/ |
| D | mtk_vcodec_dec_drv.c | 1 // SPDX-License-Identifier: GPL-2.0 19 #include <media/v4l2-event.h> 20 #include <media/v4l2-mem2mem.h> 21 #include <media/videobuf2-dma-contig.h> 22 #include <media/v4l2-device.h> 31 switch (dev->vdec_pdata->hw_arch) { in mtk_vcodec_get_hw_count() 37 mtk_v4l2_vdec_err(ctx, "hw arch %d not supported", dev->vdec_pdata->hw_arch); in mtk_vcodec_get_hw_count() 46 if (dev->vdecsys_regmap) in mtk_vcodec_is_hw_active() 47 return !regmap_test_bits(dev->vdecsys_regmap, VDEC_HW_ACTIVE_ADDR, in mtk_vcodec_is_hw_active() 50 cg_status = readl(dev->reg_base[VDEC_SYS] + VDEC_HW_ACTIVE_ADDR); in mtk_vcodec_is_hw_active() [all …]
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