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Searched +full:omap4 +full:- +full:hwspinlock (Results 1 – 25 of 32) sorted by relevance

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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/hwlock/
Dti,omap-hwspinlock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/hwlock/ti,omap-hwspinlock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI HwSpinlock for OMAP and K3 based SoCs
10 - Suman Anna <s-anna@ti.com>
15 - ti,omap4-hwspinlock # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs
16 - ti,am654-hwspinlock # for K3 AM65x, J721E and J7200 SoCs
21 "#hwlock-cells":
24 The OMAP hwspinlock users will use a 0-indexed relative hwlock number as
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/hwlock/
Dti,omap-hwspinlock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/hwlock/ti,omap-hwspinlock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI HwSpinlock for OMAP and K3 based SoCs
10 - Suman Anna <s-anna@ti.com>
15 - ti,omap4-hwspinlock # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs
16 - ti,am64-hwspinlock # for K3 AM64x SoCs
17 - ti,am654-hwspinlock # for K3 AM65x, J721E and J7200 SoCs
22 "#hwlock-cells":
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/kernel/linux/linux-6.6/drivers/hwspinlock/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 # Generic HWSPINLOCK framework
6 menuconfig HWSPINLOCK config
9 if HWSPINLOCK
16 introduced in OMAP4).
66 endif # HWSPINLOCK
Domap_hwspinlock.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2010-2021 Texas Instruments Incorporated - https://www.ti.com
8 * Hari Kanigeri <h-kanigeri2@ti.com>
9 * Ohad Ben-Cohen <ohad@wizery.com>
10 * Suman Anna <s-anna@ti.com>
22 #include <linux/hwspinlock.h>
38 static int omap_hwspinlock_trylock(struct hwspinlock *lock) in omap_hwspinlock_trylock()
40 void __iomem *lock_addr = lock->priv; in omap_hwspinlock_trylock()
46 static void omap_hwspinlock_unlock(struct hwspinlock *lock) in omap_hwspinlock_unlock()
48 void __iomem *lock_addr = lock->priv; in omap_hwspinlock_unlock()
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/kernel/linux/linux-5.10/drivers/hwspinlock/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 # Generic HWSPINLOCK framework
6 menuconfig HWSPINLOCK config
9 if HWSPINLOCK
16 introduced in OMAP4).
68 endif # HWSPINLOCK
Domap_hwspinlock.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2010-2015 Texas Instruments Incorporated - http://www.ti.com
8 * Hari Kanigeri <h-kanigeri2@ti.com>
9 * Ohad Ben-Cohen <ohad@wizery.com>
21 #include <linux/hwspinlock.h>
37 static int omap_hwspinlock_trylock(struct hwspinlock *lock) in omap_hwspinlock_trylock()
39 void __iomem *lock_addr = lock->priv; in omap_hwspinlock_trylock()
45 static void omap_hwspinlock_unlock(struct hwspinlock *lock) in omap_hwspinlock_unlock()
47 void __iomem *lock_addr = lock->priv; in omap_hwspinlock_unlock()
63 static void omap_hwspinlock_relax(struct hwspinlock *lock) in omap_hwspinlock_relax()
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/kernel/linux/linux-6.6/Documentation/locking/
Dhwspinlock.rst12 For example, OMAP4 has dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP,
17 A generic hwspinlock framework allows platform-independent drivers to use
18 the hwspinlock device in order to access data structures that are shared
22 This is necessary, for example, for Inter-processor communications:
23 on OMAP4, cpu-intensive multimedia tasks are offloaded by the host to the
26 To achieve fast message-based communications, a minimal kernel support
31 the remote processors, and access to it is synchronized using the hwspinlock
35 A common hwspinlock interface makes it possible to have generic, platform-
43 struct hwspinlock *hwspin_lock_request(void);
45 Dynamically assign an hwspinlock and return its address, or NULL
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/kernel/linux/linux-5.10/Documentation/locking/
Dhwspinlock.rst12 For example, OMAP4 has dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP,
17 A generic hwspinlock framework allows platform-independent drivers to use
18 the hwspinlock device in order to access data structures that are shared
22 This is necessary, for example, for Inter-processor communications:
23 on OMAP4, cpu-intensive multimedia tasks are offloaded by the host to the
26 To achieve fast message-based communications, a minimal kernel support
31 the remote processors, and access to it is synchronized using the hwspinlock
35 A common hwspinlock interface makes it possible to have generic, platform-
43 struct hwspinlock *hwspin_lock_request(void);
45 Dynamically assign an hwspinlock and return its address, or NULL
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/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/
Ddm816x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <dt-bindings/bus/ti-sysc.h>
4 #include <dt-bindings/clock/dm816.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/omap.h>
10 interrupt-parent = <&intc>;
11 #address-cells = <1>;
12 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
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Domap4-l4.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 compatible = "ti,omap4-l4-cfg", "simple-pm-bus";
4 power-domains = <&prm_core>;
6 clock-names = "fck";
10 reg-names = "ap", "la", "ia0";
11 #address-cells = <1>;
12 #size-cells = <1>;
22 compatible = "simple-pm-bus";
23 #address-cells = <1>;
24 #size-cells = <1>;
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Domap5-l4.dtsi2 compatible = "ti,omap5-l4-cfg", "simple-pm-bus";
3 power-domains = <&prm_core>;
5 clock-names = "fck";
9 reg-names = "ap", "la", "ia0";
10 #address-cells = <1>;
11 #size-cells = <1>;
21 compatible = "simple-pm-bus";
22 #address-cells = <1>;
23 #size-cells = <1>;
55 target-module@2000 { /* 0x4a002000, ap 3 44.0 */
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Dam437x-l4.dtsi2 compatible = "ti,am4-l4-wkup", "simple-pm-bus";
3 power-domains = <&prm_wkup>;
5 clock-names = "fck";
10 reg-names = "ap", "la", "ia0", "ia1";
11 #address-cells = <1>;
12 #size-cells = <1>;
18 compatible = "simple-pm-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
28 compatible = "simple-pm-bus";
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Dam33xx-l4.dtsi2 compatible = "ti,am33xx-l4-wkup", "simple-pm-bus";
3 power-domains = <&prm_wkup>;
5 clock-names = "fck";
10 reg-names = "ap", "la", "ia0", "ia1";
11 #address-cells = <1>;
12 #size-cells = <1>;
18 compatible = "simple-pm-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
28 compatible = "simple-pm-bus";
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Ddm816x.dtsi7 #include <dt-bindings/bus/ti-sysc.h>
8 #include <dt-bindings/clock/dm816.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/omap.h>
14 interrupt-parent = <&intc>;
15 #address-cells = <1>;
16 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
33 compatible = "arm,cortex-a8";
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Domap4-l4.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 compatible = "ti,omap4-l4-cfg", "simple-bus";
7 reg-names = "ap", "la", "ia0";
8 #address-cells = <1>;
9 #size-cells = <1>;
19 compatible = "simple-bus";
20 #address-cells = <1>;
21 #size-cells = <1>;
44 target-module@2000 { /* 0x4a002000, ap 3 06.0 */
45 compatible = "ti,sysc-omap4", "ti,sysc";
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Domap5-l4.dtsi2 compatible = "ti,omap5-l4-cfg", "simple-bus";
6 reg-names = "ap", "la", "ia0";
7 #address-cells = <1>;
8 #size-cells = <1>;
18 compatible = "simple-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
52 target-module@2000 { /* 0x4a002000, ap 3 44.0 */
53 compatible = "ti,sysc-omap4", "ti,sysc";
55 reg-names = "rev";
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Dam437x-l4.dtsi2 compatible = "ti,am4-l4-wkup", "simple-bus";
7 reg-names = "ap", "la", "ia0", "ia1";
8 #address-cells = <1>;
9 #size-cells = <1>;
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
25 compatible = "simple-bus";
26 #address-cells = <1>;
27 #size-cells = <1>;
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Dam33xx-l4.dtsi2 compatible = "ti,am33xx-l4-wkup", "simple-bus";
7 reg-names = "ap", "la", "ia0", "ia1";
8 #address-cells = <1>;
9 #size-cells = <1>;
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
25 compatible = "simple-bus";
26 #address-cells = <1>;
27 #size-cells = <1>;
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/ti/
Dk3-am62a-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
24 #address-cells = <2>;
25 #size-cells = <2>;
27 #interrupt-cells = <3>;
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Dk3-j7200-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
9 serdes_refclk: serdes-refclk {
10 #clock-cells = <0>;
11 compatible = "fixed-clock";
17 compatible = "mmio-sram";
19 #address-cells = <1>;
20 #size-cells = <1>;
23 atf-sram@0 {
28 scm_conf: scm-conf@100000 {
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Dk3-am62-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 #interrupt-cells = <3>;
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Dk3-j784s4-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 atf-sram@0 {
20 tifs-sram@1f0000 {
24 l3cache-sram@200000 {
29 gic500: interrupt-controller@1800000 {
30 compatible = "arm,gic-v3";
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Dk3-j721s2-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
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Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/
Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
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