| /kernel/linux/linux-5.10/drivers/firmware/efi/ |
| D | cper.c | 1 // SPDX-License-Identifier: GPL-2.0
31 * multiple boot may co-exist in ERST.
72 * cper_print_bits - print strings for set bits
102 len += scnprintf(buf+len, sizeof(buf)-len, ", %s", str); in cper_print_bits()
126 "micro-architectural error",
146 if (proc->validation_bits & CPER_PROC_VALID_TYPE) in cper_print_proc_generic()
147 printk("%s""processor_type: %d, %s\n", pfx, proc->proc_type, in cper_print_proc_generic()
148 proc->proc_type < ARRAY_SIZE(proc_type_strs) ? in cper_print_proc_generic()
149 proc_type_strs[proc->proc_type] : "unknown"); in cper_print_proc_generic()
150 if (proc->validation_bits & CPER_PROC_VALID_ISA) in cper_print_proc_generic()
[all …]
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| /kernel/linux/linux-6.6/drivers/firmware/efi/ |
| D | cper.c | 1 // SPDX-License-Identifier: GPL-2.0
32 * multiple boot may co-exist in ERST.
73 * cper_print_bits - print strings for set bits
103 len += scnprintf(buf+len, sizeof(buf)-len, ", %s", str); in cper_print_bits()
127 "micro-architectural error",
147 if (proc->validation_bits & CPER_PROC_VALID_TYPE) in cper_print_proc_generic()
148 printk("%s""processor_type: %d, %s\n", pfx, proc->proc_type, in cper_print_proc_generic()
149 proc->proc_type < ARRAY_SIZE(proc_type_strs) ? in cper_print_proc_generic()
150 proc_type_strs[proc->proc_type] : "unknown"); in cper_print_proc_generic()
151 if (proc->validation_bits & CPER_PROC_VALID_ISA) in cper_print_proc_generic()
[all …]
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| /kernel/linux/linux-6.6/drivers/pci/controller/ |
| D | pcie-iproc-bcma.c | 1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2015 Hauke Mehrtens <hauke@hauke-m.de>
15 #include "pcie-iproc.h"
21 dev->class = PCI_CLASS_BRIDGE_PCI_NORMAL; in bcma_pcie2_fixup_class()
28 struct iproc_pcie *pcie = dev->sysdata; in iproc_bcma_pcie_map_irq() local
29 struct bcma_device *bdev = container_of(pcie->dev, struct bcma_device, dev); in iproc_bcma_pcie_map_irq()
36 struct device *dev = &bdev->dev; in iproc_bcma_pcie_probe()
37 struct iproc_pcie *pcie; in iproc_bcma_pcie_probe() local
41 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); in iproc_bcma_pcie_probe()
43 return -ENOMEM; in iproc_bcma_pcie_probe()
[all …]
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| /kernel/linux/linux-5.10/drivers/pci/controller/ |
| D | pcie-iproc-bcma.c | 1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2015 Hauke Mehrtens <hauke@hauke-m.de>
15 #include "pcie-iproc.h"
21 dev->class = PCI_CLASS_BRIDGE_PCI << 8; in bcma_pcie2_fixup_class()
28 struct iproc_pcie *pcie = dev->sysdata; in iproc_pcie_bcma_map_irq() local
29 struct bcma_device *bdev = container_of(pcie->dev, struct bcma_device, dev); in iproc_pcie_bcma_map_irq()
36 struct device *dev = &bdev->dev; in iproc_pcie_bcma_probe()
37 struct iproc_pcie *pcie; in iproc_pcie_bcma_probe() local
41 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); in iproc_pcie_bcma_probe()
43 return -ENOMEM; in iproc_pcie_bcma_probe()
[all …]
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| D | pci-mvebu.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe driver for Marvell Armada 370 and Armada XP SoCs
5 * Author: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
24 #include "../pci-bridge-emul.h"
27 * PCIe unit register offsets.
36 #define PCIE_BAR_CTRL_OFF(n) (0x1804 + (((n) - 1) * 4))
68 /* Structure representing all PCIe interfaces */
74 struct resource mem; member
85 /* Structure representing one PCIe interface */
101 struct mvebu_pcie *pcie; member
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/ |
| D | mvebu-pci.txt | 1 * Marvell EBU PCIe interfaces
5 - compatible: one of the following values:
6 marvell,armada-370-pcie
7 marvell,armada-xp-pcie
8 marvell,dove-pcie
9 marvell,kirkwood-pcie
10 - #address-cells, set to <3>
11 - #size-cells, set to <2>
12 - #interrupt-cells, set to <1>
13 - bus-range: PCI bus numbers covered
[all …]
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| D | cdns,cdns-pcie-ep.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pci/cdns,cdns-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence PCIe EP Controller
10 - Tom Joseph <tjoseph@cadence.com>
13 - $ref: "cdns-pcie-ep.yaml#"
14 - $ref: "pci-ep.yaml#"
18 const: cdns,cdns-pcie-ep
23 reg-names:
[all …]
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| D | ti,j721e-pci-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/pci/ti,j721e-pci-ep.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: TI J721E PCI EP (PCIe Wrapper)
11 - Kishon Vijay Abraham I <kishon@ti.com>
14 - $ref: "cdns-pcie-ep.yaml#"
19 - ti,j721e-pcie-ep
24 reg-names:
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/ |
| D | mvebu-pci.txt | 1 * Marvell EBU PCIe interfaces
5 - compatible: one of the following values:
6 marvell,armada-370-pcie
7 marvell,armada-xp-pcie
8 marvell,dove-pcie
9 marvell,kirkwood-pcie
10 - #address-cells, set to <3>
11 - #size-cells, set to <2>
12 - #interrupt-cells, set to <1>
13 - bus-range: PCI bus numbers covered
[all …]
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| D | sifive,fu740-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/sifive,fu740-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SiFive FU740 PCIe host controller
10 SiFive FU740 PCIe host controller is based on the Synopsys DesignWare
11 PCI core. It shares common features with the PCIe DesignWare core and
13 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
16 - Paul Walmsley <paul.walmsley@sifive.com>
17 - Greentime Hu <greentime.hu@sifive.com>
[all …]
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| D | cdns,cdns-pcie-ep.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pci/cdns,cdns-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence PCIe EP Controller
10 - Tom Joseph <tjoseph@cadence.com>
13 - $ref: cdns-pcie-ep.yaml#
17 const: cdns,cdns-pcie-ep
22 reg-names:
24 - const: reg
[all …]
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| D | ti,j721e-pci-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/pci/ti,j721e-pci-ep.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: TI J721E PCI EP (PCIe Wrapper)
11 - Kishon Vijay Abraham I <kishon@ti.com>
14 - $ref: cdns-pcie-ep.yaml#
19 - const: ti,j721e-pcie-ep
20 - description: PCIe EP controller in AM64
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | armada-xp-mv78260.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
26 #address-cells = <1>;
27 #size-cells = <0>;
28 enable-method = "marvell,armada-xp-smp";
32 compatible = "marvell,sheeva-v7";
35 clock-latency = <1000000>;
40 compatible = "marvell,sheeva-v7";
[all …]
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| D | armada-xp-mv78460.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,armada-xp-smp";
33 compatible = "marvell,sheeva-v7";
36 clock-latency = <1000000>;
41 compatible = "marvell,sheeva-v7";
[all …]
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| D | armada-385.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include "armada-38x.dtsi"
19 #address-cells = <1>;
20 #size-cells = <0>;
21 enable-method = "marvell,armada-380-smp";
25 compatible = "arm,cortex-a9";
30 compatible = "arm,cortex-a9";
36 pciec: pcie {
[all …]
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| D | armada-xp-mv78230.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 enable-method = "marvell,armada-xp-smp";
31 compatible = "marvell,sheeva-v7";
34 clock-latency = <1000000>;
39 compatible = "marvell,sheeva-v7";
[all …]
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| D | armada-380.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include "armada-38x.dtsi"
19 #address-cells = <1>;
20 #size-cells = <0>;
21 enable-method = "marvell,armada-380-smp";
25 compatible = "arm,cortex-a9";
31 internal-regs {
33 compatible = "marvell,mv88f6810-pinctrl";
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/ |
| D | armada-xp-mv78460.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,armada-xp-smp";
33 compatible = "marvell,sheeva-v7";
36 clock-latency = <1000000>;
41 compatible = "marvell,sheeva-v7";
[all …]
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| D | armada-xp-mv78260.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
26 #address-cells = <1>;
27 #size-cells = <0>;
28 enable-method = "marvell,armada-xp-smp";
32 compatible = "marvell,sheeva-v7";
35 clock-latency = <1000000>;
40 compatible = "marvell,sheeva-v7";
[all …]
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| D | armada-385.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include "armada-38x.dtsi"
19 #address-cells = <1>;
20 #size-cells = <0>;
21 enable-method = "marvell,armada-380-smp";
25 compatible = "arm,cortex-a9";
30 compatible = "arm,cortex-a9";
36 pciec: pcie {
[all …]
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| D | armada-xp-mv78230.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 enable-method = "marvell,armada-xp-smp";
31 compatible = "marvell,sheeva-v7";
34 clock-latency = <1000000>;
39 compatible = "marvell,sheeva-v7";
[all …]
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| D | armada-380.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include "armada-38x.dtsi"
19 #address-cells = <1>;
20 #size-cells = <0>;
21 enable-method = "marvell,armada-380-smp";
25 compatible = "arm,cortex-a9";
31 internal-regs {
33 compatible = "marvell,mv88f6810-pinctrl";
[all …]
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| /kernel/linux/linux-5.10/drivers/staging/mt7621-pci/ |
| D | pci-mt7621.c | 1 // SPDX-License-Identifier: GPL-2.0+
12 * support RT2880/RT3883 PCIe
15 * support RT6855/MT7620 PCIe
49 /* Host-PCI bridge registers */
66 /* PCIe RC control registers */
92 * struct mt7621_pcie_port - PCIe port information
95 * @pcie: pointer to PCIe host info
106 struct mt7621_pcie *pcie; member
116 * struct mt7621_pcie - PCIe host information
119 * @mem: non-prefetchable memory resource
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/sysdev/ |
| D | fsl_pci.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC83xx/85xx/86xx PCI/PCIE support routing.
5 * Copyright 2007-2012 Freescale Semiconductor, Inc.
6 * Copyright 2008-2009 MontaVista Software, Inc.
11 * Roy Zang <tie-fei.zang@freescale.com>
12 * MPC83xx PCI-Express support:
33 #include <asm/pci-bridge.h>
34 #include <asm/ppc-pci.h>
38 #include <asm/ppc-opcode.h>
49 /* if we aren't a PCIe don't bother */ in quirk_fsl_pcie_early()
[all …]
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| /kernel/linux/linux-6.6/arch/powerpc/sysdev/ |
| D | fsl_pci.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC83xx/85xx/86xx PCI/PCIE support routing.
5 * Copyright 2007-2012 Freescale Semiconductor, Inc.
6 * Copyright 2008-2009 MontaVista Software, Inc.
11 * Roy Zang <tie-fei.zang@freescale.com>
12 * MPC83xx PCI-Express support:
34 #include <asm/pci-bridge.h>
35 #include <asm/ppc-pci.h>
39 #include <asm/ppc-opcode.h>
51 /* if we aren't a PCIe don't bother */ in quirk_fsl_pcie_early()
[all …]
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