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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/
Drockchip,rk3399-dmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <briannorris@chromium.org>
15 - rockchip,rk3399-dmc
17 devfreq-events:
21 Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt.
26 clock-names:
28 - const: dmc_clk
[all …]
/kernel/linux/linux-6.6/drivers/devfreq/
Drk3399_dmc.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Lin Huang <hl@rock-chips.com>
7 #include <linux/arm-smccc.h>
12 #include <linux/devfreq-event.h>
28 #define NS_TO_CYCLE(NS, MHz) (((NS) * (MHz)) / NSEC_PER_USEC) argument
74 unsigned long old_clk_rate = dmcfreq->rate; in rk3399_dmcfreq_target()
92 if (dmcfreq->rate == target_rate) in rk3399_dmcfreq_target()
95 mutex_lock(&dmcfreq->lock); in rk3399_dmcfreq_target()
98 * Ensure power-domain transitions don't interfere with ARM Trusted in rk3399_dmcfreq_target()
99 * Firmware power-domain idling. in rk3399_dmcfreq_target()
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/
Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
19 regulator-max-microvolt = <900000>;
[all …]
Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
10 #include "rk3399-op1-opp.dtsi"
19 stdout-path = "serial2:115200n8";
28 * - Rails that only connect to the EC (or devices that the EC talks to)
30 * - Rails _are_ included if the rails go to the AP even if the AP
39 * - The EC controls the enable and the EC always enables a rail as
41 * - The rails are actually connected to each other by a jumper and
46 ppvar_sys: ppvar-sys {
[all …]
/kernel/linux/linux-5.10/block/
Dbfq-iosched.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 #include <linux/blk-cgroup.h>
13 #include "blk-cgroup-rwstat.h"
31 * Soft real-time applications are extremely more latency sensitive
32 * than interactive ones. Over-raise the weight of the former to
40 * struct bfq_service_tree - per ioprio_class service tree.
42 * Each service tree represents a B-WF2Q+ scheduler on its own. Each
50 /* tree for idle entities (i.e., not backlogged, with V < F_i)*/
51 struct rb_root idle; member
53 /* idle entity with minimum F_i */
[all …]
Dblk-throttle.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/blk-cgroup.h>
16 #include "blk-cgroup-rwstat.h"
31 #define DFL_LATENCY_TARGET (-1L)
56 * the parent, they're popped in round-robin order so that no single source
61 * throtl_service_queue and then dispatched in round-robin order.
70 struct list_head node; /* service_queue->queued[] */
87 * their ->disptime.
97 THROTL_TG_WAS_EMPTY = 1 << 1, /* bio_lists[] became non-empty */
110 struct blkg_policy_data pd; member
[all …]
Dblk-iolatency.c1 // SPDX-License-Identifier: GPL-2.0
3 * Block rq-qos base io controller
7 * - It's bio based, so the latency covers the whole block layer in addition to
9 * - We will throttle all IO that comes in here if we need to.
10 * - We use the mean latency over the 100ms window. This is because writes can
13 * - By default there's no throttling, we set the queue_depth to UINT_MAX so
44 * number of IO's we're allowed to have in flight. This starts at (u64)-1 down
55 * total_time += min_lat_nsec - actual_io_completion
69 #include <linux/backing-dev.h>
76 #include <linux/blk-mq.h>
[all …]
/kernel/linux/linux-5.10/kernel/sched/
Dfair.c1 // SPDX-License-Identifier: GPL-2.0
55 * Targeted preemption latency for CPU-bound tasks:
58 * 'timeslice length' - timeslices in CFS are of variable length
59 * and have no persistent notion like in traditional, time-slice
63 * run vmstat and monitor the context-switches (cs) field)
71 * The initial- and re-scaling of tunables is configurable
75 * SCHED_TUNABLESCALING_NONE - unscaled, always *1
76 * SCHED_TUNABLESCALING_LOG - scaled logarithmical, *1+ilog(ncpus)
77 * SCHED_TUNABLESCALING_LINEAR - scaled linear, *ncpus
84 * Minimal preemption granularity for CPU-bound tasks:
[all …]
/kernel/linux/linux-6.6/block/
Dbfq-iosched.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 #include "blk-cgroup-rwstat.h"
29 * Soft real-time applications are extremely more latency sensitive
30 * than interactive ones. Over-raise the weight of the former to
38 * per-actuator data. The current value is hopefully a good upper
46 * struct bfq_service_tree - per ioprio_class service tree.
48 * Each service tree represents a B-WF2Q+ scheduler on its own. Each
56 /* tree for idle entities (i.e., not backlogged, with V < F_i)*/
57 struct rb_root idle; member
59 /* idle entity with minimum F_i */
[all …]
Dblk-throttle.c1 // SPDX-License-Identifier: GPL-2.0
14 #include "blk-cgroup-rwstat.h"
15 #include "blk-stat.h"
16 #include "blk-throttle.h"
31 #define DFL_LATENCY_TARGET (-1L)
50 unsigned long total_latency; /* ns / 1024 */
55 unsigned long latency; /* ns / 1024 */
94 return pd_to_blkg(&tg->pd); in tg_to_blkg()
98 * sq_to_tg - return the throl_grp the specified service queue belongs to
101 * Return the throtl_grp @sq belongs to. If @sq is the top-level one
[all …]
Dblk-iolatency.c1 // SPDX-License-Identifier: GPL-2.0
3 * Block rq-qos base io controller
7 * - It's bio based, so the latency covers the whole block layer in addition to
9 * - We will throttle all IO that comes in here if we need to.
10 * - We use the mean latency over the 100ms window. This is because writes can
13 * - By default there's no throttling, we set the queue_depth to UINT_MAX so
44 * number of IO's we're allowed to have in flight. This starts at (u64)-1 down
55 * total_time += min_lat_nsec - actual_io_completion
69 #include <linux/backing-dev.h>
76 #include <linux/blk-mq.h>
[all …]
/kernel/linux/linux-5.10/drivers/memory/
Demif.c1 // SPDX-License-Identifier: GPL-2.0-only
32 * struct emif_data - Per device static data for driver's use
37 * to this EMIF - read from MR4 register. If there
42 * @base: base address of memory-mapped IO registers.
47 * frequencies, to avoid re-calculating them on
82 u32 type = emif->plat_data->device_info->type; in do_emif_regdump_show()
83 u32 ip_rev = emif->plat_data->ip_rev; in do_emif_regdump_show()
86 regs->freq/1000000); in do_emif_regdump_show()
88 seq_printf(s, "ref_ctrl_shdw\t: 0x%08x\n", regs->ref_ctrl_shdw); in do_emif_regdump_show()
89 seq_printf(s, "sdram_tim1_shdw\t: 0x%08x\n", regs->sdram_tim1_shdw); in do_emif_regdump_show()
[all …]
/kernel/linux/linux-6.6/Documentation/scheduler/
Dsched-energy.rst6 ---------------
25 please refer to its documentation (see Documentation/power/energy-model.rst).
29 -----------------------------
32 - energy = [joule] (resource like a battery on powered devices)
33 - power = energy/time = [joule/second] = [watt]
39 --------------------
45 -----------
49 optimization objective to the current performance-only objective for the
50 scheduler. This alternative considers two objectives: energy-efficiency and
54 implications of its decisions rather than blindly applying energy-saving
[all …]
/kernel/linux/linux-5.10/Documentation/scheduler/
Dsched-energy.rst6 ---------------
25 please refer to its documentation (see Documentation/power/energy-model.rst).
29 -----------------------------
32 - energy = [joule] (resource like a battery on powered devices)
33 - power = energy/time = [joule/second] = [watt]
39 --------------------
45 -----------
49 optimization objective to the current performance-only objective for the
50 scheduler. This alternative considers two objectives: energy-efficiency and
54 implications of its decisions rather than blindly applying energy-saving
[all …]
/kernel/linux/linux-6.6/drivers/base/power/
Ddomain.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/base/power/domain.c - Common code related to device power domains.
35 __routine = genpd->dev_ops.callback; \
54 mutex_lock(&genpd->mlock); in genpd_lock_mtx()
60 mutex_lock_nested(&genpd->mlock, depth); in genpd_lock_nested_mtx()
65 return mutex_lock_interruptible(&genpd->mlock); in genpd_lock_interruptible_mtx()
70 return mutex_unlock(&genpd->mlock); in genpd_unlock_mtx()
81 __acquires(&genpd->slock) in genpd_lock_spin()
85 spin_lock_irqsave(&genpd->slock, flags); in genpd_lock_spin()
86 genpd->lock_flags = flags; in genpd_lock_spin()
[all …]
/kernel/linux/linux-5.10/drivers/base/power/
Ddomain.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/base/power/domain.c - Common code related to device power domains.
34 __routine = genpd->dev_ops.callback; \
53 mutex_lock(&genpd->mlock); in genpd_lock_mtx()
59 mutex_lock_nested(&genpd->mlock, depth); in genpd_lock_nested_mtx()
64 return mutex_lock_interruptible(&genpd->mlock); in genpd_lock_interruptible_mtx()
69 return mutex_unlock(&genpd->mlock); in genpd_unlock_mtx()
80 __acquires(&genpd->slock) in genpd_lock_spin()
84 spin_lock_irqsave(&genpd->slock, flags); in genpd_lock_spin()
85 genpd->lock_flags = flags; in genpd_lock_spin()
[all …]
/kernel/linux/linux-6.6/kernel/sched/
Dfair.c1 // SPDX-License-Identifier: GPL-2.0
43 #include <linux/memory-tiers.h>
93 * Targeted preemption latency for CPU-bound tasks:
96 * 'timeslice length' - timeslices in CFS are of variable length
97 * and have no persistent notion like in traditional, time-slice
101 * run vmstat and monitor the context-switches (cs) field)
109 * The initial- and re-scaling of tunables is configurable
113 * SCHED_TUNABLESCALING_NONE - unscaled, always *1
114 * SCHED_TUNABLESCALING_LOG - scaled logarithmical, *1+ilog(ncpus)
115 * SCHED_TUNABLESCALING_LINEAR - scaled linear, *ncpus
[all …]
/kernel/linux/linux-5.10/drivers/dma/
Dpl330.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include <linux/dma-mapping.h>
46 CCTRL6, /* Cacheable write-through, allocate on writes only */
47 CCTRL7, /* Cacheable write-back, allocate on writes only */
245 * at 1byte/burst for P<->M and M<->M respectively.
247 * should be enough for P<->M and M<->M respectively.
382 /* Index of the last submitted request or -1 if the DMA is stopped */
423 /* DMA-Engine Channel */
449 /* For D-to-M and M-to-D channels */
453 /* DMA-mapped view of the FIFO; may differ if an IOMMU is present */
[all …]
/kernel/linux/linux-6.6/drivers/dma/
Dpl330.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include <linux/dma-mapping.h>
46 CCTRL6, /* Cacheable write-through, allocate on writes only */
47 CCTRL7, /* Cacheable write-back, allocate on writes only */
245 * at 1byte/burst for P<->M and M<->M respectively.
247 * should be enough for P<->M and M<->M respectively.
382 /* Index of the last submitted request or -1 if the DMA is stopped */
423 /* DMA-Engine Channel */
449 /* For D-to-M and M-to-D channels */
453 /* DMA-mapped view of the FIFO; may differ if an IOMMU is present */
[all …]
/kernel/linux/linux-6.6/drivers/i2c/busses/
Di2c-mv64xxx.c182 drv_data->cntl_bits = MV64XXX_I2C_REG_CONTROL_ACK | in mv64xxx_i2c_prepare_for_io()
185 if (!drv_data->atomic) in mv64xxx_i2c_prepare_for_io()
186 drv_data->cntl_bits |= MV64XXX_I2C_REG_CONTROL_INTEN; in mv64xxx_i2c_prepare_for_io()
188 if (msg->flags & I2C_M_RD) in mv64xxx_i2c_prepare_for_io()
191 if (msg->flags & I2C_M_TEN) { in mv64xxx_i2c_prepare_for_io()
192 drv_data->addr1 = 0xf0 | (((u32)msg->addr & 0x300) >> 7) | dir; in mv64xxx_i2c_prepare_for_io()
193 drv_data->addr2 = (u32)msg->addr & 0xff; in mv64xxx_i2c_prepare_for_io()
195 drv_data->addr1 = MV64XXX_I2C_ADDR_ADDR((u32)msg->addr) | dir; in mv64xxx_i2c_prepare_for_io()
196 drv_data->addr2 = 0; in mv64xxx_i2c_prepare_for_io()
212 if (drv_data->offload_enabled) { in mv64xxx_i2c_hw_init()
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8mn-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8mm-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mn-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/imx8mm-power.h>
11 #include <dt-bindings/reset/imx8mq-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mm-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/
D0001_linux_arch.patch7 Change-Id: I8c7b42f8858212fb4b2d56a871d3f4d5afc73954
9 diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
11 --- a/arch/arm64/Kconfig
13 @@ -183,7 +183,6 @@ config ARM64
17 - select HOLES_IN_ZONE
21 @@ -1023,6 +1022,9 @@ config NEED_PER_CPU_EMBED_FIRST_CHUNK
31 @@ -1148,7 +1150,7 @@ config XEN
35 - int
40 @@ -1182,15 +1184,6 @@ config UNMAP_KERNEL_AT_EL0
44 -config MITIGATE_SPECTRE_BRANCH_HISTORY
[all …]

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