| /kernel/linux/linux-6.6/drivers/irqchip/ |
| D | irq-riscv-intc.c | 1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2017-2018 SiFive
8 #define pr_fmt(fmt) "riscv-intc: " fmt
29 unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG; in riscv_intc_irq()
36 * On RISC-V systems local interrupts are masked or unmasked by writing
38 * on the local hart, these functions can only be called on the hart that
44 csr_clear(CSR_IE, BIT(d->hwirq)); in riscv_intc_irq_mask()
49 csr_set(CSR_IE, BIT(d->hwirq)); in riscv_intc_irq_unmask()
55 * Andes specific S-mode local interrupt causes (hwirq) in andes_intc_irq_mask()
56 * are defined as (256 + n) and controlled by n-th bit in andes_intc_irq_mask()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | sifive,plic-1.0.0.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/interrupt-controller/sifive,plic-1.0.0.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: SiFive Platform-Level Interrupt Controller (PLIC)
11 SiFive SOCs include an implementation of the Platform-Level Interrupt Controller
12 (PLIC) high-level specification in the RISC-V Privileged Architecture
14 hart contexts in the system, via the external interrupt source in each hart.
16 A hart context is a privilege mode in a hardware execution thread. For example,
17 in an 4 core system with 2-way SMT, you have 8 harts and probably at least two
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/ |
| D | sifive,plic-1.0.0.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/interrupt-controller/sifive,plic-1.0.0.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: SiFive Platform-Level Interrupt Controller (PLIC)
11 SiFive SoCs and other RISC-V SoCs include an implementation of the
12 Platform-Level Interrupt Controller (PLIC) high-level specification in
13 the RISC-V Privileged Architecture specification. The PLIC connects all
14 external interrupts in the system to all hart contexts in the system, via
15 the external interrupt source in each hart.
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| /kernel/linux/linux-5.10/drivers/irqchip/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
216 bool "J-Core integrated AIC" if COMPILE_TEST
220 Support for the J-Core integrated AIC.
231 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
234 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
239 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
274 tristate "TS-4800 IRQ controller"
279 Support for the TS-4800 FPGA IRQ controller
444 bool "C-SKY Multi Processor Interrupt Controller"
447 Say yes here to enable C-SKY SMP interrupt controller driver used
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| /kernel/linux/linux-6.6/arch/riscv/kernel/ |
| D | kexec_relocate.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2019 FORTH-ICS/CARV
19 * s3: (const) The hartid of the current hart
21 * s5: (const) Number of words per page
63 REG_L t0, 0(s0) /* t0 = *image->entry */
64 addi s0, s0, RISCV_SZPTR /* image->entry++ */
66 /* IND_DESTINATION entry ? -> save destination address */
73 /* IND_INDIRECTION entry ? -> update next entry ptr (PA) */
82 /* IND_DONE entry ? -> jump to done label */
89 * IND_SOURCE entry ? -> copy page word by word to the
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| D | cpufeature.c | 1 // SPDX-License-Identifier: GPL-2.0-only
27 #include "copy-unaligned.h"
29 #define NUM_ALPHA_EXTS ('z' - 'a' + 1)
33 #define MISALIGNED_COPY_SIZE ((MISALIGNED_BUFFER_SIZE / 2) - 0x80)
40 /* Per-cpu ISA extensions. */
47 * riscv_isa_extension_base() - Get base extension word
63 * __riscv_isa_extension_available() - Check whether given extension
88 pr_err("Zicbom detected in ISA string, disabling as no cbom-block-size found\n"); in riscv_isa_extension_check()
91 pr_err("Zicbom disabled as cbom-block-size present, but is not a power-of-2\n"); in riscv_isa_extension_check()
97 pr_err("Zicboz detected in ISA string, but no cboz-block-size found\n"); in riscv_isa_extension_check()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/ |
| D | sifive,clint.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Palmer Dabbelt <palmer@dabbelt.com>
11 - Anup Patel <anup.patel@wdc.com>
14 SiFive (and other RISC-V) SOCs include an implementation of the SiFive
15 Core Local Interruptor (CLINT) for M-mode timer and M-mode inter-processor
16 interrupts. It directly connects to the timer and inter-processor interrupt
17 lines of various HARTs (or CPUs) so RISC-V per-HART (or per-CPU) local
19 The clock frequency of CLINT is specified via "timebase-frequency" DT
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/timer/ |
| D | sifive,clint.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Palmer Dabbelt <palmer@dabbelt.com>
11 - Anup Patel <anup.patel@wdc.com>
14 SiFive (and other RISC-V) SOCs include an implementation of the SiFive
15 Core Local Interruptor (CLINT) for M-mode timer and M-mode inter-processor
16 interrupts. It directly connects to the timer and inter-processor interrupt
17 lines of various HARTs (or CPUs) so RISC-V per-HART (or per-CPU) local
19 The clock frequency of CLINT is specified via "timebase-frequency" DT
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| /kernel/linux/linux-6.6/Documentation/riscv/ |
| D | boot.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 RISC-V Kernel Boot Requirements and Constraints
10 This document describes what the RISC-V kernel expects from bootloaders and
16 Pre-kernel Requirements and Constraints
19 The RISC-V kernel expects the following of bootloaders and platform firmware:
22 --------------
24 The RISC-V kernel expects:
30 ---------
32 The RISC-V kernel expects:
37 -------------------------------------
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| /kernel/linux/linux-6.6/drivers/cpuidle/ |
| D | cpuidle-riscv-sbi.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * RISC-V SBI CPU idle driver.
9 #define pr_fmt(fmt) "cpuidle-riscv-sbi: " fmt
52 data->available = true; in sbi_set_domain_state()
53 data->state = state; in sbi_set_domain_state()
60 return data->state; in sbi_get_domain_state()
67 data->available = false; in sbi_clear_domain_state()
74 return data->available; in sbi_is_domain_state_available()
115 u32 *states = data->states; in __sbi_enter_domain_idle_state()
116 struct device *pd_dev = data->dev; in __sbi_enter_domain_idle_state()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/temperature/ |
| D | adi,ltc2983.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices LTC2983 Multi-sensor Temperature system
10 - Nuno Sá <nuno.sa@analog.com>
13 Analog Devices LTC2983 Multi-Sensor Digital Temperature Measurement System
14 https://www.analog.com/media/en/technical-documentation/data-sheets/2983fc.pdf
19 - adi,ltc2983
27 adi,mux-delay-config-us:
29 The LTC2983 performs 2 or 3 internal conversion cycles per temperature
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| /kernel/linux/linux-5.10/Documentation/timers/ |
| D | highres.rst | 8 https://www.kernel.org/doc/ols/2006/ols2006v1-pages-333-346.pdf
11 http://www.cs.columbia.edu/~nahum/w6998/papers/ols2006-hrtimers-slides.pdf
23 - hrtimer base infrastructure
24 - timeofday and clock source management
25 - clock event management
26 - high resolution timer functionality
27 - dynamic ticks
31 ---------------------------
40 - time ordered enqueueing into a rb-tree
41 - independent of ticks (the processing is based on nanoseconds)
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| /kernel/linux/linux-6.6/Documentation/timers/ |
| D | highres.rst | 8 https://www.kernel.org/doc/ols/2006/ols2006v1-pages-333-346.pdf
11 http://www.cs.columbia.edu/~nahum/w6998/papers/ols2006-hrtimers-slides.pdf
23 - hrtimer base infrastructure
24 - timeofday and clock source management
25 - clock event management
26 - high resolution timer functionality
27 - dynamic ticks
31 ---------------------------
40 - time ordered enqueueing into a rb-tree
41 - independent of ticks (the processing is based on nanoseconds)
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| /kernel/liteos_m/arch/risc-v/nuclei/gcc/nmsis/Core/Include/ |
| D | core_feature_pmp.h | 4 * SPDX-License-Identifier: Apache-2.0
10 * www.apache.org/licenses/LICENSE-2.0
42 * Optional physical memory protection (PMP) unit provides per-hart machine-mode
58 * \param [in] idx PMP region index(0-15)
70 idx -= 4; in __get_PMPxCFG()
73 idx -= 8; in __get_PMPxCFG()
76 idx -= 12; in __get_PMPxCFG()
86 idx -= 8; in __get_PMPxCFG()
100 * \param [in] idx PMPx region index(0-15)
115 idx -= 4; in __set_PMPxCFG()
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| /kernel/linux/linux-6.6/arch/riscv/kvm/ |
| D | aia.c | 1 // SPDX-License-Identifier: GPL-2.0
38 raw_spin_lock_irqsave(&hgctrl->lock, flags); in aia_find_hgei()
40 hgei = -1; in aia_find_hgei()
42 if (hgctrl->owners[i] == owner) { in aia_find_hgei()
48 raw_spin_unlock_irqrestore(&hgctrl->lock, flags); in aia_find_hgei()
71 struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; in kvm_riscv_vcpu_aia_flush_interrupts()
77 if (READ_ONCE(vcpu->arch.irqs_pending_mask[1])) { in kvm_riscv_vcpu_aia_flush_interrupts()
78 mask = xchg_acquire(&vcpu->arch.irqs_pending_mask[1], 0); in kvm_riscv_vcpu_aia_flush_interrupts()
79 val = READ_ONCE(vcpu->arch.irqs_pending[1]) & mask; in kvm_riscv_vcpu_aia_flush_interrupts()
81 csr->hviph &= ~mask; in kvm_riscv_vcpu_aia_flush_interrupts()
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| /kernel/linux/linux-6.6/drivers/clocksource/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
60 bool "OMAP dual-mode timer driver" if ARCH_K3 || COMPILE_TEST
64 Enables the support for the TI dual-mode timer driver.
180 Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture,
203 32-bit free running decrementing counters.
238 bool "Integrator-AP timer driver" if COMPILE_TEST
241 Enables support for the Integrator-AP timer.
266 available on many OMAP-like platforms.
285 bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST
289 These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores
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| /kernel/linux/linux-5.10/drivers/clocksource/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
165 Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture,
188 32-bit free running decrementing counters.
242 bool "Integrator-AP timer driver" if COMPILE_TEST
245 Enables support for the Integrator-AP timer.
278 available on many OMAP-like platforms.
287 It has a 64-bit counter with update rate up to 1000MHz.
288 This counter is accessed via couple of 32-bit memory-mapped registers.
307 bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST
311 These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores
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| /kernel/linux/linux-6.6/Documentation/RCU/ |
| D | RTFP.txt | 4 This document describes RCU-related publications, and is followed by
19 with short-lived threads, such as the K42 research operating system.
20 However, Linux has long-lived tasks, so more is needed.
23 serialization, which is an RCU-like mechanism that relies on the presence
27 that these overheads were not so expensive in the mid-80s. Nonetheless,
28 passive serialization appears to be the first deferred-destruction
30 has lapsed, so this approach may be used in non-GPL software, if desired.
34 In 1987, Rashid et al. described lazy TLB-flush [RichardRashid87a].
36 this paper helped inspire the update-side batching used in the later
38 a description of Argus that noted that use of out-of-date values can
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|
| /kernel/linux/linux-5.10/Documentation/RCU/ |
| D | RTFP.txt | 4 This document describes RCU-related publications, and is followed by
19 with short-lived threads, such as the K42 research operating system.
20 However, Linux has long-lived tasks, so more is needed.
23 serialization, which is an RCU-like mechanism that relies on the presence
27 that these overheads were not so expensive in the mid-80s. Nonetheless,
28 passive serialization appears to be the first deferred-destruction
30 has lapsed, so this approach may be used in non-GPL software, if desired.
34 In 1987, Rashid et al. described lazy TLB-flush [RichardRashid87a].
36 this paper helped inspire the update-side batching used in the later
38 a description of Argus that noted that use of out-of-date values can
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| /kernel/linux/linux-6.6/include/acpi/ |
| D | actbl2.h | 1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
6 * Copyright (C) 2000 - 2023, Intel Corp.
51 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */
59 * All tables must be byte-packed to match the ACPI specification, since
69 * essentially useless for dealing with packed data in on-disk formats or
78 * AEST - Arm Error Source Table
89 /* Common Subtable header - one per Node Structure (Subtable) */
246 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface
266 * APMT - ARM Performance Monitoring Unit Table
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| /kernel/linux/linux-5.10/drivers/platform/x86/ |
| D | wmi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ACPI-WMI mapping driver
5 * Copyright (C) 2007-2008 Carlos Corbacho <carlos@strangeworlds.co.uk>
9 * Copyright (c) 2001-2007 Anton Altaparmakov
12 * WMI bus infrastructure by Andrew Lutomirski and Darren Hart:
37 MODULE_DESCRIPTION("ACPI-WMI Mapping Driver");
101 .name = "acpi-wmi",
122 block = &wblock->gblock; in find_guid()
124 if (guid_equal(&block->guid, &guid_input)) { in find_guid()
150 if (wdriver->id_table == NULL) in find_guid_context()
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| /kernel/linux/linux-6.6/drivers/platform/x86/ |
| D | wmi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ACPI-WMI mapping driver
5 * Copyright (C) 2007-2008 Carlos Corbacho <carlos@strangeworlds.co.uk>
9 * Copyright (c) 2001-2007 Anton Altaparmakov
12 * WMI bus infrastructure by Andrew Lutomirski and Darren Hart:
39 MODULE_DESCRIPTION("ACPI-WMI Mapping Driver");
107 "05901221-D566-11D1-B2F0-00A0C9062910", /* wmi-bmof */
108 "8A42EA14-4F2A-FD45-6422-0087F7A7E608", /* dell-wmi-ddv */
128 if (guid_equal(&wblock->gblock.guid, &guid_input)) { in find_guid()
154 id = wdriver->id_table; in find_guid_context()
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| /kernel/linux/linux-5.10/kernel/futex/ |
| D | core.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
16 * PI-futex support started by Ingo Molnar and Thomas Gleixner
23 * Requeue-PI support by Darren Hart <dvhltc@us.ibm.com>
29 * Kirkwood for proof-of-concept implementation.
40 #include <linux/fault-inject.h>
101 * smp_mb(); (A) <-- paired with -.
110 * `--------> smp_mb(); (B)
117 * waiters--; (b) unlock(hash_bucket(futex));
141 * acquiring the lock. It then decrements them again after releasing it -
161 * NOMMU does not have per process address space. Let the compiler optimize
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| /kernel/linux/linux-5.10/ |
| D | MAINTAINERS | 9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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| /kernel/linux/linux-6.6/ |
| D | MAINTAINERS | 5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
38 One pattern per line. Multiple F: lines acceptable.
46 N: [^a-z]tegra all files whose path contains tegra
48 One pattern per line. Multiple N: lines acceptable.
61 One regex pattern per line. Multiple K: lines acceptable.
64 ----------------
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|