| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-mt65xx.txt | 3 The Mediatek's Pin controller is used to control SoC pins.
6 - compatible: value should be one of the following.
7 "mediatek,mt2701-pinctrl", compatible with mt2701 pinctrl.
8 "mediatek,mt2712-pinctrl", compatible with mt2712 pinctrl.
9 "mediatek,mt6397-pinctrl", compatible with mt6397 pinctrl.
10 "mediatek,mt7623-pinctrl", compatible with mt7623 pinctrl.
11 "mediatek,mt8127-pinctrl", compatible with mt8127 pinctrl.
12 "mediatek,mt8135-pinctrl", compatible with mt8135 pinctrl.
13 "mediatek,mt8167-pinctrl", compatible with mt8167 pinctrl.
14 "mediatek,mt8173-pinctrl", compatible with mt8173 pinctrl.
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| D | st,stm32-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre TORGUE <alexandre.torgue@st.com>
15 controller. It controls the input/output settings on the available pins and
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
24 - st,stm32f746-pinctrl
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | mediatek,mt65xx-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt65xx-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@kernel.org>
13 The MediaTek's MT65xx Pin controller is used to control SoC pins.
18 - mediatek,mt2701-pinctrl
19 - mediatek,mt2712-pinctrl
20 - mediatek,mt6397-pinctrl
21 - mediatek,mt7623-pinctrl
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| D | sunplus,sp7021-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/sunplus,sp7021-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Dvorkin Dmitry <dvorkin@tibbo.com>
12 - Wells Lu <wellslutw@gmail.com>
15 The Sunplus SP7021 pin controller is used to control SoC pins. Please
16 refer to pinctrl-bindings.txt in this directory for details of the common
19 SP7021 has 99 digital GPIO pins which are numbered from GPIO 0 to 98. All
20 are multiplexed with some special function pins. SP7021 has 3 types of
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| D | st,stm32-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre TORGUE <alexandre.torgue@foss.st.com>
15 controller. It controls the input/output settings on the available pins and
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
24 - st,stm32f746-pinctrl
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| /kernel/linux/linux-6.6/drivers/pinctrl/nomadik/ |
| D | pinctrl-abx500.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
13 /* pins alternate function */
34 * struct abx500_function - ABx500 pinctrl mux function
46 * struct abx500_pingroup - describes a ABx500 pin group
48 * @pins: an array of discrete physical pins used in this group, taken
49 * from the driver-local pin enumeration space
50 * @num_pins: the number of pins in this group array, i.e. the number of
51 * elements in .pins so we can iterate over that array
52 * @altsetting: the altsetting to apply to all pins in this group to
57 const unsigned int *pins; member
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| D | pinctrl-nomadik.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
66 * Used to reference an Other alternate-C function.
77 * struct prcm_gpio_altcx - Other alternate-C function
78 * @used: other alternate-C function availability
89 * struct prcm_gpio_altcx_pin_desc - Other alternate-C pin
91 * @altcx: array of other alternate-C[1-4] functions
99 * struct nmk_function - Nomadik pinctrl mux function
111 * struct nmk_pingroup - describes a Nomadik pin group
112 * @grp: Generic data of the pin group (name and pins)
113 * @altsetting: the altsetting to apply to all pins in this group to
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| /kernel/linux/linux-5.10/drivers/pinctrl/nomadik/ |
| D | pinctrl-abx500.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
9 /* pins alternate function */
30 * struct abx500_function - ABx500 pinctrl mux function
42 * struct abx500_pingroup - describes a ABx500 pin group
44 * @pins: an array of discrete physical pins used in this group, taken
45 * from the driver-local pin enumeration space
46 * @num_pins: the number of pins in this group array, i.e. the number of
47 * elements in .pins so we can iterate over that array
48 * @altsetting: the altsetting to apply to all pins in this group to
53 const unsigned int *pins; member
[all …]
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| D | pinctrl-nomadik.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
62 * Used to reference an Other alternate-C function.
73 * struct prcm_gpio_altcx - Other alternate-C function
74 * @used: other alternate-C function availability
85 * struct prcm_gpio_altcx_pin_desc - Other alternate-C pin
87 * @altcx: array of other alternate-C[1-4] functions
95 * struct nmk_function - Nomadik pinctrl mux function
107 * struct nmk_pingroup - describes a Nomadik pin group
109 * @pins: an array of discrete physical pins used in this group, taken
110 * from the driver-local pin enumeration space
[all …]
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| /kernel/linux/linux-5.10/drivers/pinctrl/tegra/ |
| D | pinctrl-tegra.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
44 /* argument: Integer, range is HW-dependant */
46 /* argument: Integer, range is HW-dependant */
48 /* argument: Integer, range is HW-dependant */
50 /* argument: Integer, range is HW-dependant */
52 /* argument: Integer, range is HW-dependant */
72 * struct tegra_function - Tegra pinctrl mux function
84 * struct tegra_pingroup - Tegra pin group
86 * @pins An array of pin IDs included in this pin group.
87 * @npins The number of entries in @pins.
[all …]
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| /kernel/linux/linux-6.6/drivers/pinctrl/tegra/ |
| D | pinctrl-tegra.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
28 /* Array of size soc->ngroups */
53 /* argument: Integer, range is HW-dependant */
55 /* argument: Integer, range is HW-dependant */
57 /* argument: Integer, range is HW-dependant */
59 /* argument: Integer, range is HW-dependant */
61 /* argument: Integer, range is HW-dependant */
81 * struct tegra_function - Tegra pinctrl mux function
93 * struct tegra_pingroup - Tegra pin group
95 * @pins An array of pin IDs included in this pin group.
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/st/ |
| D | stm32mp251.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
13 #address-cells = <1>;
14 #size-cells = <0>;
17 compatible = "arm,cortex-a35";
20 enable-method = "psci";
24 arm-pmu {
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/i2c/ |
| D | adv7604.txt | 3 The ADV7604 and ADV7611/12 are multiformat video decoders with an integrated
12 - compatible: Must contain one of the following
13 - "adi,adv7611" for the ADV7611
14 - "adi,adv7612" for the ADV7612
16 - reg: I2C slave addresses
17 The ADV76xx has up to thirteen 256-byte maps that can be accessed via the
19 slave device on the I2C bus. The main address is mandatory, others are
22 - hpd-gpios: References to the GPIOs that control the HDMI hot-plug
23 detection pins, one per HDMI input. The active flag indicates the GPIO
24 level that enables hot-plug detection.
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| /kernel/linux/linux-5.10/drivers/pinctrl/mediatek/ |
| D | pinctrl-mtk-common.c | 1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/pinctrl/pinconf-generic.h>
28 #include <dt-bindings/pinctrl/mt65xx.h>
32 #include "../pinctrl-utils.h"
33 #include "mtk-eint.h"
34 #include "pinctrl-mtk-common.h"
48 * There are two base address for pull related configuration
49 * in mt8135, and different GPIO pins use different base address.
56 if (pin >= pctl->devdata->type1_start && pin < pctl->devdata->type1_end) in mtk_get_regmap()
57 return pctl->regmap2; in mtk_get_regmap()
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | stm32h743-pinctrl.dtsi | 2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
47 pin-controller {
48 #address-cells = <1>;
49 #size-cells = <1>;
50 compatible = "st,stm32h743-pinctrl";
52 interrupt-parent = <&exti>;
54 pins-are-numbered;
57 gpio-controller;
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| D | stm32f7-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
7 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
8 #include <dt-bindings/mfd/stm32f7-rcc.h>
12 pinctrl: pin-controller {
13 #address-cells = <1>;
14 #size-cells = <1>;
16 interrupt-parent = <&exti>;
18 pins-are-numbered;
21 gpio-controller;
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| D | ste-snowball.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011 ST-Ericsson AB
6 /dts-v1/;
7 #include "ste-db9500.dtsi"
8 #include "ste-href-ab8500.dtsi"
9 #include "ste-href-family-pinctrl.dtsi"
13 compatible = "calaosystems,snowball-a9500", "st-ericsson,u9500";
21 compatible = "regulator-fixed";
22 regulator-name = "en-3v3-fixed-supply";
23 regulator-min-microvolt = <3300000>;
[all …]
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| D | stm32f4-pinctrl.dtsi | 2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
44 #include <dt-bindings/mfd/stm32f4-rcc.h>
48 pinctrl: pin-controller {
49 #address-cells = <1>;
50 #size-cells = <1>;
52 interrupt-parent = <&exti>;
54 pins-are-numbered;
57 gpio-controller;
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| D | mt8135.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt8135-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/mt8135-resets.h>
12 #include "mt8135-pinfunc.h"
15 #address-cells = <2>;
16 #size-cells = <2>;
18 interrupt-parent = <&sysirq>;
20 cpu-map {
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/st/ |
| D | ste-snowball.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011 ST-Ericsson AB
6 /dts-v1/;
7 #include "ste-db9500.dtsi"
8 #include "ste-href-ab8500.dtsi"
9 #include "ste-href-family-pinctrl.dtsi"
13 compatible = "calaosystems,snowball-a9500", "st-ericsson,u9500";
21 compatible = "simple-battery";
22 battery-type = "lithium-ion-polymer";
25 thermal-zones {
[all …]
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| /kernel/linux/linux-6.6/drivers/pinctrl/spear/ |
| D | pinctrl-spear.h | 26 * struct spear_pmx_mode - SPEAr pmx mode
42 * struct spear_muxreg - SPEAr mux reg configuration
54 const unsigned *pins; member
85 .pins = __pins, \
92 * struct spear_modemux - SPEAr mode mux configuration
104 * struct spear_pingroup - SPEAr pin group configurations
106 * @pins: array containing pin numbers
107 * @npins: size of pins array
111 * A representation of a group of pins in the SPEAr pin controller. Each group
116 const unsigned *pins; member
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| /kernel/linux/linux-5.10/drivers/pinctrl/spear/ |
| D | pinctrl-spear.h | 25 * struct spear_pmx_mode - SPEAr pmx mode
41 * struct spear_muxreg - SPEAr mux reg configuration
53 const unsigned *pins; member
84 .pins = __pins, \
91 * struct spear_modemux - SPEAr mode mux configuration
103 * struct spear_pingroup - SPEAr pin group configurations
105 * @pins: array containing pin numbers
106 * @npins: size of pins array
110 * A representation of a group of pins in the SPEAr pin controller. Each group
115 const unsigned *pins; member
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/freescale/ |
| D | fsl,scu.txt | 2 --------------------------------------------------------------------
4 The System Controller Firmware (SCFW) is a low-level system function
5 which runs on a dedicated Cortex-M core to provide power, clock, and
9 The AP communicates with the SC using a multi-ported MU module found
22 -------------------
23 - compatible: should be "fsl,imx-scu".
24 - mbox-names: should include "tx0", "tx1", "tx2", "tx3",
27 - mboxes: List of phandle of 4 MU channels for tx, 4 MU channels for
30 Cross instances are not allowed. The MU instance can only
54 numbered in "aliases" node.
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| /kernel/linux/linux-5.10/Documentation/driver-api/gpio/ |
| D | legacy.rst | 13 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
14 digital signal. They are provided from many kinds of chip, and are familiar
21 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
22 non-dedicated pin can be configured as a GPIO; and most chips have at least
25 often have a few such pins to help with pin scarcity on SOCs; and there are
27 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
32 - Output values are writable (high=1, low=0). Some chips also have
34 value might be driven ... supporting "wire-OR" and similar schemes
37 - Input values are likewise readable (1, 0). Some chips support readback
38 of pins configured as "output", which is very useful in such "wire-OR"
[all …]
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| /kernel/linux/linux-6.6/Documentation/driver-api/gpio/ |
| D | legacy.rst | 13 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
14 digital signal. They are provided from many kinds of chip, and are familiar
21 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
22 non-dedicated pin can be configured as a GPIO; and most chips have at least
25 often have a few such pins to help with pin scarcity on SOCs; and there are
27 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
32 - Output values are writable (high=1, low=0). Some chips also have
34 value might be driven ... supporting "wire-OR" and similar schemes
37 - Input values are likewise readable (1, 0). Some chips support readback
38 of pins configured as "output", which is very useful in such "wire-OR"
[all …]
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