Searched +full:sun6i +full:- +full:a31 +full:- +full:r +full:- +full:intc (Results 1 – 18 of 18) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A31 NMI/Wakeup Interrupt Controller10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>14 - $ref: /schemas/interrupt-controller.yaml#17 "#interrupt-cells":26 - const: allwinner,sun6i-a31-r-intc[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A20 Non-Maskable Interrupt Controller Device Tree Bindings10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>14 - $ref: /schemas/interrupt-controller.yaml#17 "#interrupt-cells":25 - const: allwinner,sun6i-a31-r-intc[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)7 #include <dt-bindings/clock/suniv-ccu-f1c100s.h>8 #include <dt-bindings/reset/suniv-ccu-f1c100s.h>11 #address-cells = <1>;12 #size-cells = <1>;13 interrupt-parent = <&intc>;16 osc24M: clk-24M {17 #clock-cells = <0>;18 compatible = "fixed-clock";19 clock-frequency = <24000000>;[all …]
4 * Maxime Ripard <maxime.ripard@free-electrons.com>6 * This file is dual-licensed: you can use it either under the terms45 #include <dt-bindings/interrupt-controller/arm-gic.h>46 #include <dt-bindings/thermal/thermal.h>48 #include <dt-bindings/clock/sun6i-a31-ccu.h>49 #include <dt-bindings/clock/sun6i-rtc.h>50 #include <dt-bindings/reset/sun6i-a31-ccu.h>53 interrupt-parent = <&gic>;54 #address-cells = <1>;55 #size-cells = <1>;[all …]
4 * This file is dual-licensed: you can use it either under the terms43 #include <dt-bindings/clock/sun6i-rtc.h>44 #include <dt-bindings/clock/sun8i-de2.h>45 #include <dt-bindings/clock/sun8i-h3-ccu.h>46 #include <dt-bindings/clock/sun8i-r-ccu.h>47 #include <dt-bindings/interrupt-controller/arm-gic.h>48 #include <dt-bindings/reset/sun8i-de2.h>49 #include <dt-bindings/reset/sun8i-h3-ccu.h>50 #include <dt-bindings/reset/sun8i-r-ccu.h>53 interrupt-parent = <&gic>;[all …]
2 * Copyright 2014 Chen-Yu Tsai4 * Chen-Yu Tsai <wens@csie.org>6 * This file is dual-licensed: you can use it either under the terms45 #include <dt-bindings/interrupt-controller/arm-gic.h>47 #include <dt-bindings/clock/sun6i-rtc.h>48 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>49 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>52 interrupt-parent = <&gic>;53 #address-cells = <1>;54 #size-cells = <1>;[all …]
6 * This file is dual-licensed: you can use it either under the terms45 #include <dt-bindings/interrupt-controller/arm-gic.h>47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>48 #include <dt-bindings/clock/sun8i-de2.h>49 #include <dt-bindings/clock/sun8i-r-ccu.h>50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>51 #include <dt-bindings/reset/sun8i-de2.h>52 #include <dt-bindings/reset/sun8i-r-ccu.h>53 #include <dt-bindings/thermal/thermal.h>56 interrupt-parent = <&gic>;[all …]
2 * Allwinner A20/A31 SoCs NMI IRQ chip driver.11 #define DRV_NAME "sunxi-nmi"35 * For deprecated sun6i-a31-sc-nmi compatible.39 #define SUN6I_NMI_CTRL (SUN6I_R_INTC_CTRL - SUN6I_R_INTC_NMI_OFFSET)40 #define SUN6I_NMI_PENDING (SUN6I_R_INTC_PENDING - SUN6I_R_INTC_NMI_OFFSET)41 #define SUN6I_NMI_ENABLE (SUN6I_R_INTC_ENABLE - SUN6I_R_INTC_NMI_OFFSET)113 struct irq_chip_type *ct = gc->chip_types; in sunxi_sc_nmi_set_type()115 u32 ctrl_off = ct->regs.type; in sunxi_sc_nmi_set_type()138 data->irq); in sunxi_sc_nmi_set_type()139 return -EBADR; in sunxi_sc_nmi_set_type()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * The R_INTC in Allwinner A31 and newer SoCs manages several types of7 * bit 0 bits 1-15^ bits 19-319 * +---------+ +---------+ +---------+ +---------+11 * +---------+ +---------+ +---------+ +---------+14 * +------V------+ +------------+ | | | +--V------V--+ |17 * +-------------+ +------------+ | | | +------------+ |19 * +--V-------V--+ +--V--+ | +--V--+ | +--V--+22 * +-------------+ | N+d | | | m | | | m+7 |23 * | | +-----+ | +-----+ | +-----+[all …]
4 * Maxime Ripard <maxime.ripard@free-electrons.com>6 * This file is dual-licensed: you can use it either under the terms45 #include <dt-bindings/interrupt-controller/arm-gic.h>46 #include <dt-bindings/thermal/thermal.h>48 #include <dt-bindings/clock/sun6i-a31-ccu.h>49 #include <dt-bindings/reset/sun6i-a31-ccu.h>52 interrupt-parent = <&gic>;53 #address-cells = <1>;54 #size-cells = <1>;61 #address-cells = <1>;[all …]
2 * Copyright 2014 Chen-Yu Tsai4 * Chen-Yu Tsai <wens@csie.org>6 * This file is dual-licensed: you can use it either under the terms45 #include <dt-bindings/interrupt-controller/arm-gic.h>47 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>48 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>51 interrupt-parent = <&gic>;52 #address-cells = <1>;53 #size-cells = <1>;56 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)4 #include <dt-bindings/interrupt-controller/arm-gic.h>5 #include <dt-bindings/clock/sun50i-h6-ccu.h>6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>7 #include <dt-bindings/clock/sun8i-de2.h>8 #include <dt-bindings/clock/sun8i-tcon-top.h>9 #include <dt-bindings/reset/sun50i-h6-ccu.h>10 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>11 #include <dt-bindings/reset/sun8i-de2.h>12 #include <dt-bindings/thermal/thermal.h>[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/sun50i-a64-ccu.h>7 #include <dt-bindings/clock/sun8i-de2.h>8 #include <dt-bindings/clock/sun8i-r-ccu.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/reset/sun50i-a64-ccu.h>11 #include <dt-bindings/reset/sun8i-de2.h>12 #include <dt-bindings/reset/sun8i-r-ccu.h>13 #include <dt-bindings/thermal/thermal.h>16 interrupt-parent = <&gic>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/sun50i-a64-ccu.h>7 #include <dt-bindings/clock/sun6i-rtc.h>8 #include <dt-bindings/clock/sun8i-de2.h>9 #include <dt-bindings/clock/sun8i-r-ccu.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/reset/sun50i-a64-ccu.h>12 #include <dt-bindings/reset/sun8i-de2.h>13 #include <dt-bindings/reset/sun8i-r-ccu.h>14 #include <dt-bindings/thermal/thermal.h>[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)4 #include <dt-bindings/interrupt-controller/arm-gic.h>5 #include <dt-bindings/clock/sun50i-h6-ccu.h>6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>7 #include <dt-bindings/clock/sun6i-rtc.h>8 #include <dt-bindings/clock/sun8i-de2.h>9 #include <dt-bindings/clock/sun8i-tcon-top.h>10 #include <dt-bindings/reset/sun50i-h6-ccu.h>11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>12 #include <dt-bindings/reset/sun8i-de2.h>[all …]
5 ---------------------------------------------------8 R: Designated *Reviewer*: FullName <address@domain>21 W: *Web-page* with status/info23 B: URI for where to file *bugs*. A web-page with detailed bug28 patches to the given subsystem. This is either an in-tree file,29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst46 N: [^a-z]tegra all files whose path contains tegra64 ----------------83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)85 L: linux-scsi@vger.kernel.org[all …]
9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------84 R: Designated *Reviewer*: FullName <address@domain>[all …]