| /kernel/linux/linux-6.6/sound/drivers/vx/ |
| D | vx_uer.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
17 * vx_modify_board_clock - tell the board that its clock has been modified
18 * @sync: DSP needs to resynchronize its FIFO
20 static int vx_modify_board_clock(struct vx_core *chip, int sync) in vx_modify_board_clock() argument
26 if (sync) in vx_modify_board_clock()
32 * vx_modify_board_inputs - resync audio inputs
44 * vx_read_one_cbit - read one bit from UER config
52 mutex_lock(&chip->lock); in vx_read_one_cbit()
53 if (chip->type >= VX_TYPE_VXPOCKET) { in vx_read_one_cbit()
62 mutex_unlock(&chip->lock); in vx_read_one_cbit()
[all …]
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| /kernel/linux/linux-5.10/sound/drivers/vx/ |
| D | vx_uer.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
17 * vx_modify_board_clock - tell the board that its clock has been modified
18 * @sync: DSP needs to resynchronize its FIFO
20 static int vx_modify_board_clock(struct vx_core *chip, int sync) in vx_modify_board_clock() argument
26 if (sync) in vx_modify_board_clock()
32 * vx_modify_board_inputs - resync audio inputs
44 * vx_read_one_cbit - read one bit from UER config
52 mutex_lock(&chip->lock); in vx_read_one_cbit()
53 if (chip->type >= VX_TYPE_VXPOCKET) { in vx_read_one_cbit()
62 mutex_unlock(&chip->lock); in vx_read_one_cbit()
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/platforms/52xx/ |
| D | mpc52xx_common.c | 27 { .compatible = "fsl,mpc5200-xlb", },
28 { .compatible = "mpc5200-xlb", },
32 { .compatible = "fsl,mpc5200-immr", },
33 { .compatible = "fsl,mpc5200b-immr", },
34 { .compatible = "simple-bus", },
73 out_be32(&xlb->master_pri_enable, 0xff); in mpc5200_setup_xlb_arbiter()
74 out_be32(&xlb->master_priority, 0x11111111); in mpc5200_setup_xlb_arbiter()
79 * transaction and re-enable it afterwards ...) in mpc5200_setup_xlb_arbiter()
83 out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS); in mpc5200_setup_xlb_arbiter()
112 { .compatible = "fsl,mpc5200-gpt", },
[all …]
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| /kernel/linux/linux-5.10/drivers/tty/serial/ |
| D | ip22zilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
31 #define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2)) argument
32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2) argument
90 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
106 #define SYNC_ENAB 0 /* Sync Modes Enable */
111 #define MONSYNC 0 /* 8 Bit Sync character */
112 #define BISYNC 0x10 /* 16 bit sync character */
113 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
114 #define EXTSYNC 0x30 /* External Sync Mode */
126 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
[all …]
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| D | sunzilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
23 #define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2)) argument
24 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2) argument
82 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
98 #define SYNC_ENAB 0 /* Sync Modes Enable */
103 #define MONSYNC 0 /* 8 Bit Sync character */
104 #define BISYNC 0x10 /* 16 bit sync character */
105 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
106 #define EXTSYNC 0x30 /* External Sync Mode */
118 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
[all …]
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| D | zs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
38 * Per-SCC state for locking and the interrupt handler.
52 #define ZS_BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2)) argument
53 #define ZS_BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2) argument
109 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
124 #define SYNC_ENAB 0 /* Sync Modes Enable */
130 #define MONSYNC 0 /* 8 Bit Sync character */
131 #define BISYNC 0x10 /* 16 bit sync character */
132 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
133 #define EXTSYNC 0x30 /* External Sync Mode */
[all …]
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| D | pmac_zilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
25 * of "escc" node (ie. ch-a or ch-b)
74 if (uap->flags & PMACZILOG_FLAG_IS_CHANNEL_A) in pmz_get_port_A()
76 return uap->mate; in pmz_get_port_A()
88 writeb(reg, port->control_reg); in read_zsreg()
89 return readb(port->control_reg); in read_zsreg()
95 writeb(reg, port->control_reg); in write_zsreg()
96 writeb(value, port->control_reg); in write_zsreg()
101 return readb(port->data_reg); in read_zsdata()
106 writeb(data, port->data_reg); in write_zsdata()
[all …]
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| /kernel/linux/linux-6.6/drivers/tty/serial/ |
| D | ip22zilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
31 #define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2)) argument
32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2) argument
90 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
106 #define SYNC_ENAB 0 /* Sync Modes Enable */
111 #define MONSYNC 0 /* 8 Bit Sync character */
112 #define BISYNC 0x10 /* 16 bit sync character */
113 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
114 #define EXTSYNC 0x30 /* External Sync Mode */
126 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
[all …]
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| D | sunzilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
23 #define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2)) argument
24 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2) argument
82 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
98 #define SYNC_ENAB 0 /* Sync Modes Enable */
103 #define MONSYNC 0 /* 8 Bit Sync character */
104 #define BISYNC 0x10 /* 16 bit sync character */
105 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
106 #define EXTSYNC 0x30 /* External Sync Mode */
118 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
[all …]
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| D | zs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
38 * Per-SCC state for locking and the interrupt handler.
52 #define ZS_BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2)) argument
53 #define ZS_BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2) argument
109 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
124 #define SYNC_ENAB 0 /* Sync Modes Enable */
130 #define MONSYNC 0 /* 8 Bit Sync character */
131 #define BISYNC 0x10 /* 16 bit sync character */
132 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
133 #define EXTSYNC 0x30 /* External Sync Mode */
[all …]
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| D | pmac_zilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
25 * of "escc" node (ie. ch-a or ch-b)
64 if (uap->flags & PMACZILOG_FLAG_IS_CHANNEL_A) in pmz_get_port_A()
66 return uap->mate; in pmz_get_port_A()
78 writeb(reg, port->control_reg); in read_zsreg()
79 return readb(port->control_reg); in read_zsreg()
85 writeb(reg, port->control_reg); in write_zsreg()
86 writeb(value, port->control_reg); in write_zsreg()
91 return readb(port->data_reg); in read_zsdata()
96 writeb(data, port->data_reg); in write_zsdata()
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/regulator/ |
| D | max8952.txt | 4 - compatible: must be equal to "maxim,max8952"
5 - reg: I2C slave address, usually 0x60
6 - max8952,dvs-mode-microvolt: array of 4 integer values defining DVS voltages
8 - any required generic properties defined in regulator.txt
11 - max8952,vid-gpios: array of two GPIO pins used for DVS voltage selection
12 - max8952,en-gpio: GPIO used to control enable status of regulator
13 - max8952,default-mode: index of default DVS voltage, from <0, 3> range
14 - max8952,sync-freq: sync frequency, must be one of following values:
15 - 0: 26 MHz
16 - 1: 13 MHz
[all …]
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| /kernel/linux/linux-6.6/sound/soc/fsl/ |
| D | fsl_sai.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 // Copyright 2012-2015 Freescale Semiconductor, Inc.
23 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
27 #include "imx-pcm.h"
45 * fsl_sai_dir_is_synced - Check if stream is synced by the opposite stream
58 /* current dir in async mode while opposite dir in sync mode */ in fsl_sai_dir_is_synced()
59 return !sai->synchronous[dir] && sai->synchronous[adir]; in fsl_sai_dir_is_synced()
66 if (sai->is_pdm_mode) { in fsl_sai_get_pins_state()
69 state = pinctrl_lookup_state(sai->pinctrl, "dsd512"); in fsl_sai_get_pins_state()
73 state = pinctrl_lookup_state(sai->pinctrl, "dsd"); in fsl_sai_get_pins_state()
[all …]
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| /kernel/linux/linux-5.10/sound/soc/fsl/ |
| D | fsl_sai.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 // Copyright 2012-2015 Freescale Semiconductor, Inc.
21 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
24 #include "imx-pcm.h"
41 * fsl_sai_dir_is_synced - Check if stream is synced by the opposite stream
54 /* current dir in async mode while opposite dir in sync mode */ in fsl_sai_dir_is_synced()
55 return !sai->synchronous[dir] && sai->synchronous[adir]; in fsl_sai_dir_is_synced()
61 unsigned int ofs = sai->soc_data->reg_offset; in fsl_sai_isr()
62 struct device *dev = &sai->pdev->dev; in fsl_sai_isr()
74 regmap_read(sai->regmap, FSL_SAI_TCSR(ofs), &xcsr); in fsl_sai_isr()
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/regulator/ |
| D | maxim,max8952.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: regulator.yaml#
19 max8952,default-mode:
25 max8952,dvs-mode-microvolt:
35 max8952,en-gpio:
40 max8952,ramp-speed:
46 - 0: 32mV/us
[all …]
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| /kernel/linux/linux-5.10/drivers/net/wan/ |
| D | z85230.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
18 #define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2)) argument
19 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2) argument
78 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
93 #define SYNC_ENAB 0 /* Sync Modes Enable */
98 #define MONSYNC 0 /* 8 Bit Sync character */
99 #define BISYNC 0x10 /* 16 bit sync character */
100 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
101 #define EXTSYNC 0x30 /* External Sync Mode */
112 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
[all …]
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| /kernel/linux/linux-6.6/include/linux/ |
| D | omap-gpmc.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include <linux/platform_data/gpmc-omap.h>
15 * gpmc_nand_ops - Interface between NAND and GPMC
34 * gpmc_omap_onenand_set_timings - set optimized sync timings.
36 * @freq: Chip frequency
40 * Sets optimized timings for the @cs region based on @freq and @latency.
43 int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq,
55 int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq, in gpmc_omap_onenand_set_timings() argument
59 return -EINVAL; in gpmc_omap_onenand_set_timings()
|
| /kernel/linux/linux-5.10/include/linux/ |
| D | omap-gpmc.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include <linux/platform_data/gpmc-omap.h>
15 * gpmc_nand_ops - Interface between NAND and GPMC
34 * gpmc_omap_onenand_set_timings - set optimized sync timings.
36 * @freq: Chip frequency
40 * Sets optimized timings for the @cs region based on @freq and @latency.
43 int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq,
55 int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq, in gpmc_omap_onenand_set_timings() argument
59 return -EINVAL; in gpmc_omap_onenand_set_timings()
|
| /kernel/linux/linux-6.6/sound/soc/codecs/ |
| D | madera.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 // Copyright (C) 2015-2019 Cirrus Logic, Inc. and
18 #include <linux/irqchip/irq-madera.h>
22 #include <sound/madera-pdata.h>
24 #include <dt-bindings/sound/madera.h>
143 dev_err(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
145 dev_warn(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
147 dev_dbg(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
150 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
152 dev_warn(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
[all …]
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| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | madera.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 // Copyright (C) 2015-2019 Cirrus Logic, Inc. and
18 #include <linux/irqchip/irq-madera.h>
22 #include <sound/madera-pdata.h>
24 #include <dt-bindings/sound/madera.h>
143 dev_err(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
145 dev_warn(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
147 dev_dbg(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
150 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
152 dev_warn(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
[all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/intel/igc/ |
| D | igc_defines.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
88 /* Loop limit on how long we wait for auto-negotiation to complete */
170 /* 1000BASE-T Control Register */
174 /* 1000BASE-T Status Register */
238 /* 1Gbps and 2.5Gbps half duplex is not supported, nor spec-compliant. */
262 #define IGC_ICR_TS BIT(19) /* Time Sync Interrupt */
281 #define IGC_IMS_DOUTSYNC IGC_ICR_DOUTSYNC /* NIC DMA out of sync */
285 #define IGC_IMS_TS IGC_ICR_TS /* Time Sync Interrupt */
287 #define IGC_QVECTOR_MASK 0x7FFC /* Q-vector mask */
294 #define IGC_ICR_DOUTSYNC 0x10000000 /* NIC DMA out of sync */
[all …]
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| /kernel/linux/linux-5.10/sound/soc/stm/ |
| D | stm32_sai_sub.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
10 #include <linux/clk-provider.h>
41 #define STM_SAI_IS_PLAYBACK(ip) ((ip)->dir == SNDRV_PCM_STREAM_PLAYBACK)
42 #define STM_SAI_IS_CAPTURE(ip) ((ip)->dir == SNDRV_PCM_STREAM_CAPTURE)
47 #define STM_SAI_IS_SUB_A(x) ((x)->id == STM_SAI_A_ID)
48 #define STM_SAI_IS_SUB_B(x) ((x)->id == STM_SAI_B_ID)
49 #define STM_SAI_BLOCK_NAME(x) (((x)->id == STM_SAI_A_ID) ? "A" : "B")
55 #define STM_SAI_PROTOCOL_IS_SPDIF(ip) ((ip)->spdif)
56 #define STM_SAI_HAS_SPDIF(x) ((x)->pdata->conf.has_spdif_pdm)
[all …]
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| /kernel/linux/linux-6.6/sound/soc/stm/ |
| D | stm32_sai_sub.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
10 #include <linux/clk-provider.h>
41 #define STM_SAI_IS_PLAYBACK(ip) ((ip)->dir == SNDRV_PCM_STREAM_PLAYBACK)
42 #define STM_SAI_IS_CAPTURE(ip) ((ip)->dir == SNDRV_PCM_STREAM_CAPTURE)
47 #define STM_SAI_IS_SUB_A(x) ((x)->id == STM_SAI_A_ID)
53 #define STM_SAI_PROTOCOL_IS_SPDIF(ip) ((ip)->spdif)
54 #define STM_SAI_HAS_SPDIF(x) ((x)->pdata->conf.has_spdif_pdm)
55 #define STM_SAI_HAS_PDM(x) ((x)->pdata->conf.has_spdif_pdm)
56 #define STM_SAI_HAS_EXT_SYNC(x) (!STM_SAI_IS_F4(sai->pdata))
[all …]
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| /kernel/linux/linux-6.6/drivers/iio/imu/ |
| D | adis16475.c | 1 // SPDX-License-Identifier: GPL-2.0
84 const struct adis16475_sync *sync; member
130 struct adis16475 *st = file->private_data; in adis16475_show_firmware_revision()
136 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_REV, &rev); in adis16475_show_firmware_revision()
156 struct adis16475 *st = file->private_data; in adis16475_show_firmware_date()
162 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_Y, &year); in adis16475_show_firmware_date()
166 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_DM, &md); in adis16475_show_firmware_date()
170 len = snprintf(buf, sizeof(buf), "%.2x-%.2x-%.4x\n", md >> 8, md & 0xff, in adis16475_show_firmware_date()
189 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_SERIAL_NUM, &serial); in adis16475_show_serial_number()
206 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_PROD_ID, &prod_id); in adis16475_show_product_id()
[all …]
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| /kernel/linux/linux-5.10/sound/soc/ti/ |
| D | davinci-i2s.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 * based on davinci-mcasp.c DT support
31 #include "edma-pcm.h"
32 #include "davinci-i2s.h"
34 #define DRV_NAME "davinci-i2s"
39 * - This driver supports the "Audio Serial Port" (ASP),
42 * - But it labels it a "Multi-channel Buffered Serial Port"
44 * backward-compatible, possibly explaining that confusion.
46 * - OMAP chips have a controller called McBSP, which is
49 * - Newer DaVinci chips have a controller called McASP,
[all …]
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