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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra20-host1x.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-host1x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra host1x controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 description: The host1x top-level node defines a number of children, each
14 representing one of the host1x client modules defined in this binding.
19 - enum:
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpu/host1x/
Dnvidia,tegra210-nvenc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvenc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 NVENC is the hardware video encoder present on NVIDIA Tegra210
11 and newer chips. It is located on the Host1x bus and typically
12 programmed through Host1x channels.
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvenc@[0-9a-f]*$"
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Dnvidia,tegra210-nvdec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvdec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 NVDEC is the hardware video decoder present on NVIDIA Tegra210
11 and newer chips. It is located on the Host1x bus and typically
12 programmed through Host1x channels.
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvdec@[0-9a-f]*$"
[all …]
Dnvidia,tegra210-nvjpg.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvjpg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 NVJPG is the hardware JPEG decoder and encoder present on NVIDIA Tegra210
11 and newer chips. It is located on the Host1x bus and typically programmed
12 through Host1x channels.
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvjpg@[0-9a-f]*$"
[all …]
Dnvidia,tegra234-nvdec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra234-nvdec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 NVDEC is the hardware video decoder present on NVIDIA Tegra210
11 and newer chips. It is located on the Host1x bus and typically
12 programmed through Host1x channels.
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvdec@[0-9a-f]*$"
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra20-host1x.txt1 NVIDIA Tegra host1x
4 - compatible: "nvidia,tegra<chip>-host1x"
5 - reg: Physical base address and length of the controller's registers.
6 For pre-Tegra186, one entry describing the whole register area.
7 For Tegra186, one entry for each entry in reg-names:
8 "vm" - VM region assigned to Linux
9 "hypervisor" - Hypervisor region (only if Linux acts as hypervisor)
10 - interrupts: The interrupt outputs from the controller.
11 - #address-cells: The number of cells used to represent physical base addresses
12 in the host1x address space. Should be 1.
[all …]
/kernel/linux/linux-6.6/drivers/gpu/host1x/hw/
Dhost1x05.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Host1x init for Tegra210 SoCs
11 struct host1x;
13 int host1x05_init(struct host1x *host);
Dhost1x05.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Host1x init for Tegra210 SoCs
23 int host1x05_init(struct host1x *host) in host1x05_init()
25 host->channel_op = &host1x_channel_ops; in host1x05_init()
26 host->cdma_op = &host1x_cdma_ops; in host1x05_init()
27 host->cdma_pb_op = &host1x_pushbuffer_ops; in host1x05_init()
28 host->syncpt_op = &host1x_syncpt_ops; in host1x05_init()
29 host->intr_op = &host1x_intr_ops; in host1x05_init()
30 host->debug_op = &host1x_debug_ops; in host1x05_init()
Dhost1x05_hardware.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Tegra host1x Register Offsets for Tegra210
/kernel/linux/linux-5.10/drivers/gpu/host1x/hw/
Dhost1x05.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Host1x init for Tegra210 SoCs
11 struct host1x;
13 int host1x05_init(struct host1x *host);
Dhost1x05.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Host1x init for Tegra210 SoCs
23 int host1x05_init(struct host1x *host) in host1x05_init()
25 host->channel_op = &host1x_channel_ops; in host1x05_init()
26 host->cdma_op = &host1x_cdma_ops; in host1x05_init()
27 host->cdma_pb_op = &host1x_pushbuffer_ops; in host1x05_init()
28 host->syncpt_op = &host1x_syncpt_ops; in host1x05_init()
29 host->intr_op = &host1x_intr_ops; in host1x05_init()
30 host->debug_op = &host1x_debug_ops; in host1x05_init()
/kernel/linux/linux-5.10/Documentation/gpu/
Dtegra.rst6 the host1x controller. host1x supplies command streams, gathered from a push
11 supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting
18 - A host1x driver that provides infrastructure and access to the host1x
21 - A KMS driver that supports the display controllers as well as a number of
24 - A set of custom userspace IOCTLs that can be used to submit jobs to the
25 GPU and video engines via host1x.
30 The various host1x clients need to be bound together into a logical device in
32 this is implemented in the host1x driver. When a driver is registered with the
37 to the logical host1x device.
40 device using a driver-provided function which will set up the bits specific to
[all …]
/kernel/linux/linux-6.6/Documentation/gpu/
Dtegra.rst6 the host1x controller. host1x supplies command streams, gathered from a push
11 supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting
18 - A host1x driver that provides infrastructure and access to the host1x
21 - A KMS driver that supports the display controllers as well as a number of
24 - A set of custom userspace IOCTLs that can be used to submit jobs to the
25 GPU and video engines via host1x.
30 The various host1x clients need to be bound together into a logical device in
32 this is implemented in the host1x driver. When a driver is registered with the
37 to the logical host1x device.
40 device using a driver-provided function which will set up the bits specific to
[all …]
/kernel/linux/linux-6.6/drivers/staging/media/tegra-video/
Dvi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 #include <linux/host1x.h>
16 #include <media/media-entity.h>
17 #include <media/v4l2-async.h>
18 #include <media/v4l2-ctrls.h>
19 #include <media/v4l2-device.h>
20 #include <media/v4l2-dev.h>
21 #include <media/v4l2-subdev.h>
22 #include <media/videobuf2-v4l2.h>
44 * struct tegra_vi_ops - Tegra VI operations
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Dvideo.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/host1x.h>
10 #include <media/v4l2-event.h>
21 tegra_channels_cleanup(vid->vi); in tegra_v4l2_dev_release()
24 media_device_unregister(&vid->media_dev); in tegra_v4l2_dev_release()
25 media_device_cleanup(&vid->media_dev); in tegra_v4l2_dev_release()
39 v4l2_event_queue(&chan->video, arg); in tegra_v4l2_dev_notify()
40 if (ev->type == V4L2_EVENT_SOURCE_CHANGE && vb2_is_streaming(&chan->queue)) in tegra_v4l2_dev_notify()
41 vb2_queue_error(&chan->queue); in tegra_v4l2_dev_notify()
51 return -ENOMEM; in host1x_video_probe()
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/tegra-video/
Dvideo.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/host1x.h>
19 tegra_channels_cleanup(vid->vi); in tegra_v4l2_dev_release()
22 media_device_unregister(&vid->media_dev); in tegra_v4l2_dev_release()
23 media_device_cleanup(&vid->media_dev); in tegra_v4l2_dev_release()
34 return -ENOMEM; in host1x_video_probe()
36 dev_set_drvdata(&dev->dev, vid); in host1x_video_probe()
38 vid->media_dev.dev = &dev->dev; in host1x_video_probe()
39 strscpy(vid->media_dev.model, "NVIDIA Tegra Video Input Device", in host1x_video_probe()
40 sizeof(vid->media_dev.model)); in host1x_video_probe()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/host1x/
Ddev.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Tegra host1x driver
5 * Copyright (c) 2010-2013, NVIDIA Corporation.
9 #include <linux/dma-mapping.h>
18 #include <trace/events/host1x.h>
22 #include <asm/dma-iommu.h>
38 void host1x_hypervisor_writel(struct host1x *host1x, u32 v, u32 r) in host1x_hypervisor_writel() argument
40 writel(v, host1x->hv_regs + r); in host1x_hypervisor_writel()
43 u32 host1x_hypervisor_readl(struct host1x *host1x, u32 r) in host1x_hypervisor_readl() argument
45 return readl(host1x->hv_regs + r); in host1x_hypervisor_readl()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/tegra/
Ddrm.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
8 #include <linux/host1x.h>
27 #include <asm/dma-iommu.h>
76 struct drm_device *drm = old_state->dev; in tegra_atomic_commit_tail()
77 struct tegra_drm *tegra = drm->dev_private; in tegra_atomic_commit_tail()
79 if (tegra->hub) { in tegra_atomic_commit_tail()
108 return -ENOMEM; in tegra_drm_open()
110 idr_init_base(&fpriv->legacy_contexts, 1); in tegra_drm_open()
111 xa_init_flags(&fpriv->contexts, XA_FLAGS_ALLOC1); in tegra_drm_open()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/
Dnvidia,tegra20-i2c.txt4 - compatible : For Tegra20, must be one of "nvidia,tegra20-i2c-dvc" or
5 "nvidia,tegra20-i2c". For Tegra30, must be "nvidia,tegra30-i2c".
6 For Tegra114, must be "nvidia,tegra114-i2c". Otherwise, must be
7 "nvidia,<chip>-i2c", plus at least one of the above, where <chip> is
8 tegra124, tegra132, or tegra210.
10 nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C
14 "nvidia,tegra20-i2c-dvc".
15 nvidia,tegra20-i2c: Tegra20 has 4 generic I2C controller. This can support
16 master and slave mode of I2C communication. The i2c-tegra driver only
18 only compatible with "nvidia,tegra20-i2c".
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/tegra/
Ddrm.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
8 #include <linux/host1x.h>
64 struct drm_device *drm = old_state->dev; in tegra_atomic_commit_tail()
65 struct tegra_drm *tegra = drm->dev_private; in tegra_atomic_commit_tail()
67 if (tegra->hub) { in tegra_atomic_commit_tail()
91 return -ENOMEM; in tegra_drm_open()
93 idr_init_base(&fpriv->contexts, 1); in tegra_drm_open()
94 mutex_init(&fpriv->lock); in tegra_drm_open()
95 filp->driver_priv = fpriv; in tegra_drm_open()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/host1x/
Ddev.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Tegra host1x driver
5 * Copyright (c) 2010-2013, NVIDIA Corporation.
10 #include <linux/dma-mapping.h>
23 #include <trace/events/host1x.h>
27 #include <asm/dma-iommu.h>
45 void host1x_common_writel(struct host1x *host1x, u32 v, u32 r) in host1x_common_writel() argument
47 writel(v, host1x->common_regs + r); in host1x_common_writel()
50 void host1x_hypervisor_writel(struct host1x *host1x, u32 v, u32 r) in host1x_hypervisor_writel() argument
52 writel(v, host1x->hv_regs + r); in host1x_hypervisor_writel()
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/
Dtegra210.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra210-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra210-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/reset/tegra210-car.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/tegra124-soctherm.h>
10 #include <dt-bindings/soc/tegra-pmc.h>
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Dtegra210-p2371-2180.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra210-p2180.dtsi"
5 #include "tegra210-p2597.dtsi"
9 compatible = "nvidia,p2371-2180", "nvidia,tegra210";
14 avdd-pll-uerefe-supply = <&avdd_1v05_pll>;
15 hvddio-pex-supply = <&vdd_1v8>;
16 dvddio-pex-supply = <&vdd_pex_1v05>;
17 dvdd-pex-pll-supply = <&vdd_pex_1v05>;
18 hvdd-pex-pll-e-supply = <&vdd_1v8>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/i2c/
Dnvidia,tegra20-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Thierry Reding <thierry.reding@gmail.com>
9 - Jon Hunter <jonathanh@nvidia.com>
16 - description: Tegra20 has 4 generic I2C controller. This can support
17 master and slave mode of I2C communication. The i2c-tegra driver
19 controller is only compatible with "nvidia,tegra20-i2c".
20 const: nvidia,tegra20-i2c
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/nvidia/
Dtegra210.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra210-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra210-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/reset/tegra210-car.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/tegra124-soctherm.h>
10 #include <dt-bindings/soc/tegra-pmc.h>
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