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/kernel/linux/linux-6.6/Documentation/userspace-api/media/v4l/
Dpixfmt-yuv-planar.rst102 - 64x32 tiles
111 - 16x16 tiles
125 - 4x4 tiles
146 - 4x4 tiles
312 pixels in 2D 16x16 tiles, and stores tiles linearly in memory.
317 pixels in 2D 64x32 tiles, and stores 2x2 groups of tiles in
321 If the vertical resolution is an odd number of tiles, the last row of
322 tiles is stored in linear order. The layouts of the luma and chroma
325 ``V4L2_PIX_FMT_NV12_4L4`` stores pixels in 4x4 tiles, and stores
326 tiles linearly in memory. The line stride and image height must be
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/kernel/linux/linux-5.10/include/uapi/drm/
Ddrm_fourcc.h407 * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
424 * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
442 * This is a tiled layout using 4Kb tiles in row-major layout.
443 * Within the tile pixels are laid out in 16 256 byte units / sub-tiles which
463 * considered to be made up of normal 128Bx32 Y tiles, Thus
478 * at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
489 * at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
516 * This is a simple tiled layout using tiles of 16x16 pixels in a row-major
528 * Each macrotile consists of m x n (mostly 4 x 4) tiles.
540 * This is a simple tiled layout using tiles of 4x4 pixels in a row-major
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/
Darm,integrator.yaml14 They are ARMv4, ARMv5 and ARMv6-capable using different core tiles,
15 so the system is modular and can host a variety of CPU tiles called
16 "core tiles" and referred to in the device tree as "core modules".
Darm,vexpress-juno.yaml18 The board consist of a motherboard and one or more daughterboards (tiles). The
20 tiles.
146 description: When describing tiles consisting of more than one DCC, its
155 the connection between the motherboard and any tiles. Sometimes the
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/
Darm,integrator.yaml14 They are ARMv4, ARMv5 and ARMv6-capable using different core tiles,
15 so the system is modular and can host a variety of CPU tiles called
16 "core tiles" and referred to in the device tree as "core modules".
Darm,vexpress-juno.yaml18 The board consist of a motherboard and one or more daughterboards (tiles). The
20 tiles.
130 description: When describing tiles consisting of more than one DCC, its
139 the connection between the motherboard and any tiles. Sometimes the
/kernel/linux/linux-6.6/include/uapi/drm/
Ddrm_fourcc.h503 * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
520 * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
538 * This is a tiled layout using 4Kb tiles in row-major layout.
539 * Within the tile pixels are laid out in 16 256 byte units / sub-tiles which
559 * considered to be made up of normal 128Bx32 Y tiles, Thus
574 * at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
585 * at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
608 * corresponds to an area of 4x1 tiles in the main surface. The main surface
616 * This is a tiled layout using 4KB tiles in a row-major layout. It has the same
664 * at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
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/kernel/linux/linux-6.6/drivers/video/fbdev/core/
DKconfig200 where the screen is divided into rectangular sections (tiles), whereas
203 parameters in terms of number of tiles instead of number of pixels.
207 terms of number of tiles in the x- and y-axis.
/kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/
Dpixfmt-nv12m.rst33 ``V4L2_PIX_FMT_NV12M`` with 16x16 macroblock tiles. Here pixels are
34 arranged in 16x16 2D tiles and tiles are arranged in linear order in
Dpixfmt-reserved.rst250 (codenamed sunxi) platforms, with 32x32 tiles for the luminance plane
251 and 32x64 tiles for the chrominance plane. The data in each tile is
256 of tiles, resulting in 32-aligned resolutions for the luminance plane
/kernel/linux/linux-5.10/include/linux/
Dfb.h310 __u32 length; /* number of tiles in the map */
318 __u32 width; /* number of tiles in the x-axis */
319 __u32 height; /* number of tiles in the y-axis */
331 __u32 width; /* number of tiles in the x-axis */
332 __u32 height; /* number of tiles in the y-axis */
338 __u32 width; /* number of tiles in the x-axis */
339 __u32 height; /* number of tiles in the y-axis */
342 __u32 length; /* number of tiles to draw */
359 /* all dimensions from hereon are in terms of tiles */
361 /* move a rectangular region of tiles from one area to another*/
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/kernel/linux/linux-6.6/include/linux/
Dfb.h320 __u32 length; /* number of tiles in the map */
328 __u32 width; /* number of tiles in the x-axis */
329 __u32 height; /* number of tiles in the y-axis */
341 __u32 width; /* number of tiles in the x-axis */
342 __u32 height; /* number of tiles in the y-axis */
348 __u32 width; /* number of tiles in the x-axis */
349 __u32 height; /* number of tiles in the y-axis */
352 __u32 length; /* number of tiles to draw */
369 /* all dimensions from hereon are in terms of tiles */
371 /* move a rectangular region of tiles from one area to another*/
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/kernel/linux/linux-5.10/Documentation/admin-guide/perf/
Dthunderx2-pmu.rst9 The DMC has 8 interleaved channels and the L3C has 16 interleaved tiles.
11 to the total number of channels/tiles.
/kernel/linux/linux-6.6/Documentation/admin-guide/perf/
Dthunderx2-pmu.rst9 The DMC has 8 interleaved channels and the L3C has 16 interleaved tiles.
11 to the total number of channels/tiles.
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dnv25.c33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv25_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv25_fb_tile_comp()
Dnv35.c33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv35_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv35_fb_tile_comp()
Dnv36.c33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv36_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv36_fb_tile_comp()
Dnv40.c33 u32 tiles = DIV_ROUND_UP(size, 0x80); in nv40_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x100); in nv40_fb_tile_comp()
Dnv20.c46 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv20_fb_tile_comp() local
47 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv20_fb_tile_comp()
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dnv25.c33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv25_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv25_fb_tile_comp()
Dnv36.c33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv36_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv36_fb_tile_comp()
Dnv35.c33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv35_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv35_fb_tile_comp()
Dnv40.c33 u32 tiles = DIV_ROUND_UP(size, 0x80); in nv40_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x100); in nv40_fb_tile_comp()
Dnv20.c46 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv20_fb_tile_comp() local
47 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv20_fb_tile_comp()
/kernel/linux/linux-6.6/drivers/media/platform/mediatek/vcodec/decoder/vdec/
Dvdec_vp9_req_lat_if.c276 struct vdec_vp9_slice_tiles tiles; member
888 struct vdec_vp9_slice_tiles *tiles; in vdec_vp9_slice_setup_tile() local
898 tiles = &vsi->frame.tiles; in vdec_vp9_slice_setup_tile()
899 tiles->actual_rows = 0; in vdec_vp9_slice_setup_tile()
912 tiles->mi_rows[i] = (offset + 7) >> 3; in vdec_vp9_slice_setup_tile()
913 if (tiles->mi_rows[i]) in vdec_vp9_slice_setup_tile()
914 tiles->actual_rows++; in vdec_vp9_slice_setup_tile()
921 tiles->mi_cols[i] = (offset + 7) >> 3; in vdec_vp9_slice_setup_tile()
1059 * parse tiles according to `6.4 Decode tiles syntax`
1062 * frame contains uncompress header, compressed header and several tiles.
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