| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/ |
| D | fsl,imx6q-pcie.txt | 4 and thus inherits all the common properties defined in designware-pcie.txt.
7 - compatible:
8 - "fsl,imx6q-pcie"
9 - "fsl,imx6sx-pcie",
10 - "fsl,imx6qp-pcie"
11 - "fsl,imx7d-pcie"
12 - "fsl,imx8mq-pcie"
13 - reg: base address and length of the PCIe controller
14 - interrupts: A list of interrupt outputs of the controller. Must contain an
15 entry for each entry in the interrupt-names property.
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/ |
| D | fsl,imx6q-pcie-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lucas Stach <l.stach@pengutronix.de>
11 - Richard Zhu <hongxing.zhu@nxp.com>
22 clock-names:
26 num-lanes:
29 fsl,imx7d-pcie-phy:
31 description: A phandle to an fsl,imx7d-pcie-phy node. Additional
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/ |
| D | fsl,imx8mq-usb-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/fsl,imx8mq-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Li Jun <jun.li@nxp.com>
15 - fsl,imx8mq-usb-phy
16 - fsl,imx8mp-usb-phy
21 "#phy-cells":
27 clock-names:
29 - const: phy
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/ |
| D | imx6qdl-var-dart.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Support for Variscite DART-MX6 Module
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/sound/fsl-imx-audmux.h>
18 reg_3p3v: regulator-3p3v {
19 compatible = "regulator-fixed";
20 regulator-name = "3P3V";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
23 regulator-always-on;
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| D | imx6q-ba16.dtsi | 2 * Support for imx6 based Advantech DMS-BA16 Qseven module
7 * This file is dual-licensed: you can use it either under the terms
46 #include <dt-bindings/gpio/gpio.h>
55 compatible = "pwm-backlight";
56 pinctrl-names = "default";
57 pinctrl-0 = <&pinctrl_display>;
59 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
85 default-brightness-level = <255>;
86 enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
89 reg_1p8v: regulator-1p8v {
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | imx6qdl-var-dart.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Support for Variscite DART-MX6 Module
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/sound/fsl-imx-audmux.h>
18 reg_3p3v: regulator-3p3v {
19 compatible = "regulator-fixed";
20 regulator-name = "3P3V";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
23 regulator-always-on;
[all …]
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| D | imx6q-ba16.dtsi | 2 * Support for imx6 based Advantech DMS-BA16 Qseven module
7 * This file is dual-licensed: you can use it either under the terms
46 #include <dt-bindings/gpio/gpio.h>
55 compatible = "pwm-backlight";
56 pinctrl-names = "default";
57 pinctrl-0 = <&pinctrl_display>;
59 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
85 default-brightness-level = <255>;
86 enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
89 reg_1p8v: regulator-1p8v {
[all …]
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| /kernel/linux/linux-6.6/drivers/phy/freescale/ |
| D | phy-fsl-imx8mq-usb.c | 1 // SPDX-License-Identifier: GPL-2.0+
71 return DIV_ROUND_CLOSEST(percent - 94U, 2); in phy_tx_vref_tune_from_property()
142 struct device *dev = imx_phy->phy->dev.parent; in imx8m_get_phy_tuning_data()
144 if (device_property_read_u32(dev, "fsl,phy-tx-vref-tune-percent", in imx8m_get_phy_tuning_data()
145 &imx_phy->tx_vref_tune)) in imx8m_get_phy_tuning_data()
146 imx_phy->tx_vref_tune = PHY_TUNE_DEFAULT; in imx8m_get_phy_tuning_data()
148 imx_phy->tx_vref_tune = in imx8m_get_phy_tuning_data()
149 phy_tx_vref_tune_from_property(imx_phy->tx_vref_tune); in imx8m_get_phy_tuning_data()
151 if (device_property_read_u32(dev, "fsl,phy-tx-rise-tune-percent", in imx8m_get_phy_tuning_data()
152 &imx_phy->tx_rise_tune)) in imx8m_get_phy_tuning_data()
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| /kernel/linux/linux-6.6/drivers/infiniband/hw/hfi1/ |
| D | pcie.c | 1 // SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause
3 * Copyright(c) 2015 - 2019 Intel Corporation.
27 struct pci_dev *pdev = dd->pcidev; in hfi1_pcie_init()
43 dd_dev_err(dd, "pci enable failed: error %d\n", -ret); in hfi1_pcie_init()
49 dd_dev_err(dd, "pci_request_regions fails: err %d\n", -ret); in hfi1_pcie_init()
53 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); in hfi1_pcie_init()
60 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); in hfi1_pcie_init()
90 * fields required to re-initialize after a chip reset, or for
111 return -EINVAL; in hfi1_pcie_ddinit()
114 dd->kregbase1 = ioremap(addr, RCV_ARRAY); in hfi1_pcie_ddinit()
[all …]
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| /kernel/linux/linux-5.10/drivers/infiniband/hw/hfi1/ |
| D | pcie.c | 2 * Copyright(c) 2015 - 2019 Intel Corporation.
24 * - Redistributions of source code must retain the above copyright
26 * - Redistributions in binary form must reproduce the above copyright
30 * - Neither the name of Intel Corporation nor the names of its
70 struct pci_dev *pdev = dd->pcidev; in hfi1_pcie_init()
86 dd_dev_err(dd, "pci enable failed: error %d\n", -ret); in hfi1_pcie_init()
92 dd_dev_err(dd, "pci_request_regions fails: err %d\n", -ret); in hfi1_pcie_init()
141 * fields required to re-initialize after a chip reset, or for
162 return -EINVAL; in hfi1_pcie_ddinit()
165 dd->kregbase1 = ioremap(addr, RCV_ARRAY); in hfi1_pcie_ddinit()
[all …]
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| /kernel/linux/linux-5.10/drivers/pci/controller/dwc/ |
| D | pci-imx6.c | 1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
35 #include "pcie-designware.h"
43 #define to_imx6_pcie(x) dev_get_drvdata((x)->dev)
96 /* PCIe Port Logic registers (memory-mapped) */
109 /* PHY registers (not memory-mapped) */
146 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_poll_ack()
162 return -ETIMEDOUT; in pcie_phy_poll_ack()
167 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_wait_ack()
[all …]
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| /kernel/linux/linux-6.6/drivers/scsi/qla2xxx/ |
| D | qla_def.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (c) 2003-2014 QLogic Corporation
15 #include <linux/dma-mapping.h>
234 /* 83XX: Macros defining 8200 AEN Error-levels */
248 /* 83XX: Macros for defining IDC-Control bits */
257 /* 83XX: Macros for defining class in DEV-Partition Info register */
263 /* 83XX: Macros for IDC Lock-Recovery stages */
265 * lock-recovery
267 #define IDC_LOCK_RECOVERY_STAGE2 0x2 /* Stage2: Perform lock-recovery */
270 #define IDC_AUDIT_TIMESTAMP 0x0 /* IDC-AUDIT: Record timestamp of
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| /kernel/linux/linux-5.10/drivers/scsi/qla2xxx/ |
| D | qla_def.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (c) 2003-2014 QLogic Corporation
15 #include <linux/dma-mapping.h>
208 /* 83XX: Macros defining 8200 AEN Error-levels */
222 /* 83XX: Macros for defining IDC-Control bits */
231 /* 83XX: Macros for defining class in DEV-Partition Info register */
237 /* 83XX: Macros for IDC Lock-Recovery stages */
239 * lock-recovery
241 #define IDC_LOCK_RECOVERY_STAGE2 0x2 /* Stage2: Perform lock-recovery */
244 #define IDC_AUDIT_TIMESTAMP 0x0 /* IDC-AUDIT: Record timestamp of
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| /kernel/linux/linux-6.6/drivers/pci/controller/dwc/ |
| D | pci-imx6.c | 1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
36 #include "pcie-designware.h"
45 #define to_imx6_pcie(x) dev_get_drvdata((x)->dev)
109 /* PCIe Port Logic registers (memory-mapped) */
122 /* PHY registers (not memory-mapped) */
159 WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ && in imx6_pcie_grp_offset()
160 imx6_pcie->drvdata->variant != IMX8MQ_EP && in imx6_pcie_grp_offset()
161 imx6_pcie->drvdata->variant != IMX8MM && in imx6_pcie_grp_offset()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/mediatek/ |
| D | mtk_dp.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2019-2022 MediaTek Inc.
18 #include <linux/arm-smccc.h>
23 #include <linux/media-bus-format.h>
24 #include <linux/nvmem-consumer.h>
33 #include <sound/hdmi-codec.h>
317 .name = "mtk-dp-registers",
330 ret = regmap_read(mtk_dp->regs, offset, &read_val); in mtk_dp_read()
332 dev_err(mtk_dp->dev, "Failed to read register 0x%x: %d\n", in mtk_dp_read()
342 int ret = regmap_write(mtk_dp->regs, offset, val); in mtk_dp_write()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| D | icl_dsi.c | 71 drm_err(&dev_priv->drm, "DSI header credits not released\n"); in wait_for_header_credits()
83 drm_err(&dev_priv->drm, "DSI payload credits not released\n"); in wait_for_payload_credits()
100 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in wait_for_cmds_dispatched_to_panel()
108 for_each_dsi_port(port, intel_dsi->ports) { in wait_for_cmds_dispatched_to_panel()
115 for_each_dsi_port(port, intel_dsi->ports) { in wait_for_cmds_dispatched_to_panel()
116 dsi = intel_dsi->dsi_hosts[port]->device; in wait_for_cmds_dispatched_to_panel()
117 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in wait_for_cmds_dispatched_to_panel()
118 dsi->channel = 0; in wait_for_cmds_dispatched_to_panel()
121 drm_err(&dev_priv->drm, in wait_for_cmds_dispatched_to_panel()
126 for_each_dsi_port(port, intel_dsi->ports) { in wait_for_cmds_dispatched_to_panel()
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| /kernel/linux/linux-6.6/Documentation/userspace-api/media/v4l/ |
| D | ext-ctrls-codec-stateless.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _codec-stateless-controls:
18 .. _codec-stateless-control-id:
23 .. _v4l2-codec-stateless-h264:
43 .. flat-table:: struct v4l2_ctrl_h264_sps
44 :header-rows: 0
45 :stub-columns: 0
48 * - __u8
49 - ``profile_idc``
50 -
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| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/ |
| D | 0031_linux_drivers_perf_phy_pinctrl_ptp_pwm.patch | 7 Change-Id: I50a0069a60f92f57dd6112f6a9700811be19e564
9 diff --git a/drivers/perf/fsl_imx8_ddr_perf.c b/drivers/perf/fsl_imx8_ddr_perf.c
11 --- a/drivers/perf/fsl_imx8_ddr_perf.c
13 @@ -5,6 +5,7 @@
21 @@ -14,12 +15,15 @@
37 @@ -28,9 +32,18 @@
56 @@ -40,32 +53,56 @@
80 -static const struct fsl_ddr_devtype_data imx8_devtype_data;
106 { .compatible = "fsl,imx8-ddr-pmu", .data = &imx8_devtype_data},
107 { .compatible = "fsl,imx8m-ddr-pmu", .data = &imx8m_devtype_data},
[all …]
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| /kernel/linux/patches/linux-5.10/yangfan_patch/ |
| D | drivers.patch | 1 diff --git a/drivers/Makefile b/drivers/Makefile
3 --- a/drivers/Makefile
5 @@ -6,6 +6,8 @@
6 # Rewritten to use lists instead of if-statements.
11 obj-y += irqchip/
12 obj-y += bus/
14 diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c
16 --- a/drivers/block/nbd.c
18 @@ -2398,12 +2398,6 @@ static int nbd_genl_status(struct sk_buff *skb, struct genl_info *info)
22 - if (!dev_list) {
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
| D | i915_reg.h | 18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
44 * registers that are defined solely for the use by function-like macros.
52 * should be defined using function-like macros.
58 * with underscore, followed by a function-like macro choosing the right
68 * function-like macros may be used to define bit fields, but do note that the
87 * Try to re-use existing register macro definitions. Only add new macros for
89 * warrant a full redefinition.
120 * REG_BIT() - Prepare a u32 bit value
121 * @__n: 0-based bit number
133 * REG_GENMASK() - Prepare a continuous u32 bitmask
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|