| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | marvell,kirkwood-pinctrl.txt | 3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6180-pinctrl",
8 "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",
9 "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl",
10 "marvell,98dx4122-pinctrl", "marvell,98dx1135-pinctrl"
11 - reg: register specifier of MPP registers
14 It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.
24 mpp0 0 gpio, nand(io2), spi(cs)
28 mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk)
29 mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig)
[all …]
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| D | img,pistachio-pinctrl.txt | 8 each. The GPIO banks are represented as sub-nodes of the pad controller node.
10 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
11 ../interrupt-controller/interrupts.txt for generic information regarding
15 --------------------------------------------
16 - compatible: "img,pistachio-system-pinctrl".
17 - reg: Address range of the pinctrl registers.
19 Required properties for GPIO bank sub-nodes:
20 --------------------------------------------
21 - interrupts: Interrupt line for the GPIO bank.
22 - gpio-controller: Indicates the device is a GPIO controller.
[all …]
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| D | marvell,armada-370-pinctrl.txt | 3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6710-pinctrl"
8 - reg: register specifier of MPP registers
16 mpp0 0 gpio, uart0(rxd)
17 mpp1 1 gpo, uart0(txd)
18 mpp2 2 gpio, i2c0(sck), uart0(txd)
19 mpp3 3 gpio, i2c0(sda), uart0(rxd)
20 mpp4 4 gpio, vdd(cpu-pd)
24 mpp8 8 gpio, ge0(txd2), uart0(rts), tdm(drx), audio(bclk)
26 mpp10 10 gpio, ge0(txctl), uart0(cts), tdm(fsync), audio(sdi)
[all …]
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| D | nxp,lpc1850-scu.txt | 2 --------------------------------------------------------
5 - compatible : Should be "nxp,lpc1850-scu"
6 - reg : Address and length of the register set for the device
7 - clocks : Clock specifier (see clock bindings for details)
9 The lpc1850-scu driver uses the generic pin multiplexing and generic pin
10 configuration documented in pinctrl-bindings.txt.
13 - function
14 - pins
15 - bias-disable
16 - bias-pull-up
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | marvell,kirkwood-pinctrl.txt | 3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6180-pinctrl",
8 "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",
9 "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl",
10 "marvell,98dx4122-pinctrl", "marvell,98dx1135-pinctrl"
11 - reg: register specifier of MPP registers
14 It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.
24 mpp0 0 gpio, nand(io2), spi(cs)
28 mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk)
29 mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig)
[all …]
|
| D | img,pistachio-pinctrl.txt | 8 each. The GPIO banks are represented as sub-nodes of the pad controller node.
10 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
11 ../interrupt-controller/interrupts.txt for generic information regarding
15 --------------------------------------------
16 - compatible: "img,pistachio-system-pinctrl".
17 - reg: Address range of the pinctrl registers.
19 Required properties for GPIO bank sub-nodes:
20 --------------------------------------------
21 - interrupts: Interrupt line for the GPIO bank.
22 - gpio-controller: Indicates the device is a GPIO controller.
[all …]
|
| D | marvell,armada-370-pinctrl.txt | 3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6710-pinctrl"
8 - reg: register specifier of MPP registers
16 mpp0 0 gpio, uart0(rxd)
17 mpp1 1 gpo, uart0(txd)
18 mpp2 2 gpio, i2c0(sck), uart0(txd)
19 mpp3 3 gpio, i2c0(sda), uart0(rxd)
20 mpp4 4 gpio, vdd(cpu-pd)
24 mpp8 8 gpio, ge0(txd2), uart0(rts), tdm(drx), audio(bclk)
26 mpp10 10 gpio, ge0(txctl), uart0(cts), tdm(fsync), audio(sdi)
[all …]
|
| D | nxp,lpc1850-scu.txt | 2 --------------------------------------------------------
5 - compatible : Should be "nxp,lpc1850-scu"
6 - reg : Address and length of the register set for the device
7 - clocks : Clock specifier (see clock bindings for details)
9 The lpc1850-scu driver uses the generic pin multiplexing and generic pin
10 configuration documented in pinctrl-bindings.txt.
13 - function
14 - pins
15 - bias-disable
16 - bias-pull-up
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/marvell/ |
| D | cp110-system-controller.txt | 6 giving access to numerous features: clocks, pin-muxing and many other
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the CP110 system controller
14 SYSTEM CONTROLLER 0
18 -------
20 The Device Tree node representing this System Controller 0 provides a
23 - a set of core clocks
24 - a set of gatable clocks
28 - The first cell must be 0 or 1. 0 for the core clocks and 1 for the
30 - The second cell identifies the particular core clock or gatable
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/marvell/ |
| D | cp110-system-controller.txt | 6 giving access to numerous features: clocks, pin-muxing and many other
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the CP110 system controller
14 SYSTEM CONTROLLER 0
18 -------
20 The Device Tree node representing this System Controller 0 provides a
23 - a set of core clocks
24 - a set of gateable clocks
28 - The first cell must be 0 or 1. 0 for the core clocks and 1 for the
30 - The second cell identifies the particular core clock or gateable
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/ |
| D | Kconfig.debug | 1 # SPDX-License-Identifier: GPL-2.0
44 once the kernel has booted up - it's a one time check.
96 1 - undefined instruction events
97 2 - system calls
98 4 - invalid data aborts
99 8 - SIGSEGV faults
100 16 - SIGBUS faults
104 bool "Kernel low-level debugging functions (read help!)"
117 prompt "Kernel low-level debugging port"
121 bool "Kernel low-level debugging messages via Alpine UART0"
[all …]
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| /kernel/linux/linux-6.6/drivers/pinctrl/mvebu/ |
| D | pinctrl-armada-370.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
18 #include "pinctrl-mvebu.h"
21 MPP_MODE(0,
22 MPP_FUNCTION(0x0, "gpio", NULL),
23 MPP_FUNCTION(0x1, "uart0", "rxd")),
25 MPP_FUNCTION(0x0, "gpo", NULL),
26 MPP_FUNCTION(0x1, "uart0", "txd")),
28 MPP_FUNCTION(0x0, "gpio", NULL),
29 MPP_FUNCTION(0x1, "i2c0", "sck"),
[all …]
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| D | pinctrl-armada-cp110.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include "pinctrl-mvebu.h"
24 * - In Armada7K (single CP) almost all the MPPs are available (except the
26 * - In Armada8K (dual CP) the MPPs are split into 2 parts, MPPs 0-31 from
27 * CPS, and MPPs 32-62 from CPM, the below flags (V_ARMADA_8K_CPM,
32 V_ARMADA_7K = BIT(0),
41 MPP_MODE(0,
42 MPP_FUNCTION(0, "gpio", NULL),
49 MPP_FUNCTION(8, "uart0", "rxd"),
53 MPP_FUNCTION(0, "gpio", NULL),
[all …]
|
| /kernel/linux/linux-5.10/drivers/pinctrl/mvebu/ |
| D | pinctrl-armada-370.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
19 #include "pinctrl-mvebu.h"
22 MPP_MODE(0,
23 MPP_FUNCTION(0x0, "gpio", NULL),
24 MPP_FUNCTION(0x1, "uart0", "rxd")),
26 MPP_FUNCTION(0x0, "gpo", NULL),
27 MPP_FUNCTION(0x1, "uart0", "txd")),
29 MPP_FUNCTION(0x0, "gpio", NULL),
30 MPP_FUNCTION(0x1, "i2c0", "sck"),
[all …]
|
| D | pinctrl-armada-cp110.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include "pinctrl-mvebu.h"
24 * - In Armada7K (single CP) almost all the MPPs are available (except the
26 * - In Armada8K (dual CP) the MPPs are split into 2 parts, MPPs 0-31 from
27 * CPS, and MPPs 32-62 from CPM, the below flags (V_ARMADA_8K_CPM,
32 V_ARMADA_7K = BIT(0),
41 MPP_MODE(0,
42 MPP_FUNCTION(0, "gpio", NULL),
49 MPP_FUNCTION(8, "uart0", "rxd"),
53 MPP_FUNCTION(0, "gpio", NULL),
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/ |
| D | Kconfig.debug | 1 # SPDX-License-Identifier: GPL-2.0
44 once the kernel has booted up - it's a one time check.
107 1 - undefined instruction events
108 2 - system calls
109 4 - invalid data aborts
110 8 - SIGSEGV faults
111 16 - SIGBUS faults
115 bool "Kernel low-level debugging functions (read help!)"
128 prompt "Kernel low-level debugging port"
132 bool "Kernel low-level debugging messages via Alpine UART0"
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | sama5d3_uart.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * sama5d3_uart.dtsi - Device Tree Include file for SAMA5D3 SoC with
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/at91.h>
15 serial5 = &uart0;
22 uart0 {
23 pinctrl_uart0: uart0-0 {
31 pinctrl_uart1: uart1-0 {
39 uart0: serial@f0024000 { label
[all …]
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| D | sun8i-r16-nintendo-nes-classic.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR X11
4 /dts-v1/;
5 #include "sun8i-a33.dtsi"
6 #include "sunxi-common-regulators.dtsi"
10 compatible = "nintendo,nes-classic", "allwinner,sun8i-r16",
11 "allwinner,sun8i-a33";
14 serial0 = &uart0;
18 stdout-path = "serial0:115200n8";
22 &uart0 {
24 * UART0 is available on two ports: PB and PF, both are accessible.
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/ |
| D | sama5d3_uart.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * sama5d3_uart.dtsi - Device Tree Include file for SAMA5D3 SoC with
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/mfd/at91-usart.h>
16 serial5 = &uart0;
23 uart0 {
24 pinctrl_uart0: uart0-0 {
32 pinctrl_uart1: uart1-0 {
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/sifive/ |
| D | sifive-blocks-ip-versioning.txt | 1 DT compatible string versioning for SiFive open-source IP blocks
4 strings for open-source SiFive IP blocks. HDL for these IP blocks
7 https://github.com/sifive/sifive-blocks
9 IP block-specific DT compatible strings are contained within the HDL,
10 in the form "sifive,<ip-block-name><integer version number>".
12 An example is "sifive,uart0" from:
14 https://github.com/sifive/sifive-blocks/blob/v1.0/src/main/scala/devices/uart/UART.scala#L43
17 auto-discovery, the maintainers of these IP blocks intend to increment
23 "sifive,uart0" to indicate that their driver is compatible with the
25 upstream sifive-blocks commits. It is expected that most drivers will
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sifive/ |
| D | sifive-blocks-ip-versioning.txt | 1 DT compatible string versioning for SiFive open-source IP blocks
4 strings for open-source SiFive IP blocks. HDL for these IP blocks
7 https://github.com/sifive/sifive-blocks
9 IP block-specific DT compatible strings are contained within the HDL,
10 in the form "sifive,<ip-block-name><integer version number>".
12 An example is "sifive,uart0" from:
14 https://github.com/sifive/sifive-blocks/blob/v1.0/src/main/scala/devices/uart/UART.scala#L43
17 auto-discovery, the maintainers of these IP blocks intend to increment
23 "sifive,uart0" to indicate that their driver is compatible with the
25 upstream sifive-blocks commits. It is expected that most drivers will
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/ |
| D | 4xx.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright 2002-2005 MontaVista Software Inc.
30 switch (pvr & 0xf0000ff0) { in chip_11_errata()
31 case 0x40000850: in chip_11_errata()
32 case 0x400008d0: in chip_11_errata()
33 case 0x200008d0: in chip_11_errata()
34 memsize -= 4096; in chip_11_errata()
49 memsize = 0; in ibm4xx_sdram_fixup_memsize()
50 for (i = 0; i < ARRAY_SIZE(sdram_bxcr); i++) { in ibm4xx_sdram_fixup_memsize()
57 dt_fixup_memory(0, memsize); in ibm4xx_sdram_fixup_memsize()
[all …]
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| /kernel/linux/linux-6.6/arch/powerpc/boot/ |
| D | 4xx.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright 2002-2005 MontaVista Software Inc.
30 switch (pvr & 0xf0000ff0) { in chip_11_errata()
31 case 0x40000850: in chip_11_errata()
32 case 0x400008d0: in chip_11_errata()
33 case 0x200008d0: in chip_11_errata()
34 memsize -= 4096; in chip_11_errata()
49 memsize = 0; in ibm4xx_sdram_fixup_memsize()
50 for (i = 0; i < ARRAY_SIZE(sdram_bxcr); i++) { in ibm4xx_sdram_fixup_memsize()
57 dt_fixup_memory(0, memsize); in ibm4xx_sdram_fixup_memsize()
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/allwinner/ |
| D | sun8i-r16-nintendo-nes-classic.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR X11
4 /dts-v1/;
5 #include "sun8i-a33.dtsi"
6 #include "sunxi-common-regulators.dtsi"
10 compatible = "nintendo,nes-classic", "allwinner,sun8i-r16",
11 "allwinner,sun8i-a33";
14 serial0 = &uart0;
18 stdout-path = "serial0:115200n8";
22 &uart0 {
24 * UART0 is available on two ports: PB and PF, both are accessible.
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/broadcom/ |
| D | bcm283x.dtsi | 1 #include <dt-bindings/pinctrl/bcm2835.h>
2 #include <dt-bindings/clock/bcm2835.h>
3 #include <dt-bindings/clock/bcm2835-aux.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include <dt-bindings/soc/bcm2835-pm.h>
8 /* firmware-provided startup stubs live here, where the secondary CPUs are
11 /memreserve/ 0x00000000 0x00001000;
21 #address-cells = <1>;
22 #size-cells = <1>;
[all …]
|