1# Copyright (c) 2021-2024 Huawei Device Co., Ltd. 2# Licensed under the Apache License, Version 2.0 (the "License"); 3# you may not use this file except in compliance with the License. 4# You may obtain a copy of the License at 5# 6# http://www.apache.org/licenses/LICENSE-2.0 7# 8# Unless required by applicable law or agreed to in writing, software 9# distributed under the License is distributed on an "AS IS" BASIS, 10# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11# See the License for the specific language governing permissions and 12# limitations under the License. 13 14intrinsics_namespace: irtoc 15 16# WARNING: 'class_name' field should be `Irtoc` for all Irtoc intrinsics. If it needs to be changed, fix `is_irtoc?` 17# method in `compiler_intrinsics.rb` file 18 19intrinsics: 20- name: SlowPathEntry 21 class_name: Irtoc 22 method_name: 23 space: core 24 static: true 25 codegen_arch: [amd64, arm64, arm32] 26 codegen_func: "EmitSlowPathEntryIntrinsic" 27 codegen_virt: true 28 llvm_codegen_func: EmitSlowPathEntry 29 signature: 30 ret: void 31 args: [] 32 description: Invoke slow path of the entrypoint from the irtoc'ed entrypoint 33 clear_flags: [require_state, can_throw, heap_inv] 34 35- name: SaveRegistersEp 36 class_name: Irtoc 37 method_name: 38 space: core 39 static: true 40 codegen_arch: [amd64, arm64, arm32] 41 codegen_func: "EmitSaveOrRestoreRegsEpIntrinsic" 42 codegen_virt: true 43 llvm_codegen_func: EmitNothing 44 signature: 45 ret: void 46 args: [] 47 description: Save registers before native call 48 clear_flags: [require_state, can_throw, heap_inv] 49 50- name: RestoreRegistersEp 51 class_name: Irtoc 52 method_name: 53 space: core 54 static: true 55 codegen_arch: [amd64, arm64, arm32] 56 codegen_func: "EmitSaveOrRestoreRegsEpIntrinsic" 57 codegen_virt: true 58 llvm_codegen_func: EmitNothing 59 signature: 60 ret: void 61 args: [] 62 description: Restore registers after native call 63 clear_flags: [require_state, can_throw, heap_inv] 64 65- name: Unreachable 66 class_name: Irtoc 67 method_name: 68 space: core 69 static: true 70 codegen_arch: [amd64, arm64, arm32] 71 codegen_func: "EmitUnreachableIntrinsic" 72 codegen_virt: true 73 llvm_codegen_func: EmitUnreachable 74 signature: 75 ret: void 76 args: [] 77 description: Emit trap instruction 78 set_flags: [terminator] 79 clear_flags: [require_state, can_throw, heap_inv] 80 81- name: TailCall 82 class_name: Irtoc 83 method_name: 84 space: core 85 static: true 86 codegen_arch: [ amd64, arm64, arm32 ] 87 codegen_func: "EmitTailCallIntrinsic" 88 codegen_virt: true 89 llvm_codegen_func: EmitTailCall 90 signature: 91 ret: void 92 args: [] 93 description: Make a tail call 94 set_flags: [terminator, no_dst] 95 clear_flags: [require_state, can_throw, heap_inv] 96 97- name: InterpreterReturn 98 class_name: Irtoc 99 method_name: 100 space: core 101 static: true 102 codegen_arch: [amd64, arm64, arm32] 103 codegen_func: "EmitInterpreterReturnIntrinsic" 104 codegen_virt: true 105 llvm_codegen_func: EmitInterpreterReturn 106 signature: 107 ret: void 108 args: [] 109 clear_flags: [require_state, can_throw, heap_inv] 110 description: Restore registers on return bytecode 111 112- name: LoadAcquireMarkWordExclusive 113 class_name: Irtoc 114 method_name: 115 space: core 116 static: true 117 codegen_arch: [arm64, arm32] 118 codegen_func: "EmitMarkWordIntrinsic" 119 codegen_virt: true 120 llvm_codegen_func: EmitExclusiveLoadWithAcquire 121 signature: 122 ret: void 123 args: [] 124 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 125 description: Emit load mark word with acquire semantics for exclusive use 126 127- name: StoreReleaseMarkWordExclusive 128 class_name: Irtoc 129 method_name: 130 space: core 131 static: true 132 codegen_arch: [arm64, arm32] 133 codegen_func: "EmitMarkWordIntrinsic" 134 codegen_virt: true 135 llvm_codegen_func: EmitExclusiveStoreWithRelease 136 signature: 137 ret: void 138 args: [] 139 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 140 description: Emit store mark word that was loaded for exclusive use with release semantics 141 142- name: CompareAndSetMarkWord 143 class_name: Irtoc 144 method_name: 145 space: core 146 static: true 147 codegen_arch: [amd64] 148 codegen_func: "EmitMarkWordIntrinsic" 149 codegen_virt: true 150 # llvm_codegen_func: unused for arm64 151 signature: 152 ret: void 153 args: [] 154 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 155 description: Emit store mark word using compare and swap 156 157- name: DataMemoryBarrierFull 158 class_name: Irtoc 159 method_name: 160 space: core 161 static: true 162 codegen_arch: [arm64, amd64] 163 codegen_func: "EmitDataMemoryBarrierFullIntrinsic" 164 codegen_virt: true 165 llvm_codegen_func: EmitMemoryFenceFull 166 signature: 167 ret: void 168 args: [] 169 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 170 description: InnerShareable Full (ACQUIRE + RELEASE) barrier. Ensures the order of memory accesses before and after the barrier. 171 172- name: WriteTlabStatsSafe 173 class_name: Irtoc 174 method_name: 175 space: core 176 static: true 177 codegen_arch: [arm64, arm32, amd64] 178 codegen_func: "EmitWriteTlabStatsSafeIntrinsic" 179 codegen_virt: true 180 llvm_codegen_func: EmitWriteTlabStatsSafe 181 signature: # the signature is fake 182 ret: void 183 args: [] 184 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 185 description: calls WriteTlabStats function from inside the IrToc 186 187- name: ReverseBytesU64 188 class_name: Irtoc 189 method_name: 190 space: core 191 static: true 192 codegen_arch: [arm64, amd64] 193 codegen_func: "EmitReverseIntrinsic" 194 codegen_virt: true 195 llvm_codegen_func: EmitReverseBytes 196 signature: 197 ret: u64 198 args: [ u64 ] 199 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 200 description: Reverse bytes in dword 201 202- name: ReverseBytesU32 203 class_name: Irtoc 204 method_name: 205 space: core 206 static: true 207 codegen_arch: [arm64, amd64] 208 codegen_func: "EmitReverseIntrinsic" 209 codegen_virt: true 210 llvm_codegen_func: EmitReverseBytes 211 signature: 212 ret: u32 213 args: [ u32 ] 214 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 215 description: Reverse bytes in word 216 217- name: ReverseHalfWords 218 class_name: Irtoc 219 method_name: 220 space: core 221 static: true 222 codegen_arch: [arm64, amd64] 223 codegen_func: "EmitReverseIntrinsic" 224 codegen_virt: true 225 llvm_codegen_func: EmitReverseHalfWords 226 signature: 227 ret: f64 228 args: [ f64 ] 229 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 230 description: Reverse half-words in the double word 231 232- name: CountLeadingZeroBitsU64 233 class_name: Irtoc 234 method_name: 235 space: core 236 static: true 237 codegen_arch: [arm64, amd64] 238 codegen_func: "CreateCountLeadingZeroBits" 239 llvm_codegen_func: EmitCtlz 240 signature: 241 ret: u64 242 args: [ u64 ] 243 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 244 description: Count leading zero bits in 64-bit integer 245 246- name: ExpandU8ToU16 247 class_name: Irtoc 248 method_name: 249 space: core 250 static: true 251 codegen_arch: [arm64, amd64] 252 codegen_func: "EmitExpandU8ToU16Intrinsic" 253 codegen_virt: true 254 llvm_codegen_func: EmitExpandU8U16 255 signature: 256 ret: f64 257 args: [ f64 ] 258 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 259 description: Expand the the lower 4 u8 into 4 u16 260 261- name: AtomicByteOr 262 class_name: Irtoc 263 method_name: 264 space: core 265 static: true 266 codegen_arch: [arm64, arm32, amd64] 267 codegen_func: "EmitAtomicByteOrIntrinsic" 268 codegen_virt: true 269 llvm_codegen_func: EmitAtomicByteOr 270 signature: 271 ret: void 272 args: [ u64, u8 ] 273 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 274 description: Atomic bit set on byte in memory, without return 275 276- name: CompressEightUtf16ToUtf8CharsUsingSimd 277 class_name: Irtoc 278 method_name: 279 space: core 280 static: true 281 codegen_arch: [arm64] 282 codegen_func: "EmitSimdIntrinsic" 283 codegen_virt: true 284 llvm_codegen_func: EmitCompressEightUtf16ToUtf8CharsUsingSimd 285 signature: 286 ret: void 287 args: [] 288 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 289 description: Compresses eight Utf16 chars (16 bytes) to Utf8 chars (8 bytes) using SIMD instructions 290 291- name: CompressSixteenUtf16ToUtf8CharsUsingSimd 292 class_name: Irtoc 293 method_name: 294 space: core 295 static: true 296 codegen_arch: [arm64] 297 codegen_func: "EmitSimdIntrinsic" 298 codegen_virt: true 299 llvm_codegen_func: EmitCompressSixteenUtf16ToUtf8CharsUsingSimd 300 signature: 301 ret: void 302 args: [] 303 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 304 description: Compresses sixteen Utf16 chars (32 bytes) to Utf8 chars (16 bytes) using SIMD instructions 305 306- name: MemCharU8X32UsingSimd 307 class_name: Irtoc 308 method_name: 309 space: core 310 static: true 311 set_flags: [require_tmp] 312 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 313 codegen_arch: [arm64] 314 codegen_func: "EmitSimdIntrinsic" 315 codegen_virt: true 316 llvm_codegen_func: EmitMemCharU8X32UsingSimd 317 signature: 318 ret: void* 319 args: [ u8, u8* ] 320 description: Find u8 char in 32-byte block of memory addressed by the second operand 321 322- name: MemCharU8X16UsingSimd 323 class_name: Irtoc 324 method_name: 325 space: core 326 static: true 327 set_flags: [require_tmp] 328 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 329 codegen_arch: [arm64] 330 codegen_func: "EmitSimdIntrinsic" 331 codegen_virt: true 332 llvm_codegen_func: EmitMemCharU8X16UsingSimd 333 signature: 334 ret: void* 335 args: [ u8, u8* ] 336 description: Find u8 char in 16-byte block of memory addressed by the second operand 337 338- name: MemCharU16X16UsingSimd 339 class_name: Irtoc 340 method_name: 341 space: core 342 static: true 343 set_flags: [require_tmp] 344 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 345 codegen_arch: [arm64] 346 codegen_func: "EmitSimdIntrinsic" 347 codegen_virt: true 348 llvm_codegen_func: EmitMemCharU16X16UsingSimd 349 signature: 350 ret: void* 351 args: [ u16, u16* ] 352 description: Find u16 char in 32-byte block of memory addressed by the second operand 353 354- name: MemCharU16X8UsingSimd 355 class_name: Irtoc 356 method_name: 357 space: core 358 static: true 359 set_flags: [require_tmp] 360 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 361 codegen_arch: [arm64] 362 codegen_func: "EmitSimdIntrinsic" 363 codegen_virt: true 364 llvm_codegen_func: EmitMemCharU16X8UsingSimd 365 signature: 366 ret: void* 367 args: [ u16, u16* ] 368 description: Find u16 char in 16-byte block of memory addressed by the second operand 369 370- name: JsCastDoubleToChar 371 class_name: Irtoc 372 method_name: 373 space: core 374 static: true 375 set_flags: [] 376 clear_flags: [runtime_call, require_state, can_throw, heap_inv] 377 codegen_arch: [amd64, arm64] 378 codegen_func: "EmitJsCastDoubleToCharIntrinsic" 379 codegen_virt: true 380 llvm_codegen_func: EmitJsCastDoubleToChar 381 signature: 382 ret: u32 383 args: [ f64 ] 384 description: Converts double to a pair of a flag (0 - success, 1 - failure) and a Utf16 symbol code taking javascript semantic into account. Both values are packed into a u32 385