1 /**
2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 *
15 * Description: I2C Sample Source. \n
16 *
17 * History: \n
18 * 2023-05-25, Create file. \n
19 */
20 #include "pinctrl.h"
21 #include "i2c.h"
22 #include "soc_osal.h"
23 #include "app_init.h"
24 #if defined(CONFIG_I2C_SUPPORT_DMA) && (CONFIG_I2C_SUPPORT_DMA == 1)
25 #include "dma.h"
26 #endif
27
28 #define I2C_MASTER_ADDR 0x0
29 #define I2C_SLAVE_ADDR 0x8
30 #define I2C_SET_BAUDRATE 500000
31 #define I2C_TASK_DURATION_MS 500
32 #if defined(CONFIG_I2C_SUPPORT_INT) && (CONFIG_I2C_SUPPORT_INT == 1)
33 #define I2C_INT_TRANSFER_DELAY_MS 800
34 #endif
35
36 #define I2C_TASK_PRIO 24
37 #define I2C_TASK_STACK_SIZE 0x1000
38
app_i2c_init_pin(void)39 static void app_i2c_init_pin(void)
40 {
41 /* I2C pinmux. */
42 uapi_pin_set_mode(CONFIG_I2C_SCL_MASTER_PIN, CONFIG_I2C_MASTER_PIN_MODE);
43 uapi_pin_set_mode(CONFIG_I2C_SDA_MASTER_PIN, CONFIG_I2C_MASTER_PIN_MODE);
44 }
45
i2c_master_task(const char * arg)46 static void *i2c_master_task(const char *arg)
47 {
48 unused(arg);
49 i2c_data_t data = { 0 };
50
51 uint32_t baudrate = I2C_SET_BAUDRATE;
52 uint8_t hscode = I2C_MASTER_ADDR;
53 uint16_t dev_addr = I2C_SLAVE_ADDR;
54
55 #if defined(CONFIG_I2C_SUPPORT_DMA) && (CONFIG_I2C_SUPPORT_DMA == 1)
56 uapi_dma_init();
57 uapi_dma_open();
58 #endif /* CONFIG_I2C_SUPPORT_DMA */
59
60 /* I2C master init config. */
61 app_i2c_init_pin();
62 uapi_i2c_master_init(CONFIG_I2C_MASTER_BUS_ID, baudrate, hscode);
63
64 #if defined(CONFIG_I2C_SUPPORT_INT) && (CONFIG_I2C_SUPPORT_INT == 1)
65 uapi_i2c_set_irq_mode(CONFIG_I2C_MASTER_BUS_ID, 1);
66 #endif /* CONFIG_I2C_SUPPORT_INT */
67
68 /* I2C data config. */
69 uint8_t tx_buff[CONFIG_I2C_TRANSFER_LEN] = { 0 };
70 for (uint32_t loop = 0; loop < CONFIG_I2C_TRANSFER_LEN; loop++) {
71 tx_buff[loop] = (loop & 0xFF);
72 }
73
74 uint8_t rx_buff[CONFIG_I2C_TRANSFER_LEN] = { 0 };
75 data.send_buf = tx_buff;
76 data.send_len = CONFIG_I2C_TRANSFER_LEN;
77 data.receive_buf = rx_buff;
78 data.receive_len = CONFIG_I2C_TRANSFER_LEN;
79
80 while (1) {
81 osal_msleep(I2C_TASK_DURATION_MS);
82 osal_printk("i2c%d master send start!\r\n", CONFIG_I2C_MASTER_BUS_ID);
83 if (uapi_i2c_master_write(CONFIG_I2C_MASTER_BUS_ID, dev_addr, &data) == ERRCODE_SUCC) {
84 osal_printk("i2c%d master send succ!\r\n", CONFIG_I2C_MASTER_BUS_ID);
85 } else {
86 continue;
87 }
88 #if defined(CONFIG_I2C_SUPPORT_INT) && (CONFIG_I2C_SUPPORT_INT == 1)
89 osal_msleep(I2C_INT_TRANSFER_DELAY_MS);
90 #endif
91 osal_printk("i2c%d master receive start!\r\n", CONFIG_I2C_MASTER_BUS_ID);
92 if (uapi_i2c_master_read(CONFIG_I2C_MASTER_BUS_ID, dev_addr, &data) == ERRCODE_SUCC) {
93 for (uint32_t i = 0; i < data.receive_len; i++) {
94 osal_printk("i2c%d master receive data is %x\r\n", CONFIG_I2C_MASTER_BUS_ID, data.receive_buf[i]);
95 }
96 osal_printk("i2c%d master receive succ!\r\n", CONFIG_I2C_MASTER_BUS_ID);
97 }
98 }
99
100 return NULL;
101 }
102
i2c_master_entry(void)103 static void i2c_master_entry(void)
104 {
105 osal_task *task_handle = NULL;
106 osal_kthread_lock();
107 task_handle = osal_kthread_create((osal_kthread_handler)i2c_master_task, 0, "I2cMasterTask", I2C_TASK_STACK_SIZE);
108 if (task_handle != NULL) {
109 osal_kthread_set_priority(task_handle, I2C_TASK_PRIO);
110 osal_kfree(task_handle);
111 }
112 osal_kthread_unlock();
113 }
114
115 /* Run the i2c_master_entry. */
116 app_run(i2c_master_entry);