1 /**
2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 *
15 * Description: UART Sample Source. \n
16 *
17 * History: \n
18 * 2023-06-29, Create file. \n
19 */
20 #include "pinctrl.h"
21 #include "uart.h"
22 #include "watchdog.h"
23 #include "soc_osal.h"
24 #include "app_init.h"
25
26 #define UART_BAUDRATE 115200
27 #define UART_DATA_BITS 3
28 #define UART_STOP_BITS 1
29 #define UART_PARITY_BIT 0
30 #define UART_TRANSFER_SIZE 16
31 #define CONFIG_UART_INT_WAIT_MS 5
32 #define UART_TASK_DURATION_MS 500
33
34 #if defined(CONFIG_UART_DMA_TRANSFER_MODE)
35 #define UART_TX_DMA_ENABLE 1
36 #define UART_TX_INT_THRESHOLD 0
37 #define UART_RX_DMA_ENABLE 1
38 #define UART_RX_INT_THRESHOLD 0
39 #define UART_DMA_WIDTH 0
40 #define UART_DMA_BURST_LENGTH 2
41 #define UART_DMA_PRIORITY 0
42 #endif
43
44 #define UART_TASK_PRIO 24
45 #define UART_TASK_STACK_SIZE 0x1000
46
47 static uint8_t g_app_uart_rx_buff[UART_TRANSFER_SIZE] = { 0 };
48 #if defined(CONFIG_UART_INT_TRANSFER_MODE)
49 static uint8_t g_app_uart_int_rx_flag = 0;
50 #endif
51 static uart_buffer_config_t g_app_uart_buffer_config = {
52 .rx_buffer = g_app_uart_rx_buff,
53 .rx_buffer_size = UART_TRANSFER_SIZE
54 };
55
56 #if defined(CONFIG_UART_DMA_TRANSFER_MODE)
57 uart_write_dma_config_t g_app_dma_cfg = {
58 .src_width = UART_DMA_WIDTH,
59 .dest_width = UART_DMA_WIDTH,
60 .burst_length = UART_DMA_BURST_LENGTH,
61 .priority = UART_DMA_PRIORITY
62 };
63 #endif
64
app_uart_init_pin(void)65 static void app_uart_init_pin(void)
66 {
67 uapi_pin_set_mode(CONFIG_UART0_TXD_PIN, CONFIG_UART0_PIN_MODE);
68 uapi_pin_set_mode(CONFIG_UART0_RXD_PIN, CONFIG_UART0_PIN_MODE);
69 }
70
app_uart_init_config(void)71 static void app_uart_init_config(void)
72 {
73 uart_attr_t attr = {
74 .baud_rate = UART_BAUDRATE,
75 .data_bits = UART_DATA_BITS,
76 .stop_bits = UART_STOP_BITS,
77 .parity = UART_PARITY_BIT
78 };
79
80 uart_pin_config_t pin_config = {
81 .tx_pin = S_MGPIO0,
82 .rx_pin = S_MGPIO1,
83 .cts_pin = PIN_NONE,
84 .rts_pin = PIN_NONE
85 };
86
87 #if defined(CONFIG_UART_DMA_TRANSFER_MODE)
88 uart_extra_attr_t extra_attr = {
89 .tx_dma_enable = UART_TX_DMA_ENABLE,
90 .tx_int_threshold = UART_TX_INT_THRESHOLD,
91 .rx_dma_enable = UART_RX_DMA_ENABLE,
92 .rx_int_threshold = UART_RX_INT_THRESHOLD
93 };
94
95 uapi_uart_init(CONFIG_UART0_BUS_ID, &pin_config, &attr, &extra_attr, &g_app_uart_buffer_config);
96 #else
97 uapi_uart_init(CONFIG_UART0_BUS_ID, &pin_config, &attr, NULL, &g_app_uart_buffer_config);
98 #endif
99 }
100
101 #if defined(CONFIG_UART_INT_TRANSFER_MODE)
app_uart_read_int_handler(const void * buffer,uint16_t length,bool error)102 static void app_uart_read_int_handler(const void *buffer, uint16_t length, bool error)
103 {
104 unused(error);
105 if (buffer == NULL || length == 0) {
106 osal_printk("uart%d int mode transfer illegal data!\r\n", CONFIG_UART0_BUS_ID);
107 return;
108 }
109
110 uint8_t *buff = (uint8_t *)buffer;
111 if (memcpy_s(g_app_uart_rx_buff, length, buff, length) != EOK) {
112 osal_printk("uart%d int mode data copy fail!\r\n", CONFIG_UART0_BUS_ID);
113 return;
114 }
115 g_app_uart_int_rx_flag = 1;
116 }
117
app_uart_write_int_handler(const void * buffer,uint32_t length,const void * params)118 static void app_uart_write_int_handler(const void *buffer, uint32_t length, const void *params)
119 {
120 unused(params);
121 uint8_t *buff = (void *)buffer;
122 for (uint8_t i = 0; i < length; i++) {
123 osal_printk("uart%d write data[%d] = %d\r\n", CONFIG_UART0_BUS_ID, i, buff[i]);
124 }
125 }
126 #endif
127
uart_task(const char * arg)128 static void *uart_task(const char *arg)
129 {
130 unused(arg);
131 /* UART pinmux. */
132 app_uart_init_pin();
133
134 /* UART init config. */
135 app_uart_init_config();
136
137 #if defined(CONFIG_UART_INT_TRANSFER_MODE)
138 osal_printk("uart%d int mode register receive callback start!\r\n", CONFIG_UART0_BUS_ID);
139 if (uapi_uart_register_rx_callback(CONFIG_UART0_BUS_ID, UART_RX_CONDITION_FULL_OR_SUFFICIENT_DATA_OR_IDLE,
140 1, app_uart_read_int_handler) == ERRCODE_SUCC) {
141 osal_printk("uart%d int mode register receive callback succ!\r\n", CONFIG_UART0_BUS_ID);
142 }
143 #endif
144
145 while (1) {
146 osal_msleep(UART_TASK_DURATION_MS);
147 #if defined(CONFIG_UART_POLL_TRANSFER_MODE)
148 osal_printk("uart%d poll mode receive start!\r\n", CONFIG_UART0_BUS_ID);
149 (void)uapi_watchdog_kick();
150 if (uapi_uart_read(CONFIG_UART0_BUS_ID, g_app_uart_rx_buff, UART_TRANSFER_SIZE, 0) == UART_TRANSFER_SIZE) {
151 osal_printk("uart%d poll mode receive succ!\r\n", CONFIG_UART0_BUS_ID);
152 }
153 osal_printk("uart%d poll mode send back!\r\n", CONFIG_UART0_BUS_ID);
154 if (uapi_uart_write(CONFIG_UART0_BUS_ID, g_app_uart_rx_buff, UART_TRANSFER_SIZE, 0) == UART_TRANSFER_SIZE) {
155 osal_printk("uart%d poll mode send back succ!\r\n", CONFIG_UART0_BUS_ID);
156 }
157 #endif
158 #if defined(CONFIG_UART_INT_TRANSFER_MODE)
159 while (g_app_uart_int_rx_flag != 1) {
160 osal_msleep(CONFIG_UART_INT_WAIT_MS);
161 }
162 g_app_uart_int_rx_flag = 0;
163 osal_printk("uart%d int mode send back!\r\n", CONFIG_UART0_BUS_ID);
164 if (uapi_uart_write_int(CONFIG_UART0_BUS_ID, g_app_uart_rx_buff, UART_TRANSFER_SIZE, 0,
165 app_uart_write_int_handler) == ERRCODE_SUCC) {
166 osal_printk("uart%d int mode send back succ!\r\n", CONFIG_UART0_BUS_ID);
167 }
168 #endif
169 #if defined(CONFIG_UART_DMA_TRANSFER_MODE)
170 osal_printk("uart%d dma mode receive start!\r\n", CONFIG_UART0_BUS_ID);
171 if (uapi_uart_read_by_dma(CONFIG_UART0_BUS_ID, g_app_uart_rx_buff, UART_TRANSFER_SIZE,
172 &g_app_dma_cfg) == UART_TRANSFER_SIZE) {
173 osal_printk("uart%d dma mode receive succ!\r\n", CONFIG_UART0_BUS_ID);
174 }
175 osal_printk("uart%d dma mode send back!\r\n", CONFIG_UART0_BUS_ID);
176 if (uapi_uart_write_by_dma(CONFIG_UART0_BUS_ID, g_app_uart_rx_buff, UART_TRANSFER_SIZE,
177 &g_app_dma_cfg) == UART_TRANSFER_SIZE) {
178 osal_printk("uart%d dma mode send back succ!\r\n", CONFIG_UART0_BUS_ID);
179 }
180 #endif
181 }
182
183 return NULL;
184 }
185
uart_entry(void)186 static void uart_entry(void)
187 {
188 osal_task *task_handle = NULL;
189 osal_kthread_lock();
190 task_handle = osal_kthread_create((osal_kthread_handler)uart_task, 0, "UartTask", UART_TASK_STACK_SIZE);
191 if (task_handle != NULL) {
192 osal_kthread_set_priority(task_handle, UART_TASK_PRIO);
193 osal_kfree(task_handle);
194 }
195 osal_kthread_unlock();
196 }
197
198 /* Run the uart_entry. */
199 app_run(uart_entry);