1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
2 /*
3 * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
4 *
5 * author:
6 * Alpha Lin, alpha.lin@rock-chips.com
7 * Randy Li, randy.li@rock-chips.com
8 * Ding Wei, leo.ding@rock-chips.com
9 *
10 */
11 #ifndef __ROCKCHIP_MPP_COMMON_H__
12 #define __ROCKCHIP_MPP_COMMON_H__
13
14 #include <linux/cdev.h>
15 #include <linux/clk.h>
16 #include <linux/dma-buf.h>
17 #include <linux/kfifo.h>
18 #include <linux/types.h>
19 #include <linux/time.h>
20 #include <linux/workqueue.h>
21 #include <linux/kthread.h>
22 #include <linux/reset.h>
23 #include <linux/irqreturn.h>
24 #include <linux/poll.h>
25
26 #define FILE_RIGHT_644 0644
27 #define FILE_RIGHT_444 0444
28
29 #define MHZ (1000 * 1000)
30
31 #define MPP_MAX_MSG_NUM (16)
32 #define MPP_MAX_REG_TRANS_NUM (60)
33 #define MPP_MAX_TASK_CAPACITY (16)
34 /* define flags for mpp_request */
35 #define MPP_FLAGS_MULTI_MSG (0x00000001)
36 #define MPP_FLAGS_LAST_MSG (0x00000002)
37 #define MPP_FLAGS_REG_FD_NO_TRANS (0x00000004)
38 #define MPP_FLAGS_SCL_FD_NO_TRANS (0x00000008)
39 #define MPP_FLAGS_REG_NO_OFFSET (0x00000010)
40 #define MPP_FLAGS_SECURE_MODE (0x00010000)
41
42 /* grf mask for get value */
43 #define MPP_GRF_VAL_MASK (0xFFFF)
44
45 /* max 4 cores supported */
46 #define MPP_MAX_CORE_NUM (4)
47
48 /* define some value begin */
49 #define FILE_PERMISSION_VALUE (0644)
50 #define STATE_BUS (2)
51 #define THERMAL_DIV_VALUE (4)
52 #define DEVIATION_TWF (12)
53 #define TEMPERATURE_COEFFICIENT_TH (1000)
54 #define TEMPERATURE_COEFFICIENT_BL (1000000)
55 #define DEVIATION_TWY (20)
56 #define DEVIATION_TEN (10)
57 #define FMT_264D_CODING_PPS_COUNT (256)
58 #define FMT_264D_CODING_PPS_SIZE (32)
59 #define FMT_264D_ADDR_OFFSET (23)
60 #define FMT_265D_CODING_PPS_COUNT (64)
61 #define FMT_265D_CODING_PPS_SIZE (80)
62 #define FMT_265D_ADDR_OFFSET (74)
63 #define CLK_MODE_TW (200)
64 #define CLK_MODE_THR (300)
65 #define MPP_USER __user
66 enum TEMP_DIV {
67 TEMP_ORIGIN = 0,
68 TEMP_SQUARED,
69 TEMP_CUBED,
70 TEMP_SALING_FACTORY,
71 };
72 /* define some value end */
73
74 /**
75 * Device type: classified by hardware feature
76 */
77 enum MPP_DEVICE_TYPE {
78 MPP_DEVICE_VDPU1 = 0, /* 0x00000001 */
79 MPP_DEVICE_VDPU2 = 1, /* 0x00000002 */
80 MPP_DEVICE_VDPU1_PP = 2, /* 0x00000004 */
81 MPP_DEVICE_VDPU2_PP = 3, /* 0x00000008 */
82
83 MPP_DEVICE_HEVC_DEC = 8, /* 0x00000100 */
84 MPP_DEVICE_RKVDEC = 9, /* 0x00000200 */
85 MPP_DEVICE_AVSPLUS_DEC = 12, /* 0x00001000 */
86 MPP_DEVICE_JPGDEC = 13, /* 0x00002000 */
87
88 MPP_DEVICE_RKVENC = 16, /* 0x00010000 */
89 MPP_DEVICE_VEPU1 = 17, /* 0x00020000 */
90 MPP_DEVICE_VEPU2 = 18, /* 0x00040000 */
91 MPP_DEVICE_VEPU22 = 24, /* 0x01000000 */
92
93 MPP_DEVICE_IEP2 = 28, /* 0x10000000 */
94 MPP_DEVICE_BUTT,
95 };
96
97 /**
98 * Driver type: classified by driver
99 */
100 enum MPP_DRIVER_TYPE {
101 MPP_DRIVER_NULL = 0,
102 MPP_DRIVER_VDPU1,
103 MPP_DRIVER_VEPU1,
104 MPP_DRIVER_VDPU2,
105 MPP_DRIVER_VEPU2,
106 MPP_DRIVER_VEPU22,
107 MPP_DRIVER_RKVDEC,
108 MPP_DRIVER_RKVENC,
109 MPP_DRIVER_IEP,
110 MPP_DRIVER_IEP2,
111 MPP_DRIVER_JPGDEC,
112 MPP_DRIVER_RKVDEC2,
113 MPP_DRIVER_RKVENC2,
114 MPP_DRIVER_BUTT,
115 };
116
117 /**
118 * Command type: keep the same as user space
119 */
120 enum MPP_DEV_COMMAND_TYPE {
121 MPP_CMD_QUERY_BASE = 0,
122 MPP_CMD_QUERY_HW_SUPPORT = MPP_CMD_QUERY_BASE + 0,
123 MPP_CMD_QUERY_HW_ID = MPP_CMD_QUERY_BASE + 1,
124 MPP_CMD_QUERY_CMD_SUPPORT = MPP_CMD_QUERY_BASE + 2,
125 MPP_CMD_QUERY_BUTT,
126
127 MPP_CMD_INIT_BASE = 0x100,
128 MPP_CMD_INIT_CLIENT_TYPE = MPP_CMD_INIT_BASE + 0,
129 MPP_CMD_INIT_DRIVER_DATA = MPP_CMD_INIT_BASE + 1,
130 MPP_CMD_INIT_TRANS_TABLE = MPP_CMD_INIT_BASE + 2,
131 MPP_CMD_INIT_BUTT,
132
133 MPP_CMD_SEND_BASE = 0x200,
134 MPP_CMD_SET_REG_WRITE = MPP_CMD_SEND_BASE + 0,
135 MPP_CMD_SET_REG_READ = MPP_CMD_SEND_BASE + 1,
136 MPP_CMD_SET_REG_ADDR_OFFSET = MPP_CMD_SEND_BASE + 2,
137 MPP_CMD_SET_RCB_INFO = MPP_CMD_SEND_BASE + 3,
138 MPP_CMD_SEND_BUTT,
139
140 MPP_CMD_POLL_BASE = 0x300,
141 MPP_CMD_POLL_HW_FINISH = MPP_CMD_POLL_BASE + 0,
142 MPP_CMD_POLL_BUTT,
143
144 MPP_CMD_CONTROL_BASE = 0x400,
145 MPP_CMD_RESET_SESSION = MPP_CMD_CONTROL_BASE + 0,
146 MPP_CMD_TRANS_FD_TO_IOVA = MPP_CMD_CONTROL_BASE + 1,
147 MPP_CMD_RELEASE_FD = MPP_CMD_CONTROL_BASE + 2,
148 MPP_CMD_SEND_CODEC_INFO = MPP_CMD_CONTROL_BASE + 3,
149 MPP_CMD_CONTROL_BUTT,
150
151 MPP_CMD_BUTT,
152 };
153
154 enum MPP_CLOCK_MODE {
155 CLK_MODE_BASE = 0,
156 CLK_MODE_DEFAULT = CLK_MODE_BASE,
157 CLK_MODE_DEBUG,
158 CLK_MODE_REDUCE,
159 CLK_MODE_NORMAL,
160 CLK_MODE_ADVANCED,
161 CLK_MODE_BUTT,
162 };
163
164 enum MPP_RESET_TYPE {
165 RST_TYPE_BASE = 0,
166 RST_TYPE_A = RST_TYPE_BASE,
167 RST_TYPE_H,
168 RST_TYPE_NIU_A,
169 RST_TYPE_NIU_H,
170 RST_TYPE_CORE,
171 RST_TYPE_CABAC,
172 RST_TYPE_HEVC_CABAC,
173 RST_TYPE_BUTT,
174 };
175
176 enum ENC_INFO_TYPE {
177 ENC_INFO_BASE = 0,
178 ENC_INFO_WIDTH,
179 ENC_INFO_HEIGHT,
180 ENC_INFO_FORMAT,
181 ENC_INFO_FPS_IN,
182 ENC_INFO_FPS_OUT,
183 ENC_INFO_RC_MODE,
184 ENC_INFO_BITRATE,
185 ENC_INFO_GOP_SIZE,
186 ENC_INFO_FPS_CALC,
187 ENC_INFO_PROFILE,
188
189 ENC_INFO_BUTT,
190 };
191
192 enum DEC_INFO_TYPE {
193 DEC_INFO_BASE = 0,
194 DEC_INFO_WIDTH,
195 DEC_INFO_HEIGHT,
196 DEC_INFO_FORMAT,
197 DEC_INFO_BITDEPTH,
198 DEC_INFO_FPS,
199
200 DEC_INFO_BUTT,
201 };
202
203 enum CODEC_INFO_FLAGS {
204 CODEC_INFO_FLAG_NULL = 0,
205 CODEC_INFO_FLAG_NUMBER,
206 CODEC_INFO_FLAG_STRING,
207
208 CODEC_INFO_FLAG_BUTT,
209 };
210
211 /* data common struct for parse out */
212 struct mpp_request {
213 __u32 cmd;
214 __u32 flags;
215 __u32 size;
216 __u32 offset;
217 void __user *data;
218 };
219
220 /* struct use to collect task set and poll message */
221 struct mpp_task_msgs {
222 u32 flags;
223 u32 req_cnt;
224 struct mpp_request reqs[MPP_MAX_MSG_NUM];
225 u32 set_cnt;
226 u32 poll_cnt;
227 };
228
229 struct mpp_grf_info {
230 u32 offset;
231 u32 val;
232 struct regmap *grf;
233 };
234
235 /**
236 * struct for hardware info
237 */
238 struct mpp_hw_info {
239 /* register number */
240 u32 reg_num;
241 /* hardware id */
242 int reg_id;
243 u32 hw_id;
244 /* start index of register */
245 u32 reg_start;
246 /* end index of register */
247 u32 reg_end;
248 /* register of enable hardware */
249 int reg_en;
250 };
251
252 struct mpp_trans_info {
253 const int count;
254 const u16 *const table;
255 };
256
257 struct reg_offset_elem {
258 u32 index;
259 u32 offset;
260 };
261
262 struct reg_offset_info {
263 u32 cnt;
264 struct reg_offset_elem elem[MPP_MAX_REG_TRANS_NUM];
265 };
266
267 struct codec_info_elem {
268 __u32 type;
269 __u32 flag;
270 __u64 data;
271 };
272
273 struct mpp_clk_info {
274 struct clk *clk;
275
276 /* debug rate, from debug */
277 u32 debug_rate_hz;
278 /* normal rate, from dtsi */
279 u32 normal_rate_hz;
280 /* high performance rate, from dtsi */
281 u32 advanced_rate_hz;
282
283 u32 default_rate_hz;
284 u32 reduce_rate_hz;
285 /* record last used rate */
286 u32 used_rate_hz;
287 };
288
289 struct mpp_dev_var {
290 enum MPP_DEVICE_TYPE device_type;
291
292 /* info for each hardware */
293 struct mpp_hw_info *hw_info;
294 struct mpp_trans_info *trans_info;
295 struct mpp_hw_ops *hw_ops;
296 struct mpp_dev_ops *dev_ops;
297 };
298
299 struct mpp_mem_region {
300 struct list_head reg_link;
301 /* address for iommu */
302 dma_addr_t iova;
303 unsigned long len;
304 u32 reg_idx;
305 void *hdl;
306 int fd;
307 /* whether is dup import entity */
308 bool is_dup;
309 };
310
311 struct mpp_dma_session;
312
313 struct mpp_taskqueue;
314
315 struct mpp_dev {
316 struct device *dev;
317 const struct mpp_dev_var *var;
318 struct mpp_hw_ops *hw_ops;
319 struct mpp_dev_ops *dev_ops;
320
321 /* per-device work for attached taskqueue */
322 struct kthread_work work;
323 /* the flag for get/get/reduce freq */
324 bool auto_freq_en;
325
326 /*
327 * The task capacity is the task queue length that hardware can accept.
328 * Default 1 means normal hardware can only accept one task at once.
329 */
330 u32 task_capacity;
331
332 int irq;
333 u32 irq_status;
334
335 void __iomem *reg_base;
336 struct mpp_grf_info *grf_info;
337 struct mpp_iommu_info *iommu_info;
338
339 atomic_t reset_request;
340 atomic_t session_index;
341 atomic_t task_count;
342 atomic_t task_index;
343 /* current task in running */
344 struct mpp_task *cur_task;
345 /* set session max buffers */
346 u32 session_max_buffers;
347 struct mpp_taskqueue *queue;
348 struct mpp_reset_group *reset_group;
349 /* point to MPP Service */
350 struct platform_device *pdev_srv;
351 struct mpp_service *srv;
352
353 /* multi-core data */
354 struct list_head queue_link;
355 s32 core_id;
356 };
357
358 struct mpp_task;
359
360 struct mpp_session {
361 enum MPP_DEVICE_TYPE device_type;
362 u32 index;
363 /* the session related device private data */
364 struct mpp_service *srv;
365 struct mpp_dev *mpp;
366 struct mpp_dma_session *dma;
367
368 /* lock for session task pending list */
369 struct mutex pending_lock;
370 /* task pending list in session */
371 struct list_head pending_list;
372
373 pid_t pid;
374 atomic_t task_count;
375 atomic_t release_request;
376 /* trans info set by user */
377 int trans_count;
378 u16 trans_table[MPP_MAX_REG_TRANS_NUM];
379 u32 msg_flags;
380 /* link to mpp_service session_list */
381 struct list_head service_link;
382 /* link to mpp_workqueue session_attach / session_detach */
383 struct list_head session_link;
384 /* private data */
385 void *priv;
386
387 /*
388 * session handler from mpp_dev_ops
389 * process_task - handle messages of sending task
390 * wait_result - handle messages of polling task
391 * deinit - handle session deinit
392 */
393 int (*process_task)(struct mpp_session *session, struct mpp_task_msgs *msgs);
394 int (*wait_result)(struct mpp_session *session, struct mpp_task_msgs *msgs);
395 void (*deinit)(struct mpp_session *session);
396 };
397
398 /* task state in work thread */
399 enum mpp_task_state {
400 TASK_STATE_PENDING = 0,
401 TASK_STATE_RUNNING = 1,
402 TASK_STATE_START = 2,
403 TASK_STATE_HANDLE = 3,
404 TASK_STATE_IRQ = 4,
405 TASK_STATE_FINISH = 5,
406 TASK_STATE_TIMEOUT = 6,
407 TASK_STATE_DONE = 7,
408
409 TASK_STATE_PREPARE = 8,
410 TASK_STATE_ABORT = 9,
411 TASK_STATE_ABORT_READY = 10,
412 TASK_STATE_PROC_DONE = 11,
413 };
414
415 /* The context for the a task */
416 struct mpp_task {
417 /* context belong to */
418 struct mpp_session *session;
419
420 /* link to pending list in session */
421 struct list_head pending_link;
422 /* link to done list in session */
423 struct list_head done_link;
424 /* link to list in taskqueue */
425 struct list_head queue_link;
426 /* The DMA buffer used in this task */
427 struct list_head mem_region_list;
428 u32 mem_count;
429 struct mpp_mem_region mem_regions[MPP_MAX_REG_TRANS_NUM];
430
431 /* state in the taskqueue */
432 unsigned long state;
433 atomic_t abort_request;
434 /* delayed work for hardware timeout */
435 struct delayed_work timeout_work;
436 struct kref ref;
437
438 /* record context running start time */
439 struct timespec64 start;
440 /* hardware info for current task */
441 struct mpp_hw_info *hw_info;
442 u32 task_index;
443 u32 *reg;
444 /* event for session wait thread */
445 wait_queue_head_t wait;
446
447 /* for multi-core */
448 struct mpp_dev *mpp;
449 s32 core_id;
450 };
451
452 struct mpp_taskqueue {
453 /* kworker for attached taskqueue */
454 struct kthread_worker worker;
455 /* task for work queue */
456 struct task_struct *kworker_task;
457
458 /* lock for session attach and session_detach */
459 struct mutex session_lock;
460 /* link to session session_link for attached sessions */
461 struct list_head session_attach;
462 /* link to session session_link for detached sessions */
463 struct list_head session_detach;
464 u32 detach_count;
465
466 /* lock for pending list */
467 struct mutex pending_lock;
468 struct list_head pending_list;
469 /* lock for running list */
470 spinlock_t running_lock;
471 struct list_head running_list;
472
473 /* point to MPP Service */
474 struct mpp_service *srv;
475 /* lock for mmu list */
476 struct mutex mmu_lock;
477 struct list_head mmu_list;
478 /* lock for dev list */
479 struct mutex dev_lock;
480 struct list_head dev_list;
481 /*
482 * task_capacity in taskqueue is the minimum task capacity of the
483 * device task capacity which is attached to the taskqueue
484 */
485 u32 task_capacity;
486
487 /* multi-core task distribution */
488 atomic_t reset_request;
489 struct mpp_dev *cores[MPP_MAX_CORE_NUM];
490 unsigned long core_idle;
491 u32 core_count;
492 };
493
494 struct mpp_reset_group {
495 /* the flag for whether use rw_sem */
496 u32 rw_sem_on;
497 struct rw_semaphore rw_sem;
498 struct reset_control *resets[RST_TYPE_BUTT];
499 /* for set rw_sem */
500 struct mpp_taskqueue *queue;
501 };
502
503 struct mpp_service {
504 struct class *cls;
505 struct device *dev;
506 dev_t dev_id;
507 struct cdev mpp_cdev;
508 struct device *child_dev;
509 #ifdef CONFIG_ROCKCHIP_MPP_PROC_FS
510 struct proc_dir_entry *procfs;
511 #endif
512 unsigned long hw_support;
513 atomic_t shutdown_request;
514 /* follows for device probe */
515 struct mpp_grf_info grf_infos[MPP_DRIVER_BUTT];
516 struct platform_driver *sub_drivers[MPP_DRIVER_BUTT];
517 /* follows for attach service */
518 struct mpp_dev *sub_devices[MPP_DEVICE_BUTT];
519 u32 taskqueue_cnt;
520 struct mpp_taskqueue *task_queues[MPP_DEVICE_BUTT];
521 u32 reset_group_cnt;
522 struct mpp_reset_group *reset_groups[MPP_DEVICE_BUTT];
523
524 /* lock for session list */
525 struct mutex session_lock;
526 struct list_head session_list;
527 u32 session_count;
528 };
529
530 /*
531 * struct mpp_hw_ops - context specific operations for device
532 * @init Do something when hardware probe.
533 * @exit Do something when hardware remove.
534 * @clk_on Enable clocks.
535 * @clk_off Disable clocks.
536 * @get_freq Get special freq for setting.
537 * @set_freq Set freq to hardware.
538 * @reduce_freq Reduce freq when hardware is not running.
539 * @reset When error, reset hardware.
540 */
541 struct mpp_hw_ops {
542 int (*init)(struct mpp_dev *mpp);
543 int (*exit)(struct mpp_dev *mpp);
544 int (*clk_on)(struct mpp_dev *mpp);
545 int (*clk_off)(struct mpp_dev *mpp);
546 int (*get_freq)(struct mpp_dev *mpp, struct mpp_task *mpp_task);
547 int (*set_freq)(struct mpp_dev *mpp, struct mpp_task *mpp_task);
548 int (*reduce_freq)(struct mpp_dev *mpp);
549 int (*reset)(struct mpp_dev *mpp);
550 int (*set_grf)(struct mpp_dev *mpp);
551 };
552
553 /*
554 * struct mpp_dev_ops - context specific operations for task
555 * @alloc_task Alloc and set task.
556 * @prepare Check HW status for determining run next task or not.
557 * @run Start a single {en,de}coding run. Set registers to hardware.
558 * @irq Deal with hardware interrupt top-half.
559 * @isr Deal with hardware interrupt bottom-half.
560 * @finish Read back processing results and additional data from hardware.
561 * @result Read status to userspace.
562 * @free_task Release the resource allocate which alloc.
563 * @ioctl Special cammand from userspace.
564 * @init_session extra initialization on session init.
565 * @free_session extra cleanup on session deinit.
566 * @dump_session information dump for session.
567 * @dump_dev information dump for hardware device.
568 */
569 struct mpp_dev_ops {
570 int (*process_task)(struct mpp_session *session, struct mpp_task_msgs *msgs);
571 int (*wait_result)(struct mpp_session *session, struct mpp_task_msgs *msgs);
572 void (*deinit)(struct mpp_session *session);
573 void (*task_worker)(struct kthread_work *work_s);
574
575 void *(*alloc_task)(struct mpp_session *session, struct mpp_task_msgs *msgs);
576 void *(*prepare)(struct mpp_dev *mpp, struct mpp_task *task);
577 int (*run)(struct mpp_dev *mpp, struct mpp_task *task);
578 int (*irq)(struct mpp_dev *mpp);
579 int (*isr)(struct mpp_dev *mpp);
580 int (*finish)(struct mpp_dev *mpp, struct mpp_task *task);
581 int (*result)(struct mpp_dev *mpp, struct mpp_task *task, struct mpp_task_msgs *msgs);
582 int (*free_task)(struct mpp_session *session, struct mpp_task *task);
583 int (*ioctl)(struct mpp_session *session, struct mpp_request *req);
584 int (*init_session)(struct mpp_session *session);
585 int (*free_session)(struct mpp_session *session);
586 int (*dump_session)(struct mpp_session *session, struct seq_file *seq);
587 int (*dump_dev)(struct mpp_dev *mpp);
588 };
589
590 struct mpp_taskqueue *mpp_taskqueue_init(struct device *dev);
591
592 struct mpp_mem_region *mpp_task_attach_fd(struct mpp_task *task, int fd);
593 int mpp_translate_reg_address(struct mpp_session *session, struct mpp_task *task, int fmt, u32 *reg,
594 struct reg_offset_info *off_inf);
595
596 int mpp_check_req(struct mpp_request *req, int base, int max_size, u32 off_s, u32 off_e);
597 int mpp_extract_reg_offset_info(struct reg_offset_info *off_inf, struct mpp_request *req);
598 int mpp_query_reg_offset_info(struct reg_offset_info *off_inf, u32 index);
599 int mpp_translate_reg_offset_info(struct mpp_task *task, struct reg_offset_info *off_inf, u32 *reg);
600 int mpp_task_init(struct mpp_session *session, struct mpp_task *task);
601 int mpp_task_finish(struct mpp_session *session, struct mpp_task *task);
602 int mpp_task_finalize(struct mpp_session *session, struct mpp_task *task);
603 int mpp_task_dump_mem_region(struct mpp_dev *mpp, struct mpp_task *task);
604 int mpp_task_dump_reg(struct mpp_dev *mpp, struct mpp_task *task);
605 int mpp_task_dump_hw_reg(struct mpp_dev *mpp, struct mpp_task *task);
606 void mpp_free_task(struct kref *ref);
607
608 int mpp_session_deinit(struct mpp_session *session);
609
610 int mpp_dev_probe(struct mpp_dev *mpp, struct platform_device *pdev);
611 int mpp_dev_remove(struct mpp_dev *mpp);
612 int mpp_dev_register_srv(struct mpp_dev *mpp, struct mpp_service *srv);
613
614 int mpp_power_on(struct mpp_dev *mpp);
615 int mpp_power_off(struct mpp_dev *mpp);
616 int mpp_dev_reset(struct mpp_dev *mpp);
617
618 irqreturn_t mpp_dev_irq(int irq, void *param);
619 irqreturn_t mpp_dev_isr_sched(int irq, void *param);
620
621 struct reset_control *mpp_reset_control_get(struct mpp_dev *mpp, enum MPP_RESET_TYPE type, const char *name);
622
623 u32 mpp_get_grf(struct mpp_grf_info *grf_info);
624 bool mpp_grf_is_changed(struct mpp_grf_info *grf_info);
625 int mpp_set_grf(struct mpp_grf_info *grf_info);
626
627 int mpp_time_record(struct mpp_task *task);
628 int mpp_time_diff(struct mpp_task *task);
629
630 int mpp_write_req(struct mpp_dev *mpp, u32 *regs, u32 start_idx, u32 end_idx, u32 en_idx);
631 int mpp_read_req(struct mpp_dev *mpp, u32 *regs, u32 start_idx, u32 end_idx);
632
633 int mpp_get_clk_info(struct mpp_dev *mpp, struct mpp_clk_info *clk_info, const char *name);
634 int mpp_set_clk_info_rate_hz(struct mpp_clk_info *clk_info, enum MPP_CLOCK_MODE mode, unsigned long val);
635 unsigned long mpp_get_clk_info_rate_hz(struct mpp_clk_info *clk_info, enum MPP_CLOCK_MODE mode);
636 int mpp_clk_set_rate(struct mpp_clk_info *clk_info, enum MPP_CLOCK_MODE mode);
637
mpp_write(struct mpp_dev * mpp,u32 reg,u32 val)638 static inline int mpp_write(struct mpp_dev *mpp, u32 reg, u32 val)
639 {
640 int idx = reg / sizeof(u32);
641
642 mpp_debug(DEBUG_SET_REG, "write reg[%03d]: %04x: 0x%08x\n", idx, reg, val);
643 writel(val, mpp->reg_base + reg);
644
645 return 0;
646 }
647
mpp_write_relaxed(struct mpp_dev * mpp,u32 reg,u32 val)648 static inline int mpp_write_relaxed(struct mpp_dev *mpp, u32 reg, u32 val)
649 {
650 int idx = reg / sizeof(u32);
651
652 mpp_debug(DEBUG_SET_REG, "write reg[%03d]: %04x: 0x%08x\n", idx, reg, val);
653 writel_relaxed(val, mpp->reg_base + reg);
654
655 return 0;
656 }
657
mpp_read(struct mpp_dev * mpp,u32 reg)658 static inline u32 mpp_read(struct mpp_dev *mpp, u32 reg)
659 {
660 u32 val = 0;
661 int idx = reg / sizeof(u32);
662
663 val = readl(mpp->reg_base + reg);
664 mpp_debug(DEBUG_GET_REG, "read reg[%03d]: %04x: 0x%08x\n", idx, reg, val);
665
666 return val;
667 }
668
mpp_read_relaxed(struct mpp_dev * mpp,u32 reg)669 static inline u32 mpp_read_relaxed(struct mpp_dev *mpp, u32 reg)
670 {
671 u32 val = 0;
672 int idx = reg / sizeof(u32);
673
674 val = readl_relaxed(mpp->reg_base + reg);
675 mpp_debug(DEBUG_GET_REG, "read reg[%03d] %04x: 0x%08x\n", idx, reg, val);
676
677 return val;
678 }
679
mpp_safe_reset(struct reset_control * rst)680 static inline int mpp_safe_reset(struct reset_control *rst)
681 {
682 if (rst) {
683 reset_control_assert(rst);
684 }
685
686 return 0;
687 }
688
mpp_safe_unreset(struct reset_control * rst)689 static inline int mpp_safe_unreset(struct reset_control *rst)
690 {
691 if (rst) {
692 reset_control_deassert(rst);
693 }
694
695 return 0;
696 }
697
mpp_clk_safe_enable(struct clk * clk)698 static inline int mpp_clk_safe_enable(struct clk *clk)
699 {
700 if (clk) {
701 clk_prepare_enable(clk);
702 }
703
704 return 0;
705 }
706
mpp_clk_safe_disable(struct clk * clk)707 static inline int mpp_clk_safe_disable(struct clk *clk)
708 {
709 if (clk) {
710 clk_disable_unprepare(clk);
711 }
712
713 return 0;
714 }
715
mpp_reset_down_read(struct mpp_reset_group * group)716 static inline int mpp_reset_down_read(struct mpp_reset_group *group)
717 {
718 if (group && group->rw_sem_on) {
719 down_read(&group->rw_sem);
720 }
721
722 return 0;
723 }
724
mpp_reset_up_read(struct mpp_reset_group * group)725 static inline int mpp_reset_up_read(struct mpp_reset_group *group)
726 {
727 if (group && group->rw_sem_on) {
728 up_read(&group->rw_sem);
729 }
730
731 return 0;
732 }
733
mpp_reset_down_write(struct mpp_reset_group * group)734 static inline int mpp_reset_down_write(struct mpp_reset_group *group)
735 {
736 if (group && group->rw_sem_on) {
737 down_write(&group->rw_sem);
738 }
739
740 return 0;
741 }
742
mpp_reset_up_write(struct mpp_reset_group * group)743 static inline int mpp_reset_up_write(struct mpp_reset_group *group)
744 {
745 if (group && group->rw_sem_on) {
746 up_write(&group->rw_sem);
747 }
748
749 return 0;
750 }
751
752 #ifdef CONFIG_ROCKCHIP_MPP_PROC_FS
753 struct proc_dir_entry *mpp_procfs_create_u32(const char *name, umode_t mode, struct proc_dir_entry *parent, void *data);
754 #else
mpp_procfs_create_u32(const char * name,umode_t mode,struct proc_dir_entry * parent,void * data)755 static inline struct proc_dir_entry *mpp_procfs_create_u32(const char *name, umode_t mode,
756 struct proc_dir_entry *parent, void *data)
757 {
758 return 0;
759 }
760 #endif
761
762 #ifdef CONFIG_ROCKCHIP_MPP_PROC_FS
763 extern const char *mpp_device_name[MPP_DEVICE_BUTT];
764 extern const char *enc_info_item_name[ENC_INFO_BUTT];
765 #endif
766
767 extern const struct file_operations rockchip_mpp_fops;
768
769 extern struct platform_driver rockchip_rkvdec_driver;
770 extern struct platform_driver rockchip_rkvenc_driver;
771 extern struct platform_driver rockchip_vdpu1_driver;
772 extern struct platform_driver rockchip_vepu1_driver;
773 extern struct platform_driver rockchip_vdpu2_driver;
774 extern struct platform_driver rockchip_vepu2_driver;
775 extern struct platform_driver rockchip_vepu22_driver;
776 extern struct platform_driver rockchip_iep2_driver;
777 extern struct platform_driver rockchip_jpgdec_driver;
778 extern struct platform_driver rockchip_rkvdec2_driver;
779 extern struct platform_driver rockchip_rkvenc2_driver;
780
781 #endif
782