1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __MACH_ROCKCHIP_GRF_H 3 #define __MACH_ROCKCHIP_GRF_H 4 5 #define RK3188_GRF_GPIO0L_DIR 0x0000 6 #define RK3188_GRF_GPIO0H_DIR 0x0004 7 #define RK3188_GRF_GPIO1L_DIR 0x0008 8 #define RK3188_GRF_GPIO1H_DIR 0x000c 9 #define RK3188_GRF_GPIO2L_DIR 0x0010 10 #define RK3188_GRF_GPIO2H_DIR 0x0014 11 #define RK3188_GRF_GPIO3L_DIR 0x0018 12 #define RK3188_GRF_GPIO3H_DIR 0x001c 13 #define RK3188_GRF_GPIO0L_DO 0x0020 14 #define RK3188_GRF_GPIO0H_DO 0x0024 15 #define RK3188_GRF_GPIO1L_DO 0x0028 16 #define RK3188_GRF_GPIO1H_DO 0x002c 17 #define RK3188_GRF_GPIO2L_DO 0x0030 18 #define RK3188_GRF_GPIO2H_DO 0x0034 19 #define RK3188_GRF_GPIO3L_DO 0x0038 20 #define RK3188_GRF_GPIO3H_DO 0x003c 21 #define RK3188_GRF_GPIO0L_EN 0x0040 22 #define RK3188_GRF_GPIO0H_EN 0x0044 23 #define RK3188_GRF_GPIO1L_EN 0x0048 24 #define RK3188_GRF_GPIO1H_EN 0x004c 25 #define RK3188_GRF_GPIO2L_EN 0x0050 26 #define RK3188_GRF_GPIO2H_EN 0x0054 27 #define RK3188_GRF_GPIO3L_EN 0x0058 28 #define RK3188_GRF_GPIO3H_EN 0x005c 29 30 #define RK3188_GRF_GPIO0C_IOMUX 0x0068 31 #define RK3188_GRF_GPIO0D_IOMUX 0x006c 32 #define RK3188_GRF_GPIO1A_IOMUX 0x0070 33 #define RK3188_GRF_GPIO1B_IOMUX 0x0074 34 #define RK3188_GRF_GPIO1C_IOMUX 0x0078 35 #define RK3188_GRF_GPIO1D_IOMUX 0x007c 36 #define RK3188_GRF_GPIO2A_IOMUX 0x0080 37 #define RK3188_GRF_GPIO2B_IOMUX 0x0084 38 #define RK3188_GRF_GPIO2C_IOMUX 0x0088 39 #define RK3188_GRF_GPIO2D_IOMUX 0x008c 40 #define RK3188_GRF_GPIO3A_IOMUX 0x0090 41 #define RK3188_GRF_GPIO3B_IOMUX 0x0094 42 #define RK3188_GRF_GPIO3C_IOMUX 0x0098 43 #define RK3188_GRF_GPIO3D_IOMUX 0x009c 44 #define RK3188_GRF_SOC_CON0 0x00a0 45 #define RK3188_GRF_SOC_CON1 0x00a4 46 #define RK3188_GRF_SOC_CON2 0x00a8 47 #define RK3188_GRF_SOC_STATUS0 0x00ac 48 #define RK3188_GRF_DMAC1_CON0 0x00b0 49 #define RK3188_GRF_DMAC1_CON1 0x00b4 50 #define RK3188_GRF_DMAC1_CON2 0x00b8 51 #define RK3188_GRF_DMAC2_CON0 0x00bc 52 #define RK3188_GRF_DMAC2_CON1 0x00c0 53 #define RK3188_GRF_DMAC2_CON2 0x00c4 54 #define RK3188_GRF_DMAC2_CON3 0x00c8 55 #define RK3188_GRF_CPU_CON0 0x00cc 56 #define RK3188_GRF_CPU_CON1 0x00d0 57 #define RK3188_GRF_CPU_CON2 0x00d4 58 #define RK3188_GRF_CPU_CON3 0x00d8 59 #define RK3188_GRF_CPU_CON4 0x00dc 60 #define RK3188_GRF_CPU_CON5 0x00e0 61 62 #define RK3188_GRF_DDRC_CON0 0x00ec 63 #define RK3188_GRF_DDRC_STAT 0x00f0 64 #define RK3188_GRF_IO_CON0 0x00f4 65 #define RK3188_GRF_IO_CON1 0x00f8 66 #define RK3188_GRF_IO_CON2 0x00fc 67 #define RK3188_GRF_IO_CON3 0x0100 68 #define RK3188_GRF_IO_CON4 0x0104 69 #define RK3188_GRF_SOC_STATUS1 0x0108 70 #define RK3188_GRF_UOC0_CON0 0x010c 71 #define RK3188_GRF_UOC0_CON1 0x0110 72 #define RK3188_GRF_UOC0_CON2 0x0114 73 #define RK3188_GRF_UOC0_CON3 0x0118 74 #define RK3188_GRF_UOC1_CON0 0x011c 75 #define RK3188_GRF_UOC1_CON1 0x0120 76 #define RK3188_GRF_UOC1_CON2 0x0124 77 #define RK3188_GRF_UOC1_CON3 0x0128 78 #define RK3188_GRF_UOC2_CON0 0x012c 79 #define RK3188_GRF_UOC2_CON1 0x0130 80 81 #define RK3188_GRF_UOC3_CON0 0x0138 82 #define RK3188_GRF_UOC3_CON1 0x013c 83 #define RK3188_GRF_EHCI_STAT 0x0140 84 #define RK3188_GRF_OS_REG0 0x0144 85 #define RK3188_GRF_OS_REG1 0x0148 86 #define RK3188_GRF_OS_REG2 0x014c 87 #define RK3188_GRF_OS_REG3 0x0150 88 #define RK3188_GRF_OS_REG4 0x0154 89 #define RK3188_GRF_OS_REG5 0x0158 90 #define RK3188_GRF_OS_REG6 0x015c 91 #define RK3188_GRF_OS_REG7 0x0160 92 #define RK3188_GRF_GPIO0B_PULL 0x0164 93 #define RK3188_GRF_GPIO0C_PULL 0x0168 94 #define RK3188_GRF_GPIO0D_PULL 0x016c 95 #define RK3188_GRF_GPIO1A_PULL 0x0170 96 #define RK3188_GRF_GPIO1B_PULL 0x0174 97 #define RK3188_GRF_GPIO1C_PULL 0x0178 98 #define RK3188_GRF_GPIO1D_PULL 0x017c 99 #define RK3188_GRF_GPIO2A_PULL 0x0180 100 #define RK3188_GRF_GPIO2B_PULL 0x0184 101 #define RK3188_GRF_GPIO2C_PULL 0x0188 102 #define RK3188_GRF_GPIO2D_PULL 0x018c 103 #define RK3188_GRF_GPIO3A_PULL 0x0190 104 #define RK3188_GRF_GPIO3B_PULL 0x0194 105 #define RK3188_GRF_GPIO3C_PULL 0x0198 106 #define RK3188_GRF_GPIO3D_PULL 0x019c 107 #define RK3188_GRF_FLASH_DATA_PULL 0x01a0 108 #define RK3188_GRF_FLASH_CMD_PULL 0x01a4 109 110 111 #define RK3288_GRF_GPIO0_A_IOMUX 0x0084 112 #define RK3288_GRF_GPIO0_B_IOMUX 0x0088 113 #define RK3288_GRF_GPIO0_C_IOMUX 0x008c 114 115 #define RK3288_GRF_GPIO1D_IOMUX 0x000c 116 #define RK3288_GRF_GPIO2A_IOMUX 0x0010 117 #define RK3288_GRF_GPIO2B_IOMUX 0x0014 118 #define RK3288_GRF_GPIO2C_IOMUX 0x0018 119 120 #define RK3288_GRF_GPIO3A_IOMUX 0x0020 121 #define RK3288_GRF_GPIO3B_IOMUX 0x0024 122 #define RK3288_GRF_GPIO3C_IOMUX 0x0028 123 #define RK3288_GRF_GPIO3DL_IOMUX 0x002c 124 #define RK3288_GRF_GPIO3DH_IOMUX 0x0030 125 #define RK3288_GRF_GPIO4AL_IOMUX 0x0034 126 #define RK3288_GRF_GPIO4AH_IOMUX 0x0038 127 #define RK3288_GRF_GPIO4BL_IOMUX 0x003c 128 129 #define RK3288_GRF_GPIO4C_IOMUX 0x0044 130 #define RK3288_GRF_GPIO4D_IOMUX 0x0048 131 132 #define RK3288_GRF_GPIO5B_IOMUX 0x0050 133 #define RK3288_GRF_GPIO5C_IOMUX 0x0054 134 135 #define RK3288_GRF_GPIO6A_IOMUX 0x005c 136 #define RK3288_GRF_GPIO6B_IOMUX 0x0060 137 #define RK3288_GRF_GPIO6C_IOMUX 0x0064 138 139 #define RK3288_GRF_GPIO7A_IOMUX 0x006c 140 #define RK3288_GRF_GPIO7B_IOMUX 0x0070 141 #define RK3288_GRF_GPIO7CL_IOMUX 0x0074 142 #define RK3288_GRF_GPIO7CH_IOMUX 0x0078 143 144 #define RK3288_GRF_GPIO8A_IOMUX 0x0080 145 #define RK3288_GRF_GPIO8B_IOMUX 0x0084 146 147 #define RK3288_GRF_GPIO1H_SR 0x0104 148 #define RK3288_GRF_GPIO2L_SR 0x0108 149 #define RK3288_GRF_GPIO2H_SR 0x010c 150 #define RK3288_GRF_GPIO3L_SR 0x0110 151 #define RK3288_GRF_GPIO3H_SR 0x0114 152 #define RK3288_GRF_GPIO4L_SR 0x0118 153 #define RK3288_GRF_GPIO4H_SR 0x011c 154 #define RK3288_GRF_GPIO5L_SR 0x0120 155 #define RK3288_GRF_GPIO5H_SR 0x0124 156 #define RK3288_GRF_GPIO6L_SR 0x0128 157 #define RK3288_GRF_GPIO6H_SR 0x012c 158 #define RK3288_GRF_GPIO7L_SR 0x0130 159 #define RK3288_GRF_GPIO7H_SR 0x0134 160 #define RK3288_GRF_GPIO8L_SR 0x0138 161 162 #define RK3288_GRF_GPIO1D_P 0x014c 163 #define RK3288_GRF_GPIO2A_P 0x0150 164 #define RK3288_GRF_GPIO2B_P 0x0154 165 #define RK3288_GRF_GPIO2C_P 0x0158 166 167 #define RK3288_GRF_GPIO3A_P 0x0160 168 #define RK3288_GRF_GPIO3B_P 0x0164 169 #define RK3288_GRF_GPIO3C_P 0x0168 170 #define RK3288_GRF_GPIO3D_P 0x016c 171 #define RK3288_GRF_GPIO4A_P 0x0170 172 #define RK3288_GRF_GPIO4B_P 0x0174 173 #define RK3288_GRF_GPIO4C_P 0x0178 174 #define RK3288_GRF_GPIO4D_P 0x017c 175 176 #define RK3288_GRF_GPIO5B_P 0x0184 177 #define RK3288_GRF_GPIO5C_P 0x0188 178 179 #define RK3288_GRF_GPIO6A_P 0x0190 180 #define RK3288_GRF_GPIO6B_P 0x0194 181 #define RK3288_GRF_GPIO6C_P 0x0198 182 183 #define RK3288_GRF_GPIO7A_P 0x01a0 184 #define RK3288_GRF_GPIO7B_P 0x01a4 185 #define RK3288_GRF_GPIO7C_P 0x01a8 186 187 #define RK3288_GRF_GPIO8A_P 0x01b0 188 #define RK3288_GRF_GPIO8B_P 0x01b4 189 190 #define RK3288_GRF_GPIO1D_E 0x01cc 191 #define RK3288_GRF_GPIO2A_E 0x01d0 192 #define RK3288_GRF_GPIO2B_E 0x01d4 193 #define RK3288_GRF_GPIO2C_E 0x01d8 194 195 #define RK3288_GRF_GPIO3A_E 0x01e0 196 #define RK3288_GRF_GPIO3B_E 0x01e4 197 #define RK3288_GRF_GPIO3C_E 0x01e8 198 #define RK3288_GRF_GPIO3D_E 0x01ec 199 #define RK3288_GRF_GPIO4A_E 0x01f0 200 #define RK3288_GRF_GPIO4B_E 0x01f4 201 #define RK3288_GRF_GPIO4C_E 0x01f8 202 #define RK3288_GRF_GPIO4D_E 0x01fc 203 204 #define RK3288_GRF_GPIO5B_E 0x0204 205 #define RK3288_GRF_GPIO5C_E 0x0208 206 207 #define RK3288_GRF_GPIO6A_E 0x0210 208 #define RK3288_GRF_GPIO6B_E 0x0214 209 #define RK3288_GRF_GPIO6C_E 0x0218 210 211 #define RK3288_GRF_GPIO7A_E 0x0220 212 #define RK3288_GRF_GPIO7B_E 0x0224 213 #define RK3288_GRF_GPIO7C_E 0x0228 214 215 #define RK3288_GRF_GPIO8A_E 0x0230 216 #define RK3288_GRF_GPIO8B_E 0x0234 217 218 #define RK3288_GRF_GPIO_SMT 0x0240 219 #define RK3288_GRF_SOC_CON0 0x0244 220 #define RK3288_GRF_SOC_CON1 0x0248 221 #define RK3288_GRF_SOC_CON2 0x024c 222 #define RK3288_GRF_SOC_CON3 0x0250 223 #define RK3288_GRF_SOC_CON4 0x0254 224 #define RK3288_GRF_SOC_CON5 0x0258 225 #define RK3288_GRF_SOC_CON6 0x025c 226 #define RK3288_GRF_SOC_CON7 0x0260 227 #define RK3288_GRF_SOC_CON8 0x0264 228 #define RK3288_GRF_SOC_CON9 0x0268 229 #define RK3288_GRF_SOC_CON10 0x026c 230 #define RK3288_GRF_SOC_CON11 0x0270 231 #define RK3288_GRF_SOC_CON12 0x0274 232 #define RK3288_GRF_SOC_CON13 0x0278 233 #define RK3288_GRF_SOC_CON14 0x027c 234 #define RK3288_GRF_SOC_STATUS0 0x0280 235 #define RK3288_GRF_SOC_STATUS1 0x0284 236 #define RK3288_GRF_SOC_STATUS2 0x0288 237 #define RK3288_GRF_SOC_STATUS3 0x028c 238 #define RK3288_GRF_SOC_STATUS4 0x0290 239 #define RK3288_GRF_SOC_STATUS5 0x0294 240 #define RK3288_GRF_SOC_STATUS6 0x0298 241 #define RK3288_GRF_SOC_STATUS7 0x029c 242 #define RK3288_GRF_SOC_STATUS8 0x02a0 243 #define RK3288_GRF_SOC_STATUS9 0x02a4 244 #define RK3288_GRF_SOC_STATUS10 0x02a8 245 #define RK3288_GRF_SOC_STATUS11 0x02ac 246 #define RK3288_GRF_SOC_STATUS12 0x02b0 247 #define RK3288_GRF_SOC_STATUS13 0x02b4 248 #define RK3288_GRF_SOC_STATUS14 0x02b8 249 #define RK3288_GRF_SOC_STATUS15 0x02bc 250 #define RK3288_GRF_SOC_STATUS16 0x02c0 251 #define RK3288_GRF_SOC_STATUS17 0x02c4 252 #define RK3288_GRF_SOC_STATUS18 0x02c8 253 #define RK3288_GRF_SOC_STATUS19 0x02cc 254 #define RK3288_GRF_SOC_STATUS20 0x02d0 255 #define RK3288_GRF_SOC_STATUS21 0x02d4 256 257 #define RK3288_GRF_PERIDMAC_CON0 0x02e0 258 #define RK3288_GRF_PERIDMAC_CON1 0x02e4 259 #define RK3288_GRF_PERIDMAC_CON2 0x02e8 260 #define RK3288_GRF_PERIDMAC_CON3 0x02ec 261 #define RK3288_GRF_DDRC0_CON0 0x02f0 262 #define RK3288_GRF_DDRC1_CON0 0x02f4 263 #define RK3288_GRF_CPU_CON0 0x02f8 264 #define RK3288_GRF_CPU_CON1 0x02fc 265 #define RK3288_GRF_CPU_CON2 0x0300 266 #define RK3288_GRF_CPU_CON3 0x0304 267 #define RK3288_GRF_CPU_CON4 0x0308 268 269 #define RK3288_GRF_CPU_STATUS0 0x0318 270 271 #define RK3288_GRF_UOC0_CON0 0x0320 272 #define RK3288_GRF_UOC0_CON1 0x0324 273 #define RK3288_GRF_UOC0_CON2 0x0328 274 #define RK3288_GRF_UOC0_CON3 0x032c 275 #define RK3288_GRF_UOC0_CON4 0x0330 276 #define RK3288_GRF_UOC1_CON0 0x0334 277 #define RK3288_GRF_UOC1_CON1 0x0338 278 #define RK3288_GRF_UOC1_CON2 0x033c 279 #define RK3288_GRF_UOC1_CON3 0x0340 280 #define RK3288_GRF_UOC1_CON4 0x0344 281 #define RK3288_GRF_UOC2_CON0 0x0348 282 #define RK3288_GRF_UOC2_CON1 0x034c 283 #define RK3288_GRF_UOC2_CON2 0x0350 284 #define RK3288_GRF_UOC2_CON3 0x0354 285 #define RK3288_GRF_UOC3_CON0 0x0358 286 #define RK3288_GRF_UOC3_CON1 0x035c 287 #define RK3288_GRF_UOC4_CON0 0x0360 288 #define RK3288_GRF_UOC4_CON1 0x0364 289 #define RK3288_GRF_PVTM_CON0 0x0368 290 #define RK3288_GRF_PVTM_CON1 0x036c 291 #define RK3288_GRF_PVTM_CON2 0x0370 292 #define RK3288_GRF_PVTM_STATUS0 0x0374 293 #define RK3288_GRF_PVTM_STATUS1 0x0378 294 #define RK3288_GRF_PVTM_STATUS2 0x037c 295 #define RK3288_GRF_IO_VSEL 0x0380 296 #define RK3288_GRF_SARADC_TESTBIT 0x0384 297 #define RK3288_GRF_TSADC_TESTBIT_L 0x0388 298 #define RK3288_GRF_TSADC_TESTBIT_H 0x038c 299 #define RK3288_GRF_OS_REG0 0x0390 300 #define RK3288_GRF_OS_REG1 0x0394 301 #define RK3288_GRF_OS_REG2 0x0398 302 #define RK3288_GRF_OS_REG3 0x039c 303 304 #define RK3288_GRF_SOC_CON15 0x03a4 305 #define RK3288_GRF_SOC_CON16 0x03a8 306 307 #define RK3288_SGRF_SOC_CON0 0x0000 308 #define RK3288_SGRF_SOC_CON1 0x0004 309 #define RK3288_SGRF_SOC_CON2 0x0008 310 #define RK3288_SGRF_SOC_CON3 0x000c 311 #define RK3288_SGRF_SOC_CON4 0x0010 312 #define RK3288_SGRF_SOC_CON5 0x0014 313 314 #define RK3288_SGRF_BUSDMAC_CON0 0x0020 315 #define RK3288_SGRF_BUSDMAC_CON1 0x0024 316 317 #define RK3288_SGRF_CPU_CON0 0x0040 318 #define RK3288_SGRF_CPU_CON1 0x0044 319 #define RK3288_SGRF_CPU_CON2 0x0048 320 321 #define RK3288_SGRF_SOC_CON6 0x0050 322 #define RK3288_SGRF_SOC_CON7 0x0054 323 #define RK3288_SGRF_SOC_CON8 0x0058 324 #define RK3288_SGRF_SOC_CON9 0x005c 325 #define RK3288_SGRF_SOC_CON10 0x0060 326 #define RK3288_SGRF_SOC_CON11 0x0064 327 #define RK3288_SGRF_SOC_CON12 0x0068 328 #define RK3288_SGRF_SOC_CON13 0x006c 329 #define RK3288_SGRF_SOC_CON14 0x0070 330 #define RK3288_SGRF_SOC_CON15 0x0074 331 #define RK3288_SGRF_SOC_CON16 0x0078 332 #define RK3288_SGRF_SOC_CON17 0x007c 333 #define RK3288_SGRF_SOC_CON18 0x0080 334 #define RK3288_SGRF_SOC_CON19 0x0084 335 #define RK3288_SGRF_SOC_CON20 0x0088 336 #define RK3288_SGRF_SOC_CON21 0x008c 337 338 #define RK3288_SGRF_SOC_STATUS0 0x0100 339 #define RK3288_SGRF_SOC_STATUS1 0x0104 340 341 #define RK3288_SGRF_FAST_BOOT_ADDR 0x0120 342 343 344 #define RK3036_GRF_GPIO0A_IOMUX 0x000a8 345 #define RK3036_GRF_GPIO0B_IOMUX 0x000ac 346 #define RK3036_GRF_GPIO0C_IOMUX 0x000b0 347 #define RK3036_GRF_GPIO0D_IOMUX 0x000b4 348 #define RK3036_GRF_GPIO1A_IOMUX 0x000b8 349 #define RK3036_GRF_GPIO1B_IOMUX 0x000bc 350 #define RK3036_GRF_GPIO1C_IOMUX 0x000c0 351 #define RK3036_GRF_GPIO1D_IOMUX 0x000c4 352 #define RK3036_GRF_GPIO2A_IOMUX 0x000c8 353 #define RK3036_GRF_GPIO2B_IOMUX 0x000cc 354 #define RK3036_GRF_GPIO2C_IOMUX 0x000d0 355 #define RK3036_GRF_GPIO2D_IOMUX 0x000d4 356 #define RK3036_GRF_GPIO_DS 0x00100 357 #define RK3036_GRF_GPIO0L_PULL 0x00118 358 #define RK3036_GRF_GPIO0H_PULL 0x0011c 359 #define RK3036_GRF_GPIO1L_PULL 0x00120 360 #define RK3036_GRF_GPIO1H_PULL 0x00124 361 362 #define RK3036_GRF_GPIO2L_PULL 0x00128 363 #define RK3036_GRF_GPIO2H_PULL 0x0012c 364 #define RK3036_GRF_SOC_CON0 0x00140 365 #define RK3036_GRF_SOC_CON1 0x00144 366 #define RK3036_GRF_SOC_CON2 0x00148 367 #define RK3036_GRF_SOC_STATUS0 0x0014c 368 #define RK3036_GRF_SOC_CON3 0x00154 369 #define RK3036_GRF_DMAC_CON0 0x0015c 370 #define RK3036_GRF_DMAC_CON1 0x00160 371 #define RK3036_GRF_DMAC_CON2 0x00164 372 #define RK3036_GRF_UOC0_CON5 0x0017c 373 #define RK3036_GRF_UOC1_CON4 0x00190 374 #define RK3036_GRF_UOC1_CON5 0x00194 375 #define RK3036_GRF_DDRC_STAT 0x0019c 376 #define RK3036_GRF_UOC_CON6 0x001a0 377 #define RK3036_GRF_SOC_STATUS1 0x001a4 378 #define RK3036_GRF_CPU_CON0 0x001a8 379 #define RK3036_GRF_CPU_CON1 0x001ac 380 #define RK3036_GRF_CPU_CON2 0x001b0 381 #define RK3036_GRF_CPU_CON3 0x001b4 382 #define RK3036_GRF_CPU_STATUS0 0x001c0 383 #define RK3036_GRF_CPU_STATUS1 0x001c4 384 #define RK3036_GRF_OS_REG0 0x001c8 385 #define RK3036_GRF_OS_REG1 0x001cc 386 #define RK3036_GRF_OS_REG2 0x001d0 387 #define RK3036_GRF_OS_REG3 0x001d4 388 #define RK3036_GRF_OS_REG4 0x001d8 389 #define RK3036_GRF_OS_REG5 0x001dc 390 #define RK3036_GRF_OS_REG6 0x001e0 391 #define RK3036_GRF_OS_REG7 0x001e4 392 #define RK3036_GRF_DLL_CON0 0x00200 393 #define RK3036_GRF_DLL_CON1 0x00204 394 #define RK3036_GRF_DLL_CON2 0x00208 395 #define RK3036_GRF_DLL_CON3 0x0020c 396 #define RK3036_GRF_DLL_STATUS0 0x00210 397 #define RK3036_GRF_DLL_STATUS1 0x00214 398 399 #define RK3036_GRF_DLL_STATUS2 0x00218 400 #define RK3036_GRF_DLL_STATUS3 0x0021c 401 #define RK3036_GRF_DFI_WRNUM 0x00220 402 #define RK3036_GRF_DFI_RDNUM 0x00224 403 #define RK3036_GRF_DFI_ACTNUM 0x00228 404 #define RK3036_GRF_DFI_TIMERVAL 0x0022c 405 #define RK3036_GRF_NIF_FIFO0 0x00230 406 #define RK3036_GRF_NIF_FIFO1 0x00234 407 #define RK3036_GRF_NIF_FIFO2 0x00238 408 #define RK3036_GRF_NIF_FIFO3 0x0023c 409 #define RK3036_GRF_USBPHY0_CON0 0x00280 410 #define RK3036_GRF_USBPHY0_CON1 0x00284 411 #define RK3036_GRF_USBPHY0_CON2 0x00288 412 #define RK3036_GRF_USBPHY0_CON3 0x0028c 413 #define RK3036_GRF_USBPHY0_CON4 0x00290 414 #define RK3036_GRF_USBPHY0_CON5 0x00294 415 #define RK3036_GRF_USBPHY0_CON6 0x00298 416 #define RK3036_GRF_USBPHY0_CON7 0x0029c 417 #define RK3036_GRF_USBPHY1_CON0 0x002a0 418 #define RK3036_GRF_USBPHY1_CON1 0x002a4 419 #define RK3036_GRF_USBPHY1_CON2 0x002a8 420 #define RK3036_GRF_USBPHY1_CON3 0x002ac 421 #define RK3036_GRF_USBPHY1_CON4 0x002b0 422 #define RK3036_GRF_USBPHY1_CON5 0x002b4 423 #define RK3036_GRF_USBPHY1_CON6 0x002b8 424 425 #define RK3036_GRF_USBPHY1_CON7 0x002bc 426 #define RK3036_GRF_CHIP_TAG 0x00300 427 #define RK3036_GRF_SDMMC_DET_CNT 0x00304 428 429 #define RK312X_GRF_GPIO0A_IOMUX 0x000a8 430 #define RK312X_GRF_GPIO0B_IOMUX 0x000ac 431 #define RK312X_GRF_GPIO0C_IOMUX 0x000b0 432 #define RK312X_GRF_GPIO0D_IOMUX 0x000b4 433 #define RK312X_GRF_GPIO1A_IOMUX 0x000b8 434 #define RK312X_GRF_GPIO1B_IOMUX 0x000bc 435 #define RK312X_GRF_GPIO1C_IOMUX 0x000c0 436 #define RK312X_GRF_GPIO1D_IOMUX 0x000c4 437 #define RK312X_GRF_GPIO2A_IOMUX 0x000c8 438 #define RK312X_GRF_GPIO2B_IOMUX 0x000cc 439 #define RK312X_GRF_GPIO2C_IOMUX 0x000d0 440 #define RK312X_GRF_GPIO2D_IOMUX 0x000d4 441 #define RK312X_GRF_GPIO3A_IOMUX 0x000d8 442 #define RK312X_GRF_GPIO3B_IOMUX 0x000dc 443 #define RK312X_GRF_GPIO3C_IOMUX 0x000e0 444 #define RK312X_GRF_GPIO3D_IOMUX 0x000e4 445 #define RK312X_GRF_CIF_IOMUX 0x000ec 446 #define RK312X_GRF_CIF_IOMUX1 0x000f0 447 #define RK312X_GRF_GPIO_DS 0x00100 448 #define RK312X_GRF_GPIO0L_PULL 0x00118 449 #define RK312X_GRF_GPIO0H_PULL 0x0011c 450 #define RK312X_GRF_GPIO1L_PULL 0x00120 451 #define RK312X_GRF_GPIO1H_PULL 0x00124 452 #define RK312X_GRF_GPIO2L_PULL 0x00128 453 #define RK312X_GRF_GPIO2H_PULL 0x0012c 454 #define RK312X_GRF_GPIO3L_PULL 0x00130 455 #define RK312X_GRF_GPIO3H_PULL 0x00134 456 #define RK312X_GRF_ACODEC_CON 0x0013c 457 458 #define RK312X_GRF_SOC_CON0 0x00140 459 #define RK312X_GRF_SOC_CON1 0x00144 460 #define RK312X_GRF_SOC_CON2 0x00148 461 #define RK312X_GRF_SOC_STATUS0 0x0014c 462 #define RK312X_GRF_LVDS_CON0 0x00150 463 #define RK312X_GRF_SOC_CON3 0x00154 464 #define RK312X_GRF_DMAC_CON0 0x0015c 465 #define RK312X_GRF_DMAC_CON1 0x00160 466 #define RK312X_GRF_DMAC_CON2 0x00164 467 #define RK312X_GRF_MAC_CON0 0x00168 468 #define RK312X_GRF_MAC_CON1 0x0016c 469 #define RK312X_GRF_TVE_CON 0x00170 470 #define RK312X_GRF_UOC0_CON0 0x0017c 471 #define RK312X_GRF_UOC1_CON1 0x00184 472 #define RK312X_GRF_UOC1_CON2 0x00188 473 #define RK312X_GRF_UOC1_CON3 0x0018c 474 #define RK312X_GRF_UOC1_CON4 0x00190 475 #define RK312X_GRF_UOC1_CON5 0x00194 476 #define RK312X_GRF_DDRC_STAT 0x0019c 477 #define RK312X_GRF_SOC_STATUS1 0x001a4 478 #define RK312X_GRF_CPU_CON0 0x001a8 479 #define RK312X_GRF_CPU_CON1 0x001ac 480 #define RK312X_GRF_CPU_CON2 0x001b0 481 #define RK312X_GRF_CPU_CON3 0x001b4 482 #define RK312X_GRF_CPU_STATUS0 0x001c0 483 #define RK312X_GRF_CPU_STATUS1 0x001c4 484 #define RK312X_GRF_OS_REG0 0x001c8 485 #define RK312X_GRF_OS_REG1 0x001cc 486 #define RK312X_GRF_OS_REG2 0x001d0 487 #define RK312X_GRF_OS_REG3 0x001d4 488 #define RK312X_GRF_OS_REG4 0x001d8 489 #define RK312X_GRF_OS_REG5 0x001dc 490 #define RK312X_GRF_OS_REG6 0x001e0 491 #define RK312X_GRF_OS_REG7 0x001e4 492 #define RK312X_GRF_PVTM_CON0 0x00200 493 #define RK312X_GRF_PVTM_CON1 0x00204 494 #define RK312X_GRF_PVTM_CON2 0x00208 495 #define RK312X_GRF_PVTM_CON3 0x0020c 496 #define RK312X_GRF_PVTM_STATUS0 0x00210 497 #define RK312X_GRF_PVTM_STATUS1 0x00214 498 #define RK312X_GRF_PVTM_STATUS2 0x00218 499 #define RK312X_GRF_PVTM_STATUS3 0x0021c 500 #define RK312X_GRF_DFI_WRNUM 0x00220 501 #define RK312X_GRF_DFI_RDNUM 0x00224 502 #define RK312X_GRF_DFI_ACTNUM 0x00228 503 #define RK312X_GRF_DFI_TIMERVAL 0x0022c 504 #define RK312X_GRF_NIF_FIFO0 0x00230 505 #define RK312X_GRF_NIF_FIFO1 0x00234 506 #define RK312X_GRF_NIF_FIFO2 0x00238 507 #define RK312X_GRF_NIF_FIFO3 0x0023c 508 #define RK312X_GRF_USBPHY0_CON0 0x00280 509 #define RK312X_GRF_USBPHY0_CON1 0x00284 510 #define RK312X_GRF_USBPHY0_CON2 0x00288 511 #define RK312X_GRF_USBPHY0_CON3 0x0028c 512 #define RK312X_GRF_USBPHY0_CON4 0x00290 513 #define RK312X_GRF_USBPHY0_CON5 0x00294 514 #define RK312X_GRF_USBPHY0_CON6 0x00298 515 #define RK312X_GRF_USBPHY0_CON7 0x0029c 516 #define RK312X_GRF_USBPHY1_CON0 0x002a0 517 #define RK312X_GRF_USBPHY1_CON1 0x002a4 518 #define RK312X_GRF_USBPHY1_CON2 0x002a8 519 #define RK312X_GRF_USBPHY1_CON3 0x002ac 520 #define RK312X_GRF_USBPHY1_CON4 0x002b0 521 #define RK312X_GRF_USBPHY1_CON5 0x002b4 522 #define RK312X_GRF_USBPHY1_CON6 0x002b8 523 #define RK312X_GRF_USBPHY1_CON7 0x002bc 524 #define RK312X_GRF_UOC_STATUS0 0x002c0 525 #define RK312X_GRF_CHIP_TAG 0x00300 526 #define RK312X_GRF_SDMMC_DET_CNT 0x00304 527 #define RK312X_GRF_EFUSE_PRG_EN 0x0037c 528 529 #define RK3228_GRF_GPIO0A_IOMUX 0x0000 530 #define RK3228_GRF_GPIO0B_IOMUX 0x0004 531 #define RK3228_GRF_GPIO0C_IOMUX 0x0008 532 #define RK3228_GRF_GPIO0D_IOMUX 0x000c 533 #define RK3228_GRF_GPIO1A_IOMUX 0x0010 534 #define RK3228_GRF_GPIO1B_IOMUX 0x0014 535 #define RK3228_GRF_GPIO1C_IOMUX 0x0018 536 #define RK3228_GRF_GPIO1D_IOMUX 0x001c 537 #define RK3228_GRF_GPIO2A_IOMUX 0x0020 538 #define RK3228_GRF_GPIO2B_IOMUX 0x0024 539 #define RK3228_GRF_GPIO2C_IOMUX 0x0028 540 #define RK3228_GRF_GPIO2D_IOMUX 0x002c 541 #define RK3228_GRF_GPIO3A_IOMUX 0x0030 542 #define RK3228_GRF_GPIO3B_IOMUX 0x0034 543 #define RK3228_GRF_GPIO3C_IOMUX 0x0038 544 #define RK3228_GRF_GPIO3D_IOMUX 0x003c 545 #define RK3228_GRF_COM_IOMUX 0x0050 546 #define RK3228_GRF_GPIO0A_P 0x0100 547 #define RK3228_GRF_GPIO0B_P 0x0104 548 #define RK3228_GRF_GPIO0C_P 0x0108 549 #define RK3228_GRF_GPIO0D_P 0x010c 550 #define RK3228_GRF_GPIO1A_P 0x0110 551 #define RK3228_GRF_GPIO1B_P 0x0114 552 #define RK3228_GRF_GPIO1C_P 0x0118 553 #define RK3228_GRF_GPIO1D_P 0x011c 554 #define RK3228_GRF_GPIO2A_P 0x0120 555 #define RK3228_GRF_GPIO2B_P 0x0124 556 #define RK3228_GRF_GPIO2C_P 0x0128 557 #define RK3228_GRF_GPIO2D_P 0x012c 558 #define RK3228_GRF_GPIO3A_P 0x0130 559 #define RK3228_GRF_GPIO3B_P 0x0134 560 #define RK3228_GRF_GPIO3C_P 0x0138 561 #define RK3228_GRF_GPIO3D_P 0x013c 562 #define RK3228_GRF_GPIO0A_E 0x0200 563 #define RK3228_GRF_GPIO0B_E 0x0204 564 #define RK3228_GRF_GPIO0C_E 0x0208 565 #define RK3228_GRF_GPIO0D_E 0x020c 566 #define RK3228_GRF_GPIO1A_E 0x0210 567 #define RK3228_GRF_GPIO1B_E 0x0214 568 #define RK3228_GRF_GPIO1C_E 0x0218 569 #define RK3228_GRF_GPIO1D_E 0x021c 570 #define RK3228_GRF_GPIO2A_E 0x0220 571 #define RK3228_GRF_GPIO2B_E 0x0224 572 #define RK3228_GRF_GPIO2C_E 0x0228 573 #define RK3228_GRF_GPIO2D_E 0x022c 574 #define RK3228_GRF_GPIO3A_E 0x0230 575 #define RK3228_GRF_GPIO3B_E 0x0234 576 #define RK3228_GRF_GPIO3C_E 0x0238 577 #define RK3228_GRF_GPIO3D_E 0x023c 578 #define RK3228_GRF_GPIO0L_SR 0x0300 579 #define RK3228_GRF_GPIO0H_SR 0x0304 580 #define RK3228_GRF_GPIO1L_SR 0x0308 581 #define RK3228_GRF_GPIO1H_SR 0x030c 582 #define RK3228_GRF_GPIO2L_SR 0x0310 583 #define RK3228_GRF_GPIO2H_SR 0x0314 584 #define RK3228_GRF_GPIO3L_SR 0x0318 585 #define RK3228_GRF_GPIO3H_SR 0x031c 586 #define RK3228_GRF_GPIO0L_SMT 0x0380 587 #define RK3228_GRF_GPIO0H_SMT 0x0384 588 #define RK3228_GRF_GPIO1L_SMT 0x0388 589 #define RK3228_GRF_GPIO1H_SMT 0x038c 590 #define RK3228_GRF_GPIO2L_SMT 0x0390 591 #define RK3228_GRF_GPIO2H_SMT 0x0394 592 #define RK3228_GRF_GPIO3L_SMT 0x0398 593 #define RK3228_GRF_GPIO3H_SMT 0x039c 594 #define RK3228_GRF_SOC_CON0 0x0400 595 #define RK3228_GRF_SOC_CON1 0x0404 596 #define RK3228_GRF_SOC_CON2 0x0408 597 #define RK3228_GRF_SOC_CON3 0x040c 598 #define RK3228_GRF_SOC_CON4 0x0410 599 #define RK3228_GRF_SOC_CON5 0x0414 600 #define RK3228_GRF_SOC_CON6 0x0418 601 #define RK3228_GRF_SOC_STATUS0 0x0480 602 #define RK3228_GRF_SOC_STATUS1 0x0484 603 #define RK3228_GRF_SOC_STATUS2 0x0488 604 #define RK3228_GRF_CHIP_ID 0x048c 605 #define RK3228_GRF_CPU_CON0 0x0500 606 #define RK3228_GRF_CPU_CON1 0x0504 607 #define RK3228_GRF_CPU_CON2 0x0508 608 #define RK3228_GRF_CPU_CON3 0x050c 609 #define RK3228_GRF_CPU_STATUS0 0x0520 610 #define RK3228_GRF_CPU_STATUS1 0x0524 611 #define RK3228_GRF_OS_REG0 0x05c8 612 #define RK3228_GRF_OS_REG1 0x05cc 613 #define RK3228_GRF_OS_REG2 0x05d0 614 #define RK3228_GRF_OS_REG3 0x05d4 615 #define RK3228_GRF_OS_REG4 0x05d8 616 #define RK3228_GRF_OS_REG5 0x05dc 617 #define RK3228_GRF_OS_REG6 0x05e0 618 #define RK3228_GRF_OS_REG7 0x05e4 619 #define RK3228_GRF_DDRC_STAT 0x0604 620 #define RK3228_GRF_SIG_DETECT_CON 0x0680 621 #define RK3228_GRF_SIG_DETECT_CON1 0x0684 622 #define RK3228_GRF_SIG_DETECT_STATUS 0x0690 623 #define RK3228_GRF_SIG_DETECT_STATUS1 0x0694 624 #define RK3228_GRF_SIG_DETECT_CLR 0x06a0 625 #define RK3228_GRF_SIG_DETECT_CLR1 0x06a4 626 #define RK3228_GRF_EMMC_DET 0x06b0 627 #define RK3228_GRF_HOST0_CON0 0x0700 628 #define RK3228_GRF_HOST0_CON1 0x0704 629 #define RK3228_GRF_HOST0_CON2 0x0708 630 #define RK3228_GRF_HOST1_CON0 0x0710 631 #define RK3228_GRF_HOST1_CON1 0x0714 632 #define RK3228_GRF_HOST1_CON2 0x0718 633 #define RK3228_GRF_HOST2_CON0 0x0720 634 #define RK3228_GRF_HOST2_CON1 0x0724 635 #define RK3228_GRF_HOST2_CON2 0x0728 636 #define RK3228_GRF_USBPHY0_CON0 0x0760 637 #define RK3228_GRF_USBPHY0_CON1 0x0764 638 #define RK3228_GRF_USBPHY0_CON2 0x0768 639 #define RK3228_GRF_USBPHY0_CON3 0x076c 640 #define RK3228_GRF_USBPHY0_CON4 0x0770 641 #define RK3228_GRF_USBPHY0_CON5 0x0774 642 #define RK3228_GRF_USBPHY0_CON6 0x0778 643 #define RK3228_GRF_USBPHY0_CON7 0x077c 644 #define RK3228_GRF_USBPHY0_CON8 0x0780 645 #define RK3228_GRF_USBPHY0_CON9 0x0784 646 #define RK3228_GRF_USBPHY0_CON10 0x0788 647 #define RK3228_GRF_USBPHY0_CON11 0x078c 648 #define RK3228_GRF_USBPHY0_CON12 0x0790 649 #define RK3228_GRF_USBPHY0_CON13 0x0794 650 #define RK3228_GRF_USBPHY0_CON14 0x0798 651 #define RK3228_GRF_USBPHY0_CON15 0x079c 652 #define RK3228_GRF_USBPHY0_CON16 0x07a0 653 #define RK3228_GRF_USBPHY0_CON17 0x07a4 654 #define RK3228_GRF_USBPHY0_CON18 0x07a8 655 #define RK3228_GRF_USBPHY0_CON19 0x07ac 656 #define RK3228_GRF_USBPHY0_CON20 0x07b0 657 #define RK3228_GRF_USBPHY0_CON21 0x07b4 658 #define RK3228_GRF_USBPHY0_CON22 0x07b8 659 #define RK3228_GRF_USBPHY0_CON23 0x07bc 660 #define RK3228_GRF_USBPHY0_CON24 0x07c0 661 #define RK3228_GRF_USBPHY0_CON25 0x07c4 662 #define RK3228_GRF_USBPHY0_CON26 0x07c8 663 #define RK3228_GRF_USBPHY1_CON0 0x0800 664 #define RK3228_GRF_USBPHY1_CON1 0x0804 665 #define RK3228_GRF_USBPHY1_CON2 0x0808 666 #define RK3228_GRF_USBPHY1_CON3 0x080c 667 #define RK3228_GRF_USBPHY1_CON4 0x0810 668 #define RK3228_GRF_USBPHY1_CON5 0x0814 669 #define RK3228_GRF_USBPHY1_CON6 0x0818 670 #define RK3228_GRF_USBPHY1_CON7 0x081c 671 #define RK3228_GRF_USBPHY1_CON8 0x0820 672 #define RK3228_GRF_USBPHY1_CON9 0x0824 673 #define RK3228_GRF_USBPHY1_CON10 0x0828 674 #define RK3228_GRF_USBPHY1_CON11 0x082c 675 #define RK3228_GRF_USBPHY1_CON12 0x0830 676 #define RK3228_GRF_USBPHY1_CON13 0x0834 677 #define RK3228_GRF_USBPHY1_CON14 0x0838 678 #define RK3228_GRF_USBPHY1_CON15 0x083c 679 #define RK3228_GRF_USBPHY1_CON16 0x0840 680 #define RK3228_GRF_USBPHY1_CON17 0x0844 681 #define RK3228_GRF_USBPHY1_CON18 0x0848 682 #define RK3228_GRF_USBPHY1_CON19 0x084c 683 #define RK3228_GRF_USBPHY1_CON20 0x0850 684 #define RK3228_GRF_USBPHY1_CON21 0x0854 685 #define RK3228_GRF_USBPHY1_CON22 0x0858 686 #define RK3228_GRF_USBPHY1_CON23 0x085c 687 #define RK3228_GRF_USBPHY1_CON24 0x0860 688 #define RK3228_GRF_USBPHY1_CON25 0x0864 689 #define RK3228_GRF_USBPHY1_CON26 0x0868 690 #define RK3228_GRF_OTG_CON0 0x0880 691 #define RK3228_GRF_UOC_CON0 0x0884 692 #define RK3228_GRF_MAC_CON0 0x0900 693 #define RK3228_GRF_MAC_CON1 0x0904 694 #define RK3228_GRF_MACPHY_CON0 0x0b00 695 #define RK3228_GRF_MACPHY_CON1 0x0b04 696 #define RK3228_GRF_MACPHY_CON2 0x0b08 697 #define RK3228_GRF_MACPHY_CON3 0x0b0c 698 #define RK3228_GRF_MACPHY_STATUS 0x0b10 699 700 #endif 701