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1 /*
2  * Copyright (c) 2022 Huawei Device Co., Ltd.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at
6  *
7  *     http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 
16 #ifndef API_RENDER_DEVICE_PIPELINE_STATE_DESC_H
17 #define API_RENDER_DEVICE_PIPELINE_STATE_DESC_H
18 
19 #include <cstdint>
20 
21 #include <base/containers/array_view.h>
22 #include <base/math/matrix.h>
23 #include <base/util/formats.h>
24 #include <render/namespace.h>
25 #include <render/resource_handle.h>
26 
27 RENDER_BEGIN_NAMESPACE()
28 /** \addtogroup group_render_pipelinestatedesc
29  *  @{
30  */
31 /** Size 2D */
32 struct Size2D {
33     /** Width */
34     uint32_t width { 0 };
35     /** Height */
36     uint32_t height { 0 };
37 };
38 
39 /** Size 3D */
40 struct Size3D {
41     /** Width */
42     uint32_t width { 0 };
43     /** Height */
44     uint32_t height { 0 };
45     /** Depth */
46     uint32_t depth { 0 };
47 };
48 
49 /** Offset 3D */
50 struct Offset3D {
51     /** X offset */
52     int32_t x { 0 };
53     /** Y offset */
54     int32_t y { 0 };
55     /** Z offset */
56     int32_t z { 0 };
57 };
58 
59 /** Surface transform flag bits */
60 enum SurfaceTransformFlagBits {
61     /** Identity bit */
62     CORE_SURFACE_TRANSFORM_IDENTITY_BIT = 0x00000001,
63     /** Rotate 90 bit */
64     CORE_SURFACE_TRANSFORM_ROTATE_90_BIT = 0x00000002,
65     /** Rotate 180 bit */
66     CORE_SURFACE_TRANSFORM_ROTATE_180_BIT = 0x00000004,
67     /** Rotate 270 bit */
68     CORE_SURFACE_TRANSFORM_ROTATE_270_BIT = 0x00000008,
69 };
70 /** Container for surface transform flag bits */
71 using SurfaceTransformFlags = uint32_t;
72 
73 /** Index type */
74 enum IndexType {
75     /** UINT16 */
76     CORE_INDEX_TYPE_UINT16 = 0,
77     /** UINT32 */
78     CORE_INDEX_TYPE_UINT32 = 1,
79 };
80 
81 /** Memory property flag bits */
82 enum MemoryPropertyFlagBits {
83     /** Device local bit */
84     CORE_MEMORY_PROPERTY_DEVICE_LOCAL_BIT = 0x00000001,
85     /** Host visible bit */
86     CORE_MEMORY_PROPERTY_HOST_VISIBLE_BIT = 0x00000002,
87     /** Host visible bit */
88     CORE_MEMORY_PROPERTY_HOST_COHERENT_BIT = 0x00000004,
89     /** Host cached bit, always preferred not required for allocation */
90     CORE_MEMORY_PROPERTY_HOST_CACHED_BIT = 0x00000008,
91     /** Lazily allocated bit, always preferred not required for allocation */
92     CORE_MEMORY_PROPERTY_LAZILY_ALLOCATED_BIT = 0x00000010,
93     /** Protected bit, always preferred not required for allocation */
94     CORE_MEMORY_PROPERTY_PROTECTED_BIT = 0x00000020,
95 };
96 /** Container for memory property flag bits */
97 using MemoryPropertyFlags = uint32_t;
98 
99 enum FormatFeatureFlagBits {
100     /** Sampled image bit */
101     CORE_FORMAT_FEATURE_SAMPLED_IMAGE_BIT = 0x00000001,
102     /** Storage image bit */
103     CORE_FORMAT_FEATURE_STORAGE_IMAGE_BIT = 0x00000002,
104     /** Image atomic bit */
105     CORE_FORMAT_FEATURE_STORAGE_IMAGE_ATOMIC_BIT = 0x00000004,
106     /** Uniform texel buffer bit */
107     CORE_FORMAT_FEATURE_UNIFORM_TEXEL_BUFFER_BIT = 0x00000008,
108     /** Storage texel buffer bit */
109     CORE_FORMAT_FEATURE_STORAGE_TEXEL_BUFFER_BIT = 0x00000010,
110     /** Storage texel buffer atomic bit */
111     CORE_FORMAT_FEATURE_STORAGE_TEXEL_BUFFER_ATOMIC_BIT = 0x00000020,
112     /** Vertex buffer bit */
113     CORE_FORMAT_FEATURE_VERTEX_BUFFER_BIT = 0x00000040,
114     /** Color attachment bit */
115     CORE_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT = 0x00000080,
116     /** Color attachment blend bit */
117     CORE_FORMAT_FEATURE_COLOR_ATTACHMENT_BLEND_BIT = 0x00000100,
118     /** Depth stencil attachment bit */
119     CORE_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT = 0x00000200,
120     /** Blit src bit */
121     CORE_FORMAT_FEATURE_BLIT_SRC_BIT = 0x00000400,
122     /** Blit dst bit */
123     CORE_FORMAT_FEATURE_BLIT_DST_BIT = 0x00000800,
124     /** Sampled image filter linear bit */
125     CORE_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_LINEAR_BIT = 0x00001000,
126     /** Transfer src bit */
127     CORE_FORMAT_FEATURE_TRANSFER_SRC_BIT = 0x00004000,
128     /** Transfer dst bit */
129     CORE_FORMAT_FEATURE_TRANSFER_DST_BIT = 0x00008000,
130     /** Fragment shading rate attachment bit */
131     CORE_FORMAT_FEATURE_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT = 0x40000000,
132 };
133 /** Format feature flags */
134 using FormatFeatureFlags = uint32_t;
135 
136 /** Format properties */
137 struct FormatProperties {
138     /** Linear tiling feature flags */
139     FormatFeatureFlags linearTilingFeatures { 0u };
140     /** Optimal tiling feature flags */
141     FormatFeatureFlags optimalTilingFeatures { 0u };
142     /** Buffer feature flags */
143     FormatFeatureFlags bufferFeatures { 0u };
144     /** Bytes per pixel */
145     uint32_t bytesPerPixel { 0u };
146 };
147 
148 /** Fragment shading rate properties */
149 struct FragmentShadingRateProperties {
150     /** Min fragment shading rate attachment texel size */
151     Size2D minFragmentShadingRateAttachmentTexelSize;
152     /** Max fragment shading rate attachment texel size */
153     Size2D maxFragmentShadingRateAttachmentTexelSize;
154     /** Max fragment size */
155     Size2D maxFragmentSize;
156 };
157 
158 /** Image layout */
159 enum ImageLayout {
160     /** Undefined */
161     CORE_IMAGE_LAYOUT_UNDEFINED = 0,
162     /** General */
163     CORE_IMAGE_LAYOUT_GENERAL = 1,
164     /** Color attachment optimal */
165     CORE_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL = 2,
166     /** Depth stencil attachment optimal */
167     CORE_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL = 3,
168     /** Depth stencil read only optimal */
169     CORE_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL = 4,
170     /** Shader read only optimal */
171     CORE_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL = 5,
172     /** Transfer source optimal */
173     CORE_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL = 6,
174     /** Transfer destination optimal */
175     CORE_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL = 7,
176     /** Preinitialized */
177     CORE_IMAGE_LAYOUT_PREINITIALIZED = 8,
178     /** Depth read only stencil attachment optimal */
179     CORE_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL = 1000117000,
180     /** Depth attachment stencil read only optimal */
181     CORE_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL = 1000117001,
182     /** Present source */
183     CORE_IMAGE_LAYOUT_PRESENT_SRC = 1000001002,
184     /** Shared present source */
185     CORE_IMAGE_LAYOUT_SHARED_PRESENT = 1000111000,
186     /** Shared present source KHR */
187     CORE_IMAGE_LAYOUT_FRAGMENT_SHADING_RATE_ATTACHMENT_OPTIMAL = 1000164003,
188     /** Max enumeration */
189     CORE_IMAGE_LAYOUT_MAX_ENUM = 0x7FFFFFFF
190 };
191 
192 /** Image aspect flag bits */
193 enum ImageAspectFlagBits {
194     /** Color bit */
195     CORE_IMAGE_ASPECT_COLOR_BIT = 0x00000001,
196     /** Depth bit */
197     CORE_IMAGE_ASPECT_DEPTH_BIT = 0x00000002,
198     /** Stencil bit */
199     CORE_IMAGE_ASPECT_STENCIL_BIT = 0x00000004,
200     /** Metadata bit */
201     CORE_IMAGE_ASPECT_METADATA_BIT = 0x00000008,
202     /** Aspect plane 0 */
203     CORE_IMAGE_ASPECT_PLANE_0_BIT = 0x00000010,
204     /** Aspect plane 1 */
205     CORE_IMAGE_ASPECT_PLANE_1_BIT = 0x00000020,
206     /** Aspect plane 2 */
207     CORE_IMAGE_ASPECT_PLANE_2_BIT = 0x00000040,
208 };
209 /** Container for image aspect flag bits */
210 using ImageAspectFlags = uint32_t;
211 
212 /** Access flag bits */
213 enum AccessFlagBits {
214     /** Indirect command read bit */
215     CORE_ACCESS_INDIRECT_COMMAND_READ_BIT = 0x00000001,
216     /** Index read bit */
217     CORE_ACCESS_INDEX_READ_BIT = 0x00000002,
218     /** Vertex attribute read bit */
219     CORE_ACCESS_VERTEX_ATTRIBUTE_READ_BIT = 0x00000004,
220     /** Uniform read bit */
221     CORE_ACCESS_UNIFORM_READ_BIT = 0x00000008,
222     /** Input attachment read bit */
223     CORE_ACCESS_INPUT_ATTACHMENT_READ_BIT = 0x00000010,
224     /** Shader read bit */
225     CORE_ACCESS_SHADER_READ_BIT = 0x00000020,
226     /** Shader write bit */
227     CORE_ACCESS_SHADER_WRITE_BIT = 0x00000040,
228     /** Color attachment read bit */
229     CORE_ACCESS_COLOR_ATTACHMENT_READ_BIT = 0x00000080,
230     /** Color attachment write bit */
231     CORE_ACCESS_COLOR_ATTACHMENT_WRITE_BIT = 0x00000100,
232     /** Depth stencil attachment read bit */
233     CORE_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT = 0x00000200,
234     /** Depth stencil attachment write bit */
235     CORE_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT = 0x00000400,
236     /** Transfer read bit */
237     CORE_ACCESS_TRANSFER_READ_BIT = 0x00000800,
238     /** Transfer write bit */
239     CORE_ACCESS_TRANSFER_WRITE_BIT = 0x00001000,
240     /** Host read bit */
241     CORE_ACCESS_HOST_READ_BIT = 0x00002000,
242     /** Host write bit */
243     CORE_ACCESS_HOST_WRITE_BIT = 0x00004000,
244     /** Memory read bit */
245     CORE_ACCESS_MEMORY_READ_BIT = 0x00008000,
246     /** Memory write bit */
247     CORE_ACCESS_MEMORY_WRITE_BIT = 0x00010000,
248     /** Acceleration structure read bit */
249     CORE_ACCESS_ACCELERATION_STRUCTURE_READ_BIT = 0x00200000,
250     /** Acceleration structure write */
251     CORE_ACCESS_ACCELERATION_STRUCTURE_WRITE_BIT = 0x00400000,
252     /** Fragment shading rate attachment read bit */
253     CORE_ACCESS_FRAGMENT_SHADING_RATE_ATTACHMENT_READ_BIT = 0x00800000,
254 };
255 /** Container for access flag bits */
256 using AccessFlags = uint32_t;
257 
258 /** Pipeline stage flag bits */
259 enum PipelineStageFlagBits {
260     /* None */
261     CORE_PIPELINE_STAGE_NONE = 0,
262     /** Top of pipe bit */
263     CORE_PIPELINE_STAGE_TOP_OF_PIPE_BIT = 0x00000001,
264     /** Draw indirect bit */
265     CORE_PIPELINE_STAGE_DRAW_INDIRECT_BIT = 0x00000002,
266     /** Vertex input bit */
267     CORE_PIPELINE_STAGE_VERTEX_INPUT_BIT = 0x00000004,
268     /** Vertex shader bit */
269     CORE_PIPELINE_STAGE_VERTEX_SHADER_BIT = 0x00000008,
270     /** Fragment shader bit */
271     CORE_PIPELINE_STAGE_FRAGMENT_SHADER_BIT = 0x00000080,
272     /** Early fragment tests bit */
273     CORE_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT = 0x00000100,
274     /** Late fragment tests bit */
275     CORE_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT = 0x00000200,
276     /** Color attachment output bit */
277     CORE_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT = 0x00000400,
278     /** Compute shader bit */
279     CORE_PIPELINE_STAGE_COMPUTE_SHADER_BIT = 0x00000800,
280     /** Transfer bit */
281     CORE_PIPELINE_STAGE_TRANSFER_BIT = 0x00001000,
282     /** Bottom of pipe bit */
283     CORE_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT = 0x00002000,
284     /** Host bit */
285     CORE_PIPELINE_STAGE_HOST_BIT = 0x00004000,
286     /** All graphics bit */
287     CORE_PIPELINE_STAGE_ALL_GRAPHICS_BIT = 0x00008000,
288     /** All commands bit */
289     CORE_PIPELINE_STAGE_ALL_COMMANDS_BIT = 0x00010000,
290     /** Ray tracing shader bit */
291     CORE_PIPELINE_STAGE_RAY_TRACING_SHADER_BIT = 0x00200000,
292     /** Fragment shading rate attachment bit */
293     CORE_PIPELINE_STAGE_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT = 0x00400000,
294     /** Acceleration structure build bit */
295     CORE_PIPELINE_STAGE_ACCELERATION_STRUCTURE_BUILD_BIT = 0x02000000,
296     /** Fragment density process bit */
297     CORE_PIPELINE_STAGE_FRAGMENT_DENSITY_PROCESS_BIT = 0x00800000,
298 };
299 /** Container for pipeline stage flag bits */
300 using PipelineStageFlags = uint32_t;
301 
302 /** GPU queue */
303 struct GpuQueue {
304     /** Queue type */
305     enum class QueueType {
306         /** Undefined queue type */
307         UNDEFINED = 0x0,
308         /** Graphics */
309         GRAPHICS = 0x1,
310         /** Compute */
311         COMPUTE = 0x2,
312         /** Transfer */
313         TRANSFER = 0x4,
314     };
315 
316     /** Type of queue */
317     QueueType type { QueueType::UNDEFINED };
318     /** Index of queue */
319     uint32_t index { 0 };
320 };
321 
322 /** Descriptor type */
323 enum DescriptorType {
324     /** Sampler */
325     CORE_DESCRIPTOR_TYPE_SAMPLER = 0,
326     /** Combined image sampler */
327     CORE_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER = 1,
328     /** Sampled image */
329     CORE_DESCRIPTOR_TYPE_SAMPLED_IMAGE = 2,
330     /** Storage image */
331     CORE_DESCRIPTOR_TYPE_STORAGE_IMAGE = 3,
332     /** Uniform texel buffer */
333     CORE_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER = 4,
334     /** Storage texel buffer */
335     CORE_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER = 5,
336     /** Uniform buffer */
337     CORE_DESCRIPTOR_TYPE_UNIFORM_BUFFER = 6,
338     /** Storage buffer */
339     CORE_DESCRIPTOR_TYPE_STORAGE_BUFFER = 7,
340     /** Dynamic uniform buffer */
341     CORE_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC = 8,
342     /** Dynamic storage buffer */
343     CORE_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC = 9,
344     /** Input attachment */
345     CORE_DESCRIPTOR_TYPE_INPUT_ATTACHMENT = 10,
346     /** Acceleration structure */
347     CORE_DESCRIPTOR_TYPE_ACCELERATION_STRUCTURE = 1000150000,
348     /** Max enumeration */
349     CORE_DESCRIPTOR_TYPE_MAX_ENUM = 0x7FFFFFFF
350 };
351 
352 /** Additional descriptor flag bits */
353 enum AdditionalDescriptorFlagBits {
354     /** Immutable sampler is used */
355     CORE_ADDITIONAL_DESCRIPTOR_IMMUTABLE_SAMPLER_BIT = 0x00000001,
356 };
357 /** Container for sampler descriptor flag bits */
358 using AdditionalDescriptorFlags = uint32_t;
359 
360 /** Shader stage flag bits */
361 enum ShaderStageFlagBits {
362     /** Vertex bit */
363     CORE_SHADER_STAGE_VERTEX_BIT = 0x00000001,
364     /** Fragment bit */
365     CORE_SHADER_STAGE_FRAGMENT_BIT = 0x00000010,
366     /** Compute bit */
367     CORE_SHADER_STAGE_COMPUTE_BIT = 0x00000020,
368     /** All graphics */
369     CORE_SHADER_STAGE_ALL_GRAPHICS = 0x0000001F,
370     /** All */
371     CORE_SHADER_STAGE_ALL = 0x7FFFFFFF,
372 };
373 /** Shader stage flags */
374 using ShaderStageFlags = uint32_t;
375 
376 /** Pipeline bind point */
377 enum PipelineBindPoint {
378     /** Bind point graphics */
379     CORE_PIPELINE_BIND_POINT_GRAPHICS = 0,
380     /** Bind point compute */
381     CORE_PIPELINE_BIND_POINT_COMPUTE = 1,
382     /** Max enumeration */
383     CORE_PIPELINE_BIND_POINT_MAX_ENUM = 0x7FFFFFFF
384 };
385 
386 /** Query pipeline statistic flag bits */
387 enum QueryPipelineStatisticFlagBits {
388     /** Input assembly vertices bit */
389     CORE_QUERY_PIPELINE_STATISTIC_INPUT_ASSEMBLY_VERTICES_BIT = 0x00000001,
390     /** Input assembly primitives bit */
391     CORE_QUERY_PIPELINE_STATISTIC_INPUT_ASSEMBLY_PRIMITIVES_BIT = 0x00000002,
392     /** Vertex shader invocations bit */
393     CORE_QUERY_PIPELINE_STATISTIC_VERTEX_SHADER_INVOCATIONS_BIT = 0x00000004,
394     /* Geometry shader invocations bit */
395     CORE_QUERY_PIPELINE_STATISTIC_GEOMETRY_SHADER_INVOCATIONS_BIT = 0x00000008,
396     /* Geometry shader primitives bit */
397     CORE_QUERY_PIPELINE_STATISTIC_GEOMETRY_SHADER_PRIMITIVES_BIT = 0x00000010,
398     /** Clipping invocations bit */
399     CORE_QUERY_PIPELINE_STATISTIC_CLIPPING_INVOCATIONS_BIT = 0x00000020,
400     /** Clipping primitives bit */
401     CORE_QUERY_PIPELINE_STATISTIC_CLIPPING_PRIMITIVES_BIT = 0x00000040,
402     /** Fragment shader invocations bit */
403     CORE_QUERY_PIPELINE_STATISTIC_FRAGMENT_SHADER_INVOCATIONS_BIT = 0x00000080,
404     /* Tesselation control shader patches bit */
405     CORE_QUERY_PIPELINE_STATISTIC_TESSELLATION_CONTROL_SHADER_PATCHES_BIT = 0x00000100,
406     /* Tesselation evaluation shader invocations bit */
407     CORE_QUERY_PIPELINE_STATISTIC_TESSELLATION_EVALUATION_SHADER_INVOCATIONS_BIT = 0x00000200,
408     /** Compute shader invocations bit */
409     CORE_QUERY_PIPELINE_STATISTIC_COMPUTE_SHADER_INVOCATIONS_BIT = 0x00000400,
410 };
411 /** Query pipeline statistic flags */
412 using QueryPipelineStatisticFlags = uint32_t;
413 
414 /** Query type */
415 enum QueryType {
416     /** Timestamp */
417     CORE_QUERY_TYPE_TIMESTAMP = 2,
418     /** Max enumeration */
419     CORE_QUERY_TYPE_MAX_ENUM = 0x7FFFFFFF
420 };
421 
422 /** Vertex input rate */
423 enum VertexInputRate {
424     /** Vertex */
425     CORE_VERTEX_INPUT_RATE_VERTEX = 0,
426     /** Instance */
427     CORE_VERTEX_INPUT_RATE_INSTANCE = 1,
428 };
429 
430 /** Polygon mode */
431 enum PolygonMode {
432     /** Fill */
433     CORE_POLYGON_MODE_FILL = 0,
434     /** Line */
435     CORE_POLYGON_MODE_LINE = 1,
436     /** Point */
437     CORE_POLYGON_MODE_POINT = 2,
438 };
439 
440 /** Cull mode flag bits */
441 enum CullModeFlagBits {
442     /** None */
443     CORE_CULL_MODE_NONE = 0,
444     /** Front bit */
445     CORE_CULL_MODE_FRONT_BIT = 0x00000001,
446     /** Back bit */
447     CORE_CULL_MODE_BACK_BIT = 0x00000002,
448     /** Front and back bit */
449     CORE_CULL_MODE_FRONT_AND_BACK = 0x00000003,
450 };
451 /** Cull mode flags */
452 using CullModeFlags = uint32_t;
453 
454 /** Front face */
455 enum FrontFace {
456     /** Counter clockwise */
457     CORE_FRONT_FACE_COUNTER_CLOCKWISE = 0,
458     /** Clockwise */
459     CORE_FRONT_FACE_CLOCKWISE = 1,
460 };
461 
462 /** Stencil face flag bits */
463 enum StencilFaceFlagBits {
464     /** Face front bit */
465     CORE_STENCIL_FACE_FRONT_BIT = 0x00000001,
466     /** Face back bit */
467     CORE_STENCIL_FACE_BACK_BIT = 0x00000002,
468     /** Front and back */
469     CORE_STENCIL_FRONT_AND_BACK = 0x00000003,
470 };
471 /** Lume stencil face flags */
472 using StencilFaceFlags = uint32_t;
473 
474 /** Compare op */
475 enum CompareOp {
476     /** Never */
477     CORE_COMPARE_OP_NEVER = 0,
478     /** Less */
479     CORE_COMPARE_OP_LESS = 1,
480     /** Equal */
481     CORE_COMPARE_OP_EQUAL = 2,
482     /** Less or equal */
483     CORE_COMPARE_OP_LESS_OR_EQUAL = 3,
484     /** Greater */
485     CORE_COMPARE_OP_GREATER = 4,
486     /** Not equal */
487     CORE_COMPARE_OP_NOT_EQUAL = 5,
488     /** Greater or equal */
489     CORE_COMPARE_OP_GREATER_OR_EQUAL = 6,
490     /** Always */
491     CORE_COMPARE_OP_ALWAYS = 7,
492 };
493 
494 /** Stencil op */
495 enum StencilOp {
496     /** Keep */
497     CORE_STENCIL_OP_KEEP = 0,
498     /** Zero */
499     CORE_STENCIL_OP_ZERO = 1,
500     /** Replace */
501     CORE_STENCIL_OP_REPLACE = 2,
502     /** Increment and clamp */
503     CORE_STENCIL_OP_INCREMENT_AND_CLAMP = 3,
504     /** Decrement and clamp */
505     CORE_STENCIL_OP_DECREMENT_AND_CLAMP = 4,
506     /** Invert */
507     CORE_STENCIL_OP_INVERT = 5,
508     /** Increment and wrap */
509     CORE_STENCIL_OP_INCREMENT_AND_WRAP = 6,
510     /** Decrement and wrap */
511     CORE_STENCIL_OP_DECREMENT_AND_WRAP = 7,
512 };
513 
514 /** Primitive topology */
515 enum PrimitiveTopology {
516     /** Point list */
517     CORE_PRIMITIVE_TOPOLOGY_POINT_LIST = 0,
518     /** Line list */
519     CORE_PRIMITIVE_TOPOLOGY_LINE_LIST = 1,
520     /** Line strip */
521     CORE_PRIMITIVE_TOPOLOGY_LINE_STRIP = 2,
522     /** Triangle list */
523     CORE_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST = 3,
524     /** Triangle strip */
525     CORE_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP = 4,
526     /** Triangle fan */
527     CORE_PRIMITIVE_TOPOLOGY_TRIANGLE_FAN = 5,
528     /** Line list with adjacency */
529     CORE_PRIMITIVE_TOPOLOGY_LINE_LIST_WITH_ADJACENCY = 6,
530     /** Line strip with adjacency */
531     CORE_PRIMITIVE_TOPOLOGY_LINE_STRIP_WITH_ADJACENCY = 7,
532     /** Triangle list with adjacency */
533     CORE_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_WITH_ADJACENCY = 8,
534     /** Triangle strip with adjacency */
535     CORE_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_WITH_ADJACENCY = 9,
536     /** Patch list */
537     CORE_PRIMITIVE_TOPOLOGY_PATCH_LIST = 10,
538     /** Max enum (not defined) */
539     CORE_PRIMITIVE_TOPOLOGY_MAX_ENUM = 0x7FFFFFFF,
540 };
541 
542 /** Blend factor */
543 enum BlendFactor {
544     /** Zero */
545     CORE_BLEND_FACTOR_ZERO = 0,
546     /** One */
547     CORE_BLEND_FACTOR_ONE = 1,
548     /** Source color */
549     CORE_BLEND_FACTOR_SRC_COLOR = 2,
550     /** One minus source color */
551     CORE_BLEND_FACTOR_ONE_MINUS_SRC_COLOR = 3,
552     /** Destination color */
553     CORE_BLEND_FACTOR_DST_COLOR = 4,
554     /** One minus destination color */
555     CORE_BLEND_FACTOR_ONE_MINUS_DST_COLOR = 5,
556     /** Source alpha */
557     CORE_BLEND_FACTOR_SRC_ALPHA = 6,
558     /** One minus source alpha */
559     CORE_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA = 7,
560     /** Destination alpha */
561     CORE_BLEND_FACTOR_DST_ALPHA = 8,
562     /** One minus destination alpha */
563     CORE_BLEND_FACTOR_ONE_MINUS_DST_ALPHA = 9,
564     /** Constant color */
565     CORE_BLEND_FACTOR_CONSTANT_COLOR = 10,
566     /** One minus constant color */
567     CORE_BLEND_FACTOR_ONE_MINUS_CONSTANT_COLOR = 11,
568     /** Constant alpha */
569     CORE_BLEND_FACTOR_CONSTANT_ALPHA = 12,
570     /** One minus constant alpha */
571     CORE_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA = 13,
572     /** Source alpha saturate */
573     CORE_BLEND_FACTOR_SRC_ALPHA_SATURATE = 14,
574     /** Source one color */
575     CORE_BLEND_FACTOR_SRC1_COLOR = 15,
576     /** One minus source one color */
577     CORE_BLEND_FACTOR_ONE_MINUS_SRC1_COLOR = 16,
578     /** Source one alpha */
579     CORE_BLEND_FACTOR_SRC1_ALPHA = 17,
580     /** One minus source one alpha */
581     CORE_BLEND_FACTOR_ONE_MINUS_SRC1_ALPHA = 18,
582 };
583 
584 /** Blend op */
585 enum BlendOp {
586     /** Add */
587     CORE_BLEND_OP_ADD = 0,
588     /** Subtract */
589     CORE_BLEND_OP_SUBTRACT = 1,
590     /** Reverse subtract */
591     CORE_BLEND_OP_REVERSE_SUBTRACT = 2,
592     /** Min */
593     CORE_BLEND_OP_MIN = 3,
594     /** Max */
595     CORE_BLEND_OP_MAX = 4,
596 };
597 
598 /** Color component flag bits */
599 enum ColorComponentFlagBits {
600     /** Red bit */
601     CORE_COLOR_COMPONENT_R_BIT = 0x00000001,
602     /** Green bit */
603     CORE_COLOR_COMPONENT_G_BIT = 0x00000002,
604     /** Blue bit */
605     CORE_COLOR_COMPONENT_B_BIT = 0x00000004,
606     /** Alpha bit */
607     CORE_COLOR_COMPONENT_A_BIT = 0x00000008,
608 };
609 /** Color component flags */
610 using ColorComponentFlags = uint32_t;
611 
612 /** Logic op */
613 enum LogicOp {
614     /** Clear */
615     CORE_LOGIC_OP_CLEAR = 0,
616     /** And */
617     CORE_LOGIC_OP_AND = 1,
618     /** And reverse */
619     CORE_LOGIC_OP_AND_REVERSE = 2,
620     /** Copy */
621     CORE_LOGIC_OP_COPY = 3,
622     /** And inverted */
623     CORE_LOGIC_OP_AND_INVERTED = 4,
624     /** No op */
625     CORE_LOGIC_OP_NO_OP = 5,
626     /** Xor */
627     CORE_LOGIC_OP_XOR = 6,
628     /** Or */
629     CORE_LOGIC_OP_OR = 7,
630     /** Nor */
631     CORE_LOGIC_OP_NOR = 8,
632     /** Equivalent */
633     CORE_LOGIC_OP_EQUIVALENT = 9,
634     /** Invert */
635     CORE_LOGIC_OP_INVERT = 10,
636     /** Or reverse */
637     CORE_LOGIC_OP_OR_REVERSE = 11,
638     /** Copy inverted */
639     CORE_LOGIC_OP_COPY_INVERTED = 12,
640     /** Or inverted */
641     CORE_LOGIC_OP_OR_INVERTED = 13,
642     /** Nand */
643     CORE_LOGIC_OP_NAND = 14,
644     /** Set */
645     CORE_LOGIC_OP_SET = 15,
646 };
647 
648 /** Attachment load op */
649 enum AttachmentLoadOp {
650     /** Load */
651     CORE_ATTACHMENT_LOAD_OP_LOAD = 0,
652     /** Clear */
653     CORE_ATTACHMENT_LOAD_OP_CLEAR = 1,
654     /** Dont care */
655     CORE_ATTACHMENT_LOAD_OP_DONT_CARE = 2,
656 };
657 
658 /** Attachment store op */
659 enum AttachmentStoreOp {
660     /** Store */
661     CORE_ATTACHMENT_STORE_OP_STORE = 0,
662     /** Dont care */
663     CORE_ATTACHMENT_STORE_OP_DONT_CARE = 1,
664 };
665 
666 /** Clear color value */
667 union ClearColorValue {
668     ClearColorValue() = default;
669     ~ClearColorValue() = default;
ClearColorValue(float r,float g,float b,float a)670     constexpr ClearColorValue(float r, float g, float b, float a) : float32 { r, g, b, a } {};
ClearColorValue(int32_t r,int32_t g,int32_t b,int32_t a)671     constexpr ClearColorValue(int32_t r, int32_t g, int32_t b, int32_t a) : int32 { r, g, b, a } {};
ClearColorValue(uint32_t r,uint32_t g,uint32_t b,uint32_t a)672     constexpr ClearColorValue(uint32_t r, uint32_t g, uint32_t b, uint32_t a) : uint32 { r, g, b, a } {};
673     /** Float32 array of 4 */
674     float float32[4];
675     /** int32 array of 4 */
676     int32_t int32[4];
677     /** uint32 array of 4 */
678     uint32_t uint32[4];
679 };
680 
681 /** Clear depth stencil value */
682 struct ClearDepthStencilValue {
683     /** Depth, default value 1.0f */
684     float depth;
685     /** Stencil */
686     uint32_t stencil;
687 };
688 
689 /** Clear value */
690 union ClearValue {
691     ClearValue() = default;
692     ~ClearValue() = default;
ClearValue(const ClearColorValue & color)693     constexpr explicit ClearValue(const ClearColorValue& color) : color { color } {};
ClearValue(const ClearDepthStencilValue & depthStencil)694     constexpr explicit ClearValue(const ClearDepthStencilValue& depthStencil) : depthStencil { depthStencil } {};
ClearValue(float r,float g,float b,float a)695     constexpr ClearValue(float r, float g, float b, float a) : color { r, g, b, a } {};
ClearValue(int32_t r,int32_t g,int32_t b,int32_t a)696     constexpr ClearValue(int32_t r, int32_t g, int32_t b, int32_t a) : color { r, g, b, a } {};
ClearValue(uint32_t r,uint32_t g,uint32_t b,uint32_t a)697     constexpr ClearValue(uint32_t r, uint32_t g, uint32_t b, uint32_t a) : color { r, g, b, a } {};
ClearValue(float depth,uint32_t stencil)698     constexpr ClearValue(float depth, uint32_t stencil) : depthStencil { depth, stencil } {};
699 
700     /** Color */
701     ClearColorValue color;
702     /** Depth stencil */
703     ClearDepthStencilValue depthStencil;
704 };
705 
706 /** Dynamic state flag bits
707  * Dynamic state flags only map to basic dynamic states.
708  * Use DynamicStateEnum s when creating the actual pso objects.
709  */
710 enum DynamicStateFlagBits {
711     /** Undefined */
712     CORE_DYNAMIC_STATE_UNDEFINED = 0,
713     /** Viewport */
714     CORE_DYNAMIC_STATE_VIEWPORT = (1 << 0),
715     /** Scissor */
716     CORE_DYNAMIC_STATE_SCISSOR = (1 << 1),
717     /** Line width */
718     CORE_DYNAMIC_STATE_LINE_WIDTH = (1 << 2),
719     /** Depth bias */
720     CORE_DYNAMIC_STATE_DEPTH_BIAS = (1 << 3),
721     /** Blend constants */
722     CORE_DYNAMIC_STATE_BLEND_CONSTANTS = (1 << 4),
723     /** Depth bounds */
724     CORE_DYNAMIC_STATE_DEPTH_BOUNDS = (1 << 5),
725     /** Stencil compare mask */
726     CORE_DYNAMIC_STATE_STENCIL_COMPARE_MASK = (1 << 6),
727     /** Stencil write mask */
728     CORE_DYNAMIC_STATE_STENCIL_WRITE_MASK = (1 << 7),
729     /** Stencil reference */
730     CORE_DYNAMIC_STATE_STENCIL_REFERENCE = (1 << 8),
731 };
732 /** Dynamic state flags */
733 using DynamicStateFlags = uint32_t;
734 
735 /** Dynamic states */
736 enum DynamicStateEnum {
737     /** Viewport */
738     CORE_DYNAMIC_STATE_ENUM_VIEWPORT = 0,
739     /** Scissor */
740     CORE_DYNAMIC_STATE_ENUM_SCISSOR = 1,
741     /** Line width */
742     CORE_DYNAMIC_STATE_ENUM_LINE_WIDTH = 2,
743     /** Depth bias */
744     CORE_DYNAMIC_STATE_ENUM_DEPTH_BIAS = 3,
745     /** Blend constants */
746     CORE_DYNAMIC_STATE_ENUM_BLEND_CONSTANTS = 4,
747     /** Depth bounds */
748     CORE_DYNAMIC_STATE_ENUM_DEPTH_BOUNDS = 5,
749     /** Stencil compare mask */
750     CORE_DYNAMIC_STATE_ENUM_STENCIL_COMPARE_MASK = 6,
751     /** Stencil write mask */
752     CORE_DYNAMIC_STATE_ENUM_STENCIL_WRITE_MASK = 7,
753     /** Stencil reference */
754     CORE_DYNAMIC_STATE_ENUM_STENCIL_REFERENCE = 8,
755     /** Fragment shading rate */
756     CORE_DYNAMIC_STATE_ENUM_FRAGMENT_SHADING_RATE = 1000226000,
757     /** Max enumeration */
758     CORE_DYNAMIC_STATE_ENUM_MAX_ENUM = 0x7FFFFFFF
759 };
760 
761 /** Resolve mode flag bits */
762 enum ResolveModeFlagBits {
763     /** None. No resolve mode done */
764     CORE_RESOLVE_MODE_NONE = 0,
765     /** Resolve value is same as sample zero */
766     CORE_RESOLVE_MODE_SAMPLE_ZERO_BIT = 0x00000001,
767     /** Resolve value is same as average of all samples */
768     CORE_RESOLVE_MODE_AVERAGE_BIT = 0x00000002,
769     /** Resolve value is same as min of all samples */
770     CORE_RESOLVE_MODE_MIN_BIT = 0x00000004,
771     /** Resolve value is same as max of all samples */
772     CORE_RESOLVE_MODE_MAX_BIT = 0x00000008,
773 };
774 /** Resolve mode flags */
775 using ResolveModeFlags = uint32_t;
776 
777 /** SubpassContents Specifies how commands in the first subpass are provided
778  * CORE_SUBPASS_CONTENTS_INLINE == subpasses are recorded to the same render command list
779  * CORE_SUBPASS_CONTENTS_SECONDARY_COMMAND_LISTS == subpasses are recorded to secondary command lists
780  */
781 enum SubpassContents {
782     /** Inline */
783     CORE_SUBPASS_CONTENTS_INLINE = 0,
784     /* Secondary command lists */
785     CORE_SUBPASS_CONTENTS_SECONDARY_COMMAND_LISTS = 1,
786 };
787 
788 /** Subpass flag bits
789  */
790 enum SubpassFlagBits {
791     /* Merge subpass to previous subpasses */
792     CORE_SUBPASS_MERGE_BIT = 1,
793 };
794 /** Subpass flags */
795 using SubpassFlags = uint32_t;
796 
797 /** Fragment shading rate combiner op */
798 enum FragmentShadingRateCombinerOp {
799     /** Keep */
800     CORE_FRAGMENT_SHADING_RATE_COMBINER_OP_KEEP = 0,
801     /** Replace */
802     CORE_FRAGMENT_SHADING_RATE_COMBINER_OP_REPLACE = 1,
803     /** Min */
804     CORE_FRAGMENT_SHADING_RATE_COMBINER_OP_MIN = 2,
805     /** Max */
806     CORE_FRAGMENT_SHADING_RATE_COMBINER_OP_MAX = 3,
807     /** Mul */
808     CORE_FRAGMENT_SHADING_RATE_COMBINER_OP_MUL = 4,
809 };
810 
811 /** Fragment shading rate combiner operations for commands */
812 struct FragmentShadingRateCombinerOps {
813     /** First combiner (combine pipeline and primitive shading rates) */
814     FragmentShadingRateCombinerOp op1 { CORE_FRAGMENT_SHADING_RATE_COMBINER_OP_KEEP };
815     /** Second combiner (combine the first with attachment fragment shading rate) */
816     FragmentShadingRateCombinerOp op2 { CORE_FRAGMENT_SHADING_RATE_COMBINER_OP_KEEP };
817 };
818 
819 /** Pipeline state constants */
820 struct PipelineStateConstants {
821     /** GPU buffer whole size */
822     static constexpr uint32_t GPU_BUFFER_WHOLE_SIZE { ~0u };
823     /** GPU image all mip levels */
824     static constexpr uint32_t GPU_IMAGE_ALL_MIP_LEVELS { ~0u };
825     /** GPU image all layers */
826     static constexpr uint32_t GPU_IMAGE_ALL_LAYERS { ~0u };
827     /** Max vertex buffer count */
828     static constexpr uint32_t MAX_VERTEX_BUFFER_COUNT { 8u };
829 
830     /** Max input attachment count */
831     static constexpr uint32_t MAX_INPUT_ATTACHMENT_COUNT { 8u };
832     /** Max color attachment count */
833     static constexpr uint32_t MAX_COLOR_ATTACHMENT_COUNT { 8u };
834     /** Max resolve attachment count */
835     static constexpr uint32_t MAX_RESOLVE_ATTACHMENT_COUNT { 4u };
836     /** Max render pass attachment count */
837     static constexpr uint32_t MAX_RENDER_PASS_ATTACHMENT_COUNT { 8u };
838     /** Max render node gpu wait signals */
839     static constexpr uint32_t MAX_RENDER_NODE_GPU_WAIT_SIGNALS { 4u };
840 
841     /** Acceleration structure instance byte size */
842     static constexpr uint32_t ACCELERATION_STRUCTURE_INSTANCE_SIZE { 64u };
843 };
844 
845 /** Viewport descriptor
846  * x and y are upper left corner (x,y) */
847 struct ViewportDesc {
848     /** X point */
849     float x { 0.0f };
850     /** Y point */
851     float y { 0.0f };
852     /** Width */
853     float width { 0.0f };
854     /** Height */
855     float height { 0.0f };
856 
857     /** Min depth (0.0f - 1.0f) */
858     float minDepth { 0.0f };
859     /** Max depth (0.0f - 1.0f) */
860     float maxDepth { 1.0f };
861 };
862 
863 /** Scissor descriptor */
864 struct ScissorDesc {
865     /** X offset */
866     int32_t offsetX { 0 };
867     /** Y offset */
868     int32_t offsetY { 0 };
869     /** Extent width */
870     uint32_t extentWidth { 0 };
871     /** Extent height */
872     uint32_t extentHeight { 0 };
873 };
874 
875 /** Image subresource layers */
876 struct ImageSubresourceLayers {
877     /** Image aspect flags */
878     ImageAspectFlags imageAspectFlags { 0 };
879     /** Mip level */
880     uint32_t mipLevel { 0 };
881     /** Base array layer */
882     uint32_t baseArrayLayer { 0 };
883     /** Layer count */
884     uint32_t layerCount { PipelineStateConstants::GPU_IMAGE_ALL_LAYERS };
885 };
886 
887 /** Image subresource range */
888 struct ImageSubresourceRange {
889     /** Image aspect flags */
890     ImageAspectFlags imageAspectFlags { 0 };
891     /** Base mip level */
892     uint32_t baseMipLevel { 0 };
893     /** Level count */
894     uint32_t levelCount { PipelineStateConstants::GPU_IMAGE_ALL_MIP_LEVELS };
895     /** Base array layer */
896     uint32_t baseArrayLayer { 0 };
897     /** Layer count */
898     uint32_t layerCount { PipelineStateConstants::GPU_IMAGE_ALL_LAYERS };
899 };
900 
901 /** Image blit */
902 struct ImageBlit {
903     /** Source subresource */
904     ImageSubresourceLayers srcSubresource;
905     /** Source offsets (top left and bottom right coordinates) */
906     Size3D srcOffsets[2u];
907     /** Destination subresource */
908     ImageSubresourceLayers dstSubresource;
909     /** Destination offsets (top left and bottom right coordinates) */
910     Size3D dstOffsets[2u];
911 };
912 
913 /** Memory barrier with pipeline stages */
914 struct GeneralBarrier {
915     /** Access flags */
916     AccessFlags accessFlags { 0 };
917     /** Pipeline stage flags */
918     PipelineStageFlags pipelineStageFlags { 0 };
919 };
920 
921 /** Buffer resource barrier */
922 struct BufferResourceBarrier {
923     /** Access flags */
924     AccessFlags accessFlags { 0 };
925     /** Pipeline stage flags */
926     PipelineStageFlags pipelineStageFlags { 0 };
927 };
928 
929 /** Image resource barrier */
930 struct ImageResourceBarrier {
931     /** Access flags */
932     AccessFlags accessFlags { 0 };
933     /** Pipeline stage flags */
934     PipelineStageFlags pipelineStageFlags { 0 };
935     /** Image layout */
936     ImageLayout imageLayout { ImageLayout::CORE_IMAGE_LAYOUT_UNDEFINED };
937 };
938 
939 /** Buffer copy */
940 struct BufferCopy {
941     /** Offset to source buffer */
942     uint32_t srcOffset { 0 };
943     /** Offset to destination buffer */
944     uint32_t dstOffset { 0 };
945     /** Size of copy */
946     uint32_t size { 0 };
947 };
948 
949 /** Buffer image copy */
950 struct BufferImageCopy {
951     /** Buffer offset */
952     uint32_t bufferOffset { 0 };
953     /** Buffer row length */
954     uint32_t bufferRowLength { 0 };
955     /** Buffer image height */
956     uint32_t bufferImageHeight { 0 };
957     /** Image subresource */
958     ImageSubresourceLayers imageSubresource;
959     /** Image offset */
960     Size3D imageOffset;
961     /** Image extent */
962     Size3D imageExtent;
963 };
964 
965 /** Image copy */
966 struct ImageCopy {
967     /** Src image subresource */
968     ImageSubresourceLayers srcSubresource;
969     /** Src offset */
970     Offset3D srcOffset;
971     /** Dst image subresource */
972     ImageSubresourceLayers dstSubresource;
973     /** Dst offset */
974     Offset3D dstOffset;
975     /** Texel size of copy */
976     Size3D extent;
977 };
978 
979 /** GPU resource state in pipeline */
980 struct GpuResourceState {
981     /** Shader stage flags */
982     ShaderStageFlags shaderStageFlags { 0 };
983 
984     /** Access flags */
985     AccessFlags accessFlags { 0 };
986     /** Pipeline stage flags */
987     PipelineStageFlags pipelineStageFlags { 0 };
988 
989     /** GPU queue */
990     GpuQueue gpuQueue {};
991 };
992 
993 /** Render pass descriptor */
994 struct RenderPassDesc {
995     /** Render area */
996     struct RenderArea {
997         /** X offset */
998         int32_t offsetX { 0 };
999         /** Y offset */
1000         int32_t offsetY { 0 };
1001         /** Extent width */
1002         uint32_t extentWidth { 0u };
1003         /** Extent height */
1004         uint32_t extentHeight { 0u };
1005     };
1006 
1007     /** Attachment descriptor */
1008     struct AttachmentDesc {
1009         /** Layer for layered image */
1010         uint32_t layer { 0u };
1011         /** Mip level to target on mipped image */
1012         uint32_t mipLevel { 0u };
1013 
1014         // following values are not needed in render pass compatibility
1015         /** Load operation */
1016         AttachmentLoadOp loadOp { AttachmentLoadOp::CORE_ATTACHMENT_LOAD_OP_DONT_CARE };
1017         /** Store operation */
1018         AttachmentStoreOp storeOp { AttachmentStoreOp::CORE_ATTACHMENT_STORE_OP_DONT_CARE };
1019 
1020         /** Stencil load operation */
1021         AttachmentLoadOp stencilLoadOp { AttachmentLoadOp::CORE_ATTACHMENT_LOAD_OP_DONT_CARE };
1022         /** Stencil store operation */
1023         AttachmentStoreOp stencilStoreOp { AttachmentStoreOp::CORE_ATTACHMENT_STORE_OP_DONT_CARE };
1024 
1025         /** Clear value (union ClearColorValue or ClearDepthStencilValue) */
1026         ClearValue clearValue {};
1027     };
1028 
1029     /** Attachment count */
1030     uint32_t attachmentCount { 0u };
1031 
1032     /** Attachment handles */
1033     RenderHandle attachmentHandles[PipelineStateConstants::MAX_RENDER_PASS_ATTACHMENT_COUNT];
1034     /** Attachments */
1035     AttachmentDesc attachments[PipelineStateConstants::MAX_RENDER_PASS_ATTACHMENT_COUNT];
1036 
1037     /** Render area */
1038     RenderArea renderArea;
1039 
1040     /** Subpass count */
1041     uint32_t subpassCount { 0u };
1042     /** Subpass contents */
1043     SubpassContents subpassContents { SubpassContents::CORE_SUBPASS_CONTENTS_INLINE };
1044 };
1045 
1046 /** Render pass descriptor with render handle references */
1047 struct RenderPassDescWithHandleReference {
1048     /** Attachment count */
1049     uint32_t attachmentCount { 0u };
1050 
1051     /** Attachment handles */
1052     RenderHandleReference attachmentHandles[PipelineStateConstants::MAX_RENDER_PASS_ATTACHMENT_COUNT];
1053     /** Attachments */
1054     RenderPassDesc::AttachmentDesc attachments[PipelineStateConstants::MAX_RENDER_PASS_ATTACHMENT_COUNT];
1055 
1056     /** Render area */
1057     RenderPassDesc::RenderArea renderArea;
1058 
1059     /** Subpass count */
1060     uint32_t subpassCount { 0u };
1061     /** Subpass contents */
1062     SubpassContents subpassContents { SubpassContents::CORE_SUBPASS_CONTENTS_INLINE };
1063 };
1064 
1065 /** Render pass subpass descriptor */
1066 struct RenderPassSubpassDesc {
1067     // indices to render pass attachments
1068     /** Depth attachment index */
1069     uint32_t depthAttachmentIndex { ~0u };
1070     /** Depth resolve attachment index */
1071     uint32_t depthResolveAttachmentIndex { ~0u };
1072     /** Input attachment indices */
1073     uint32_t inputAttachmentIndices[PipelineStateConstants::MAX_INPUT_ATTACHMENT_COUNT] {};
1074     /** Color attachment indices */
1075     uint32_t colorAttachmentIndices[PipelineStateConstants::MAX_COLOR_ATTACHMENT_COUNT] {};
1076     /** Resolve attachment indices */
1077     uint32_t resolveAttachmentIndices[PipelineStateConstants::MAX_RESOLVE_ATTACHMENT_COUNT] {};
1078     /** Fragment shading rate attachment index */
1079     uint32_t fragmentShadingRateAttachmentIndex { ~0u };
1080 
1081     // attachment counts in this subpass
1082     /** Depth attachment count in this subpass */
1083     uint32_t depthAttachmentCount { 0u };
1084     /** Depth resolve attachment count in this subpass */
1085     uint32_t depthResolveAttachmentCount { 0u };
1086     /** Input attachment count in this subpass */
1087     uint32_t inputAttachmentCount { 0u };
1088     /** Color attachment count in this subpass */
1089     uint32_t colorAttachmentCount { 0u };
1090     /** Resolve attachment count in this subpass */
1091     uint32_t resolveAttachmentCount { 0u };
1092     /** Fragmend shading rate attachment count in this subpass */
1093     uint32_t fragmentShadingRateAttachmentCount { 0u };
1094 
1095     /** Depth resolve mode flag bit */
1096     ResolveModeFlags depthResolveModeFlags { ResolveModeFlagBits::CORE_RESOLVE_MODE_NONE };
1097     /** Stencil resolve mode flag bit */
1098     ResolveModeFlags stencilResolveModeFlags { ResolveModeFlagBits::CORE_RESOLVE_MODE_NONE };
1099 
1100     /** Shading rate texel size for subpass (will be clamped to device limits automatically if not set accordingly) */
1101     Size2D shadingRateTexelSize { 1u, 1u };
1102 
1103     /** Multi-view bitfield of view indices. Multi-view is ignored while zero. */
1104     uint32_t viewMask { 0u };
1105 
1106     /** Subpass flags */
1107     SubpassFlags subpassFlags { 0u };
1108 };
1109 
1110 /** Render pass */
1111 struct RenderPass {
1112     /** Render pass descriptor */
1113     RenderPassDesc renderPassDesc;
1114     /** Subpass start index */
1115     uint32_t subpassStartIndex { 0u };
1116     /** Subpass descriptor */
1117     RenderPassSubpassDesc subpassDesc;
1118 };
1119 
1120 /** Render pass with render handle references */
1121 struct RenderPassWithHandleReference {
1122     /** Render pass descriptor */
1123     RenderPassDescWithHandleReference renderPassDesc;
1124     /** Subpass start index */
1125     uint32_t subpassStartIndex { 0u };
1126     /** Subpass descriptor */
1127     RenderPassSubpassDesc subpassDesc;
1128 };
1129 
1130 /** Forced graphics state flag bits */
1131 enum GraphicsStateFlagBits {
1132     /** Input assembly bit */
1133     CORE_GRAPHICS_STATE_INPUT_ASSEMBLY_BIT = 0x00000001,
1134     /** Rastarization state bit */
1135     CORE_GRAPHICS_STATE_RASTERIZATION_STATE_BIT = 0x00000002,
1136     /** Depth stencil state bit */
1137     CORE_GRAPHICS_STATE_DEPTH_STENCIL_STATE_BIT = 0x00000004,
1138     /** Color blend state bit */
1139     CORE_GRAPHICS_STATE_COLOR_BLEND_STATE_BIT = 0x00000008,
1140 };
1141 /** Container for graphics state flag bits */
1142 using GraphicsStateFlags = uint32_t;
1143 
1144 /** Graphics state */
1145 struct GraphicsState {
1146     /** Stencil operation state */
1147     struct StencilOpState {
1148         /** Fail operation */
1149         StencilOp failOp { StencilOp::CORE_STENCIL_OP_KEEP };
1150         /** Pass operation */
1151         StencilOp passOp { StencilOp::CORE_STENCIL_OP_KEEP };
1152         /** Depth fail operation */
1153         StencilOp depthFailOp { StencilOp::CORE_STENCIL_OP_KEEP };
1154         /** Compare operation */
1155         CompareOp compareOp { CompareOp::CORE_COMPARE_OP_NEVER };
1156         /** Compare mask */
1157         uint32_t compareMask { 0 };
1158         /** Write mask */
1159         uint32_t writeMask { 0 };
1160         /** Reference */
1161         uint32_t reference { 0 };
1162     };
1163 
1164     /** Rasterization state */
1165     struct RasterizationState {
1166         /** Enable depth clamp */
1167         bool enableDepthClamp { false };
1168         /** Enable depth bias */
1169         bool enableDepthBias { false };
1170         /** Enable rasterizer discard */
1171         bool enableRasterizerDiscard { false };
1172 
1173         /** Polygon mode */
1174         PolygonMode polygonMode { PolygonMode::CORE_POLYGON_MODE_FILL };
1175         /** Cull mode flags */
1176         CullModeFlags cullModeFlags { CullModeFlagBits::CORE_CULL_MODE_NONE };
1177         /** Front face */
1178         FrontFace frontFace { FrontFace::CORE_FRONT_FACE_COUNTER_CLOCKWISE };
1179 
1180         /** Depth bias constant factor */
1181         float depthBiasConstantFactor { 0.0f };
1182         /** Depth bias clamp */
1183         float depthBiasClamp { 0.0f };
1184         /** Depth bias slope factor */
1185         float depthBiasSlopeFactor { 0.0f };
1186 
1187         /** Line width */
1188         float lineWidth { 1.0f };
1189     };
1190 
1191     /** Depth stencil state */
1192     struct DepthStencilState {
1193         /** Enable depth test */
1194         bool enableDepthTest { false };
1195         /** Enable depth write */
1196         bool enableDepthWrite { false };
1197         /** Enable depth bounds test */
1198         bool enableDepthBoundsTest { false };
1199         /** Enable stencil test */
1200         bool enableStencilTest { false };
1201 
1202         /** Min depth bounds */
1203         float minDepthBounds { 0.0f };
1204         /** Max depth bounds */
1205         float maxDepthBounds { 1.0f };
1206 
1207         /** Depth compare operation */
1208         CompareOp depthCompareOp { CompareOp::CORE_COMPARE_OP_NEVER };
1209         /** Front stencil operation state */
1210         StencilOpState frontStencilOpState {};
1211         /** Back stencil operation state */
1212         StencilOpState backStencilOpState {};
1213     };
1214 
1215     /** Color blend state */
1216     struct ColorBlendState {
1217         /** Attachment */
1218         struct Attachment {
1219             /** Enable blend */
1220             bool enableBlend { false };
1221             /** Color write mask */
1222             ColorComponentFlags colorWriteMask { ColorComponentFlagBits::CORE_COLOR_COMPONENT_R_BIT |
1223                                                  ColorComponentFlagBits::CORE_COLOR_COMPONENT_G_BIT |
1224                                                  ColorComponentFlagBits::CORE_COLOR_COMPONENT_B_BIT |
1225                                                  ColorComponentFlagBits::CORE_COLOR_COMPONENT_A_BIT };
1226 
1227             /** Source color blend factor */
1228             BlendFactor srcColorBlendFactor { BlendFactor::CORE_BLEND_FACTOR_ONE };
1229             /** Destination color blend factor */
1230             BlendFactor dstColorBlendFactor { BlendFactor::CORE_BLEND_FACTOR_ONE };
1231             /** Color blend operation */
1232             BlendOp colorBlendOp { BlendOp::CORE_BLEND_OP_ADD };
1233 
1234             /** Source alpha blend factor */
1235             BlendFactor srcAlphaBlendFactor { BlendFactor::CORE_BLEND_FACTOR_ONE };
1236             /** Destination alpha blend factor */
1237             BlendFactor dstAlphaBlendFactor { BlendFactor::CORE_BLEND_FACTOR_ONE };
1238             /** Alpha blend operation */
1239             BlendOp alphaBlendOp { BlendOp::CORE_BLEND_OP_ADD };
1240         };
1241 
1242         /** Enable logic operation */
1243         bool enableLogicOp { false };
1244         /** Logic operation */
1245         LogicOp logicOp { LogicOp::CORE_LOGIC_OP_NO_OP };
1246 
1247         /** Color blend constants (R, G, B, A) */
1248         float colorBlendConstants[4u] { 0.0f, 0.0f, 0.0f, 0.0f };
1249         /** Color attachment count */
1250         uint32_t colorAttachmentCount { 0 };
1251         /** Color attachments */
1252         Attachment colorAttachments[PipelineStateConstants::MAX_COLOR_ATTACHMENT_COUNT];
1253     };
1254 
1255     /** Input assembly */
1256     struct InputAssembly {
1257         /** Enable primitive restart */
1258         bool enablePrimitiveRestart { false };
1259         /** Primitive topology */
1260         PrimitiveTopology primitiveTopology { PrimitiveTopology::CORE_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST };
1261     };
1262 
1263     /** Input assembly */
1264     InputAssembly inputAssembly;
1265     /** Rasterization state */
1266     RasterizationState rasterizationState;
1267     /** Depth stencil state */
1268     DepthStencilState depthStencilState;
1269     /** Color blend state */
1270     ColorBlendState colorBlendState;
1271 };
1272 
1273 /** Vertex input declaration */
1274 struct VertexInputDeclaration {
1275     /** Vertex input binding description */
1276     struct VertexInputBindingDescription {
1277         /** Binding */
1278         uint32_t binding { ~0u };
1279         /** Stride */
1280         uint32_t stride { 0u };
1281         /** Vertex input rate */
1282         VertexInputRate vertexInputRate { VertexInputRate::CORE_VERTEX_INPUT_RATE_VERTEX };
1283     };
1284 
1285     /** Vertex input attribute description */
1286     struct VertexInputAttributeDescription {
1287         /** Location */
1288         uint32_t location { ~0u };
1289         /** Binding */
1290         uint32_t binding { ~0u };
1291         /** Format */
1292         BASE_NS::Format format { BASE_NS::Format::BASE_FORMAT_UNDEFINED };
1293         /** Offset */
1294         uint32_t offset { 0u };
1295     };
1296 };
1297 
1298 /** Vertex input declaration data */
1299 struct VertexInputDeclarationData {
1300     /** Binding description count */
1301     uint32_t bindingDescriptionCount { 0 };
1302     /** Attribute description count */
1303     uint32_t attributeDescriptionCount { 0 };
1304 
1305     /** Array of binding descriptions */
1306     VertexInputDeclaration::VertexInputBindingDescription
1307         bindingDescriptions[PipelineStateConstants::MAX_VERTEX_BUFFER_COUNT];
1308     /** Array of attribute descriptions */
1309     VertexInputDeclaration::VertexInputAttributeDescription
1310         attributeDescriptions[PipelineStateConstants::MAX_VERTEX_BUFFER_COUNT];
1311 };
1312 
1313 /** Vertex input declaration view */
1314 struct VertexInputDeclarationView {
1315     /** Array of binding descriptions */
1316     BASE_NS::array_view<const VertexInputDeclaration::VertexInputBindingDescription> bindingDescriptions;
1317     /** Array of attribute descriptions */
1318     BASE_NS::array_view<const VertexInputDeclaration::VertexInputAttributeDescription> attributeDescriptions;
1319 };
1320 
1321 /** Shader specialization */
1322 struct ShaderSpecialization {
1323     /** Constant */
1324     struct Constant {
1325         enum class Type : uint32_t {
1326             INVALID = 0,
1327             /** 32 bit boolean value */
1328             BOOL = 1,
1329             /** 32 bit unsigned integer value */
1330             UINT32 = 2,
1331             /** 32 bit signed integer value */
1332             INT32 = 3,
1333             /** 32 bit floating-point value */
1334             FLOAT = 4,
1335         };
1336         /** Shader stage */
1337         ShaderStageFlags shaderStage {};
1338         /** ID */
1339         uint32_t id { 0U };
1340         /** Type */
1341         Type type { Type::INVALID };
1342         /** Offset */
1343         uint32_t offset { 0U };
1344     };
1345 };
1346 
1347 /** Shader specialization constant view */
1348 struct ShaderSpecializationConstantView {
1349     /** Array of shader specialization constants */
1350     BASE_NS::array_view<const ShaderSpecialization::Constant> constants;
1351 };
1352 
1353 /** Shader specialization constant data view */
1354 struct ShaderSpecializationConstantDataView {
1355     /** Array of shader specialization constants */
1356     BASE_NS::array_view<const ShaderSpecialization::Constant> constants;
1357     /** Data */
1358     BASE_NS::array_view<const uint32_t> data;
1359 };
1360 
1361 /** Buffer offset */
1362 struct BufferOffset {
1363     /** Buffer handle */
1364     RenderHandle handle;
1365     /** Buffer offset in bytes */
1366     uint32_t offset { 0U };
1367 };
1368 
1369 /** Buffer offset with render handle reference */
1370 struct BufferOffsetWithHandleReference {
1371     /** Buffer handle */
1372     RenderHandleReference handle;
1373     /** Buffer offset in bytes */
1374     uint32_t offset { 0U };
1375 };
1376 
1377 /** Accleration structure types */
1378 enum AccelerationStructureType : uint32_t {
1379     /** Acceleration structure type top level */
1380     CORE_ACCELERATION_STRUCTURE_TYPE_TOP_LEVEL = 0,
1381     /** Acceleration structure type bottom level */
1382     CORE_ACCELERATION_STRUCTURE_TYPE_BOTTOM_LEVEL = 1,
1383     /** Acceleration structure type generic */
1384     CORE_ACCELERATION_STRUCTURE_TYPE_GENERIC = 2,
1385 };
1386 
1387 struct AsBuildRangeInfo {
1388     uint32_t primitiveCount { 0U };
1389     uint32_t primitiveOffset { 0U };
1390     uint32_t firstVertex { 0U };
1391     uint32_t transformOffset { 0U };
1392 };
1393 
1394 /** Additional parameters for geometry */
1395 enum GeometryFlagBits : uint32_t {
1396     /** The geometry does not invoke the any-hit shaders even if present in a hit group */
1397     GEOMETRY_OPAQUE_BIT = 0x00000001,
1398     /** Indicates that the implementation must only call the any-hit shader a single time for each primitive
1399      * in this geometry.
1400      */
1401     GEOMETRY_NO_DUPLICATE_ANY_HIT_INVOCATION_BIT = 0x00000002,
1402 };
1403 /** Geometry flags */
1404 using GeometryFlags = uint32_t;
1405 
1406 /** Acceleration structure geometry triangles data */
1407 struct AsGeometryTrianglesInfo {
1408     /** Vertex format */
1409     BASE_NS::Format vertexFormat { BASE_NS::Format::BASE_FORMAT_UNDEFINED };
1410     /** Vertex stride, bytes between each vertex */
1411     uint32_t vertexStride { 0u };
1412     /** Highest index of a vertex for building geom */
1413     uint32_t maxVertex { 0u };
1414     /** Index type */
1415     IndexType indexType { IndexType::CORE_INDEX_TYPE_UINT32 };
1416     /** Index count */
1417     uint32_t indexCount { 0u };
1418 
1419     /** Geometry flags */
1420     GeometryFlags geometryFlags { 0U };
1421 };
1422 
1423 /** Acceleration structure geometry triangles data */
1424 struct AsGeometryTrianglesData {
1425     /** Triangles info */
1426     AsGeometryTrianglesInfo info;
1427 
1428     /** Vertex buffer with offset */
1429     BufferOffset vertexData;
1430     /** Index buffer with offset */
1431     BufferOffset indexData;
1432     /** Transform buffer (4x3 matrices), additional */
1433     BufferOffset transformData;
1434 };
1435 
1436 /** Acceleration structure geometry triangles data */
1437 struct AsGeometryTrianglesDataWithHandleReference {
1438     /** Triangles info */
1439     AsGeometryTrianglesInfo info;
1440 
1441     /** Vertex buffer with offset */
1442     BufferOffsetWithHandleReference vertexData;
1443     /** Index buffer with offset */
1444     BufferOffsetWithHandleReference indexData;
1445     /** Transform buffer (4x3 matrices), additional */
1446     BufferOffsetWithHandleReference transformData;
1447 };
1448 
1449 /** Acceleration structure geometry AABBs info */
1450 struct AsGeometryAabbsInfo {
1451     /** Stride, bytes between each AABB (must be a multiple of 8) */
1452     uint32_t stride { 0u };
1453 
1454     /** Geometry flags */
1455     GeometryFlags geometryFlags { 0U };
1456 };
1457 
1458 /** Acceleration structure geometry AABBs data */
1459 struct AsGeometryAabbsData {
1460     /** AABBs info */
1461     AsGeometryAabbsInfo info;
1462     /** Buffer resource and offset for AabbPositions */
1463     BufferOffset data;
1464 };
1465 
1466 /** Acceleration structure geometry AABBs data */
1467 struct AsGeometryAabbsDataWithHandleReference {
1468     /** AABBs info */
1469     AsGeometryAabbsInfo info;
1470     /** Buffer resource and offset for AabbPositions */
1471     BufferOffsetWithHandleReference data;
1472 };
1473 
1474 /** Acceleration structure geometry instances info */
1475 struct AsGeometryInstancesInfo {
1476     /** Specifies whether data is used as an array of addresses or just an array */
1477     bool arrayOfPointers { false };
1478 
1479     /** Geometry flags */
1480     GeometryFlags geometryFlags { 0U };
1481     /** Primitive count (the instance count) */
1482     uint32_t primitiveCount { 0U };
1483 };
1484 
1485 /** Acceleration structure geometry instances data */
1486 struct AsGeometryInstancesData {
1487     /** Instances info */
1488     AsGeometryInstancesInfo info;
1489     /** Buffer resource and offset for structures */
1490     BufferOffset data;
1491 };
1492 
1493 /** Acceleration structure geometry instances data */
1494 struct AsGeometryInstancesDataWithHandleReference {
1495     /** Instances info */
1496     AsGeometryInstancesInfo info;
1497     /** Buffer resource and offset for structures */
1498     BufferOffsetWithHandleReference data;
1499 };
1500 
1501 /** Build acceleration structure flag bits */
1502 enum BuildAccelerationStructureFlagBits : uint32_t {
1503     /** Can be updated */
1504     CORE_BUILD_ACCELERATION_STRUCTURE_ALLOW_UPDATE_BIT = 0x00000001,
1505     /** Alloc compaction bit. Can be used as a source for compaction. */
1506     CORE_BUILD_ACCELERATION_STRUCTURE_ALLOW_COMPACTION_BIT = 0x00000002,
1507     /** Prefer fast trace. Prioritizes trace performance for build time. */
1508     CORE_BUILD_ACCELERATION_STRUCTURE_PREFER_FAST_TRACE_BIT = 0x00000004,
1509     /** Prefer fast build. Prioritizes fast build for trace performance. */
1510     CORE_BUILD_ACCELERATION_STRUCTURE_PREFER_FAST_BUILD_BIT = 0x00000008,
1511     /** Prefer low memory. Prioritizes the size of the scratch memory and the final acceleration structure,
1512      * potentially at the expense of build time or trace performance */
1513     CORE_BUILD_ACCELERATION_STRUCTURE_LOW_MEMORY_BIT = 0x00000010,
1514 };
1515 /** Build acceleration structure flags */
1516 using BuildAccelerationStructureFlags = uint32_t;
1517 
1518 /** Build acceleration structure mode */
1519 enum BuildAccelerationStructureMode : uint32_t {
1520     /** The destination acceleration structure will be built using the specified geometries */
1521     CORE_BUILD_ACCELERATION_STRUCTURE_MODE_BUILD = 0,
1522     /** The destination acceleration structure will be built using data in a source acceleration structure,
1523      * updated by the specified geometries. */
1524     CORE_BUILD_ACCELERATION_STRUCTURE_MODE_UPDATE = 1,
1525 };
1526 
1527 /** Acceleration structure build geometry info */
1528 struct AsBuildGeometryInfo {
1529     /** Acceleration structure type */
1530     AccelerationStructureType type { AccelerationStructureType::CORE_ACCELERATION_STRUCTURE_TYPE_TOP_LEVEL };
1531     /** Additional flags */
1532     BuildAccelerationStructureFlags flags { 0 };
1533     /** Build mode */
1534     BuildAccelerationStructureMode mode {
1535         BuildAccelerationStructureMode::CORE_BUILD_ACCELERATION_STRUCTURE_MODE_BUILD
1536     };
1537 };
1538 
1539 /** Acceleration structure build geometry data */
1540 struct AsBuildGeometryData {
1541     /** Geometry info */
1542     AsBuildGeometryInfo info;
1543 
1544     /** Handle to existing acceleration structure which is used a src for dst update. */
1545     RenderHandle srcAccelerationStructure;
1546     /** Handle to dst acceleration structure which is to be build. */
1547     RenderHandle dstAccelerationStructure;
1548     /** Handle and offset to build scratch data. */
1549     BufferOffset scratchBuffer;
1550 };
1551 
1552 /** Acceleration structure build geometry data */
1553 struct AsBuildGeometryDataWithHandleReference {
1554     /** Geometry info */
1555     AsBuildGeometryInfo info;
1556 
1557     /** Handle to existing acceleration structure which is used a src for dst update. */
1558     RenderHandleReference srcAccelerationStructure;
1559     /** Handle to dst acceleration structure which is to be build. */
1560     RenderHandleReference dstAccelerationStructure;
1561     /** Handle and offset to build scratch data. (Usually optional) */
1562     BufferOffsetWithHandleReference scratchBuffer;
1563 };
1564 
1565 /** Acceleration structure build sizes.
1566  * The build sizes can be queried from device with AccelerationStructureBuildGeometryInfo.
1567  */
1568 struct AsBuildSizes {
1569     /** Acceleration structure size */
1570     uint32_t accelerationStructureSize { 0u };
1571     /** Update scratch size */
1572     uint32_t updateScratchSize { 0u };
1573     /** Build scratch size */
1574     uint32_t buildScratchSize { 0u };
1575 };
1576 
1577 /** Geometry type.
1578  */
1579 enum GeometryType : uint32_t {
1580     /** Triangles */
1581     CORE_GEOMETRY_TYPE_TRIANGLES = 0,
1582     /** AABBs */
1583     CORE_GEOMETRY_TYPE_AABBS = 1,
1584     /** Instances */
1585     CORE_GEOMETRY_TYPE_INSTANCES = 2,
1586 };
1587 
1588 /** Geometry instance flags.
1589  */
1590 enum GeometryInstanceFlagBits : uint32_t {
1591     /** Disable face culling */
1592     CORE_GEOMETRY_INSTANCE_TRIANGLE_FACING_CULL_DISABLE_BIT = 0x00000001,
1593     /** Invert the facing */
1594     CORE_GEOMETRY_INSTANCE_TRIANGLE_FLIP_FACING_BIT = 0x00000002,
1595     /** Force geometry to be treated as opaque */
1596     CORE_GEOMETRY_INSTANCE_FORCE_OPAQUE_BIT = 0x00000004,
1597     /** Removes opaque bit from geometry. Can be overriden with SPIR-v OpaqueKHR flag */
1598     CORE_GEOMETRY_INSTANCE_FORCE_NO_OPAQUE_BIT = 0x00000008,
1599 };
1600 using GeometryInstanceFlags = uint32_t;
1601 
1602 /** Acceleration structure instance
1603  */
1604 struct AsInstance {
1605     /** Transform matrix */
1606     BASE_NS::Math::Mat4X3 transform { BASE_NS::Math::IDENTITY_4X3 };
1607     /** User specified index accessable in ray shaders with InstanceCustomIndexKHR (24 bits) */
1608     uint32_t instanceCustomIndex { 0U };
1609     /** Mask, a visibility mask for geometry (8 bits). Instance may only be hit if cull mask & instance.mask != 0. */
1610     uint8_t mask { 0U };
1611     /** Mask, a visibility mask for geometry (8 bits). Instance may only be hit if cull mask & instance.mask != 0. */
1612     uint32_t shaderBindingTableOffset { 0U };
1613     /** GeometryInstanceFlags for this instance */
1614     GeometryInstanceFlags flags { 0U };
1615 
1616     /** Acceleration structure. (Typically bottom level AS) */
1617     RenderHandle accelerationStructure {};
1618 };
1619 
1620 /** Acceleration structure instance with reference
1621  */
1622 struct AsInstanceWithHandleReference {
1623     /** Transform matrix */
1624     BASE_NS::Math::Mat4X3 transform { BASE_NS::Math::IDENTITY_4X3 };
1625     /** User specified index accessable in ray shaders with InstanceCustomIndexKHR (24 bits) */
1626     uint32_t instanceCustomIndex { 0U };
1627     /** Mask, a visibility mask for geometry (8 bits). Instance may only be hit if cull mask & instance.mask != 0. */
1628     uint8_t mask { 0U };
1629     /** Mask, a visibility mask for geometry (8 bits). Instance may only be hit if cull mask & instance.mask != 0. */
1630     uint32_t shaderBindingTableOffset { 0U };
1631     /** GeometryInstanceFlags for this instance */
1632     GeometryInstanceFlags flags { 0U };
1633 
1634     /** Acceleration structure. (Typically bottom level AS) */
1635     RenderHandleReference accelerationStructure {};
1636 };
1637 /** @} */
1638 RENDER_END_NAMESPACE()
1639 
1640 #endif // API_RENDER_DEVICE_PIPELINE_STATE_DESC_H
1641