1 /*
2 * Copyright (c) 2022 Huawei Device Co., Ltd.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16 #include "gpu_program_util.h"
17
18 #include <algorithm>
19 #include <cstdint>
20
21 #include <render/device/pipeline_layout_desc.h>
22 #include <render/namespace.h>
23
24 #include "util/log.h"
25
26 using namespace BASE_NS;
27
28 RENDER_BEGIN_NAMESPACE()
29 namespace GpuProgramUtil {
AddBindings(const DescriptorSetLayout & inDescriptorSetLayout,DescriptorSetLayout & outDescriptorSetLayout)30 bool AddBindings(const DescriptorSetLayout& inDescriptorSetLayout, DescriptorSetLayout& outDescriptorSetLayout)
31 {
32 const auto& inBindings = inDescriptorSetLayout.bindings;
33 auto& outBindings = outDescriptorSetLayout.bindings;
34 if (outBindings.size() < inBindings.size()) {
35 outBindings.reserve(inBindings.size());
36 }
37 bool validCombination = true;
38 for (const auto& inBinding : inDescriptorSetLayout.bindings) {
39 bool bindingAlreadyFound = false;
40 const uint32_t currBindingIndex = inBinding.binding;
41 for (auto& outRef : outBindings) {
42 if (currBindingIndex == outRef.binding) {
43 bindingAlreadyFound = true;
44 outRef.shaderStageFlags |= inBinding.shaderStageFlags;
45 if ((inBinding.descriptorType != outRef.descriptorType) ||
46 (inBinding.descriptorCount != outRef.descriptorCount)) {
47 validCombination = false;
48 PLUGIN_LOG_E(
49 "Invalid descriptor set combination with binding %u. Descriptor type %u = %u. Descriptor count "
50 "%u = %u",
51 currBindingIndex, inBinding.descriptorType, outRef.descriptorType, inBinding.descriptorCount,
52 outRef.descriptorCount);
53 // more error log printed in higher level with more info
54 }
55 }
56 }
57 if (!bindingAlreadyFound) {
58 outBindings.push_back(inBinding);
59 }
60 }
61 return validCombination;
62 }
63
CombinePipelineLayouts(const array_view<const PipelineLayout> inPl,PipelineLayout & outPl)64 void CombinePipelineLayouts(const array_view<const PipelineLayout> inPl, PipelineLayout& outPl)
65 {
66 auto& descriptorSetLayouts = outPl.descriptorSetLayouts;
67 for (const auto& plRef : inPl) {
68 for (uint32_t idx = 0; idx < PipelineLayoutConstants::MAX_DESCRIPTOR_SET_COUNT; ++idx) {
69 if (plRef.descriptorSetLayouts[idx].set != PipelineLayoutConstants::INVALID_INDEX) {
70 descriptorSetLayouts[idx].set = plRef.descriptorSetLayouts[idx].set;
71 const bool validComb =
72 GpuProgramUtil::AddBindings(plRef.descriptorSetLayouts[idx], descriptorSetLayouts[idx]);
73 if (!validComb) {
74 PLUGIN_LOG_E(
75 "Invalid shader module descriptor set combination for shader program. Descriptor set %u.", idx);
76 }
77 }
78 }
79 outPl.pushConstant.shaderStageFlags |= plRef.pushConstant.shaderStageFlags;
80 outPl.pushConstant.byteSize = Math::max(outPl.pushConstant.byteSize, plRef.pushConstant.byteSize);
81 }
82
83 // sort bindings inside sets
84 for (DescriptorSetLayout& currSet : outPl.descriptorSetLayouts) {
85 if (currSet.set != PipelineLayoutConstants::INVALID_INDEX) {
86 std::sort(currSet.bindings.begin(), currSet.bindings.end(),
87 [](auto const& lhs, auto const& rhs) { return (lhs.binding < rhs.binding); });
88 }
89 }
90 }
91
SpecializationByteSize(ShaderSpecialization::Constant::Type type)92 uint32_t SpecializationByteSize(ShaderSpecialization::Constant::Type type)
93 {
94 switch (type) {
95 case RENDER_NS::ShaderSpecialization::Constant::Type::BOOL:
96 [[fallthrough]];
97 case RENDER_NS::ShaderSpecialization::Constant::Type::UINT32:
98 [[fallthrough]];
99 case RENDER_NS::ShaderSpecialization::Constant::Type::INT32:
100 [[fallthrough]];
101 case RENDER_NS::ShaderSpecialization::Constant::Type::FLOAT:
102 return 4;
103 default:
104 break;
105 }
106 return 4;
107 }
108
AddSpecializationConstants(const array_view<const ShaderSpecialization::Constant> inSpecializationConstants,vector<ShaderSpecialization::Constant> & outSpecializationConstants)109 void AddSpecializationConstants(const array_view<const ShaderSpecialization::Constant> inSpecializationConstants,
110 vector<ShaderSpecialization::Constant>& outSpecializationConstants)
111 {
112 uint32_t offset = 0;
113 if (!outSpecializationConstants.empty()) {
114 offset =
115 outSpecializationConstants.back().offset + SpecializationByteSize(outSpecializationConstants.back().type);
116 }
117 for (auto const& constant : inSpecializationConstants) {
118 outSpecializationConstants.push_back(
119 ShaderSpecialization::Constant { constant.shaderStage, constant.id, constant.type, offset });
120 offset += SpecializationByteSize(constant.type);
121 }
122 }
123
CombineSpecializationConstants(const BASE_NS::array_view<const ShaderSpecialization::Constant> inSc,BASE_NS::vector<ShaderSpecialization::Constant> & outSc)124 void CombineSpecializationConstants(const BASE_NS::array_view<const ShaderSpecialization::Constant> inSc,
125 BASE_NS::vector<ShaderSpecialization::Constant>& outSc)
126 {
127 if (!inSc.empty()) {
128 GpuProgramUtil::AddSpecializationConstants(inSc, outSc);
129 }
130 // sorted based on offset due to offset mapping with shader combinations
131 // NOTE: id and name indexing
132 std::sort(outSc.begin(), outSc.end(), [](const auto& lhs, const auto& rhs) { return (lhs.offset < rhs.offset); });
133 }
134
FormatByteSize(Format format)135 uint32_t FormatByteSize(Format format)
136 {
137 switch (format) {
138 case BASE_FORMAT_UNDEFINED:
139 return 0;
140
141 case BASE_FORMAT_R4G4_UNORM_PACK8:
142 return 1;
143
144 case BASE_FORMAT_R4G4B4A4_UNORM_PACK16:
145 case BASE_FORMAT_B4G4R4A4_UNORM_PACK16:
146 case BASE_FORMAT_R5G6B5_UNORM_PACK16:
147 case BASE_FORMAT_B5G6R5_UNORM_PACK16:
148 case BASE_FORMAT_R5G5B5A1_UNORM_PACK16:
149 case BASE_FORMAT_B5G5R5A1_UNORM_PACK16:
150 case BASE_FORMAT_A1R5G5B5_UNORM_PACK16:
151 return 2;
152
153 case BASE_FORMAT_R8_UNORM:
154 case BASE_FORMAT_R8_SNORM:
155 case BASE_FORMAT_R8_USCALED:
156 case BASE_FORMAT_R8_SSCALED:
157 case BASE_FORMAT_R8_UINT:
158 case BASE_FORMAT_R8_SINT:
159 case BASE_FORMAT_R8_SRGB:
160 return 1;
161
162 case BASE_FORMAT_R8G8_UNORM:
163 case BASE_FORMAT_R8G8_SNORM:
164 case BASE_FORMAT_R8G8_USCALED:
165 case BASE_FORMAT_R8G8_SSCALED:
166 case BASE_FORMAT_R8G8_UINT:
167 case BASE_FORMAT_R8G8_SINT:
168 case BASE_FORMAT_R8G8_SRGB:
169 return 2;
170
171 case BASE_FORMAT_R8G8B8_UNORM:
172 case BASE_FORMAT_R8G8B8_SNORM:
173 case BASE_FORMAT_R8G8B8_USCALED:
174 case BASE_FORMAT_R8G8B8_SSCALED:
175 case BASE_FORMAT_R8G8B8_UINT:
176 case BASE_FORMAT_R8G8B8_SINT:
177 case BASE_FORMAT_R8G8B8_SRGB:
178 case BASE_FORMAT_B8G8R8_UNORM:
179 case BASE_FORMAT_B8G8R8_SNORM:
180 case BASE_FORMAT_B8G8R8_UINT:
181 case BASE_FORMAT_B8G8R8_SINT:
182 case BASE_FORMAT_B8G8R8_SRGB:
183 return 3;
184
185 case BASE_FORMAT_R8G8B8A8_UNORM:
186 case BASE_FORMAT_R8G8B8A8_SNORM:
187 case BASE_FORMAT_R8G8B8A8_USCALED:
188 case BASE_FORMAT_R8G8B8A8_SSCALED:
189 case BASE_FORMAT_R8G8B8A8_UINT:
190 case BASE_FORMAT_R8G8B8A8_SINT:
191 case BASE_FORMAT_R8G8B8A8_SRGB:
192 case BASE_FORMAT_B8G8R8A8_UNORM:
193 case BASE_FORMAT_B8G8R8A8_SNORM:
194 case BASE_FORMAT_B8G8R8A8_UINT:
195 case BASE_FORMAT_B8G8R8A8_SINT:
196 case BASE_FORMAT_B8G8R8A8_SRGB:
197 case BASE_FORMAT_A8B8G8R8_UNORM_PACK32:
198 case BASE_FORMAT_A8B8G8R8_SNORM_PACK32:
199 case BASE_FORMAT_A8B8G8R8_USCALED_PACK32:
200 case BASE_FORMAT_A8B8G8R8_SSCALED_PACK32:
201 case BASE_FORMAT_A8B8G8R8_UINT_PACK32:
202 case BASE_FORMAT_A8B8G8R8_SINT_PACK32:
203 case BASE_FORMAT_A8B8G8R8_SRGB_PACK32:
204 case BASE_FORMAT_A2R10G10B10_UNORM_PACK32:
205 case BASE_FORMAT_A2R10G10B10_UINT_PACK32:
206 case BASE_FORMAT_A2R10G10B10_SINT_PACK32:
207 case BASE_FORMAT_A2B10G10R10_UNORM_PACK32:
208 case BASE_FORMAT_A2B10G10R10_SNORM_PACK32:
209 case BASE_FORMAT_A2B10G10R10_USCALED_PACK32:
210 case BASE_FORMAT_A2B10G10R10_SSCALED_PACK32:
211 case BASE_FORMAT_A2B10G10R10_UINT_PACK32:
212 case BASE_FORMAT_A2B10G10R10_SINT_PACK32:
213 case BASE_FORMAT_B10G11R11_UFLOAT_PACK32:
214 case BASE_FORMAT_E5B9G9R9_UFLOAT_PACK32:
215 return 4;
216
217 case BASE_FORMAT_R16_UNORM:
218 case BASE_FORMAT_R16_SNORM:
219 case BASE_FORMAT_R16_USCALED:
220 case BASE_FORMAT_R16_SSCALED:
221 case BASE_FORMAT_R16_UINT:
222 case BASE_FORMAT_R16_SINT:
223 case BASE_FORMAT_R16_SFLOAT:
224 return 2;
225
226 case BASE_FORMAT_R16G16_UNORM:
227 case BASE_FORMAT_R16G16_SNORM:
228 case BASE_FORMAT_R16G16_USCALED:
229 case BASE_FORMAT_R16G16_SSCALED:
230 case BASE_FORMAT_R16G16_UINT:
231 case BASE_FORMAT_R16G16_SINT:
232 case BASE_FORMAT_R16G16_SFLOAT:
233 return 4;
234
235 case BASE_FORMAT_R16G16B16_UNORM:
236 case BASE_FORMAT_R16G16B16_SNORM:
237 case BASE_FORMAT_R16G16B16_USCALED:
238 case BASE_FORMAT_R16G16B16_SSCALED:
239 case BASE_FORMAT_R16G16B16_UINT:
240 case BASE_FORMAT_R16G16B16_SINT:
241 case BASE_FORMAT_R16G16B16_SFLOAT:
242 return 6;
243
244 case BASE_FORMAT_R16G16B16A16_UNORM:
245 case BASE_FORMAT_R16G16B16A16_SNORM:
246 case BASE_FORMAT_R16G16B16A16_USCALED:
247 case BASE_FORMAT_R16G16B16A16_SSCALED:
248 case BASE_FORMAT_R16G16B16A16_UINT:
249 case BASE_FORMAT_R16G16B16A16_SINT:
250 case BASE_FORMAT_R16G16B16A16_SFLOAT:
251 return 8;
252
253 case BASE_FORMAT_R32_UINT:
254 case BASE_FORMAT_R32_SINT:
255 case BASE_FORMAT_R32_SFLOAT:
256 return 4;
257
258 case BASE_FORMAT_R32G32_UINT:
259 case BASE_FORMAT_R32G32_SINT:
260 case BASE_FORMAT_R32G32_SFLOAT:
261 return 8;
262
263 case BASE_FORMAT_R32G32B32_UINT:
264 case BASE_FORMAT_R32G32B32_SINT:
265 case BASE_FORMAT_R32G32B32_SFLOAT:
266 return 12;
267
268 case BASE_FORMAT_R32G32B32A32_UINT:
269 case BASE_FORMAT_R32G32B32A32_SINT:
270 case BASE_FORMAT_R32G32B32A32_SFLOAT:
271 return 16;
272
273 case BASE_FORMAT_D16_UNORM:
274 return 2;
275
276 case BASE_FORMAT_X8_D24_UNORM_PACK32:
277 case BASE_FORMAT_D32_SFLOAT:
278 return 4;
279
280 case BASE_FORMAT_S8_UINT:
281 return 1;
282
283 case BASE_FORMAT_D24_UNORM_S8_UINT:
284 return 4;
285
286 default:
287 return 0;
288 }
289 }
290 } // namespace GpuProgramUtil
291 RENDER_END_NAMESPACE()
292