1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ 2 /* 3 * Copyright (C) 2020 Loongson Technology Corporation Limited 4 * 5 * Author: Hanlu Li <lihanlu@loongson.cn> 6 * Huacai Chen <chenhuacai@loongson.cn> 7 */ 8 #ifndef _UAPI_ASM_PTRACE_H 9 #define _UAPI_ASM_PTRACE_H 10 11 #include <linux/types.h> 12 13 #ifndef __KERNEL__ 14 #include <stdint.h> 15 #endif 16 17 /* 18 * For PTRACE_{POKE,PEEK}USR. 0 - 31 are GPRs, 19 * 32 is syscall's original ARG0, 33 is PC, 34 is BADVADDR. 20 */ 21 #define GPR_BASE 0 22 #define GPR_NUM 32 23 #define GPR_END (GPR_BASE + GPR_NUM - 1) 24 #define ARG0 (GPR_END + 1) 25 #define PC (GPR_END + 2) 26 #define BADVADDR (GPR_END + 3) 27 28 #define NUM_FPU_REGS 32 29 30 struct user_pt_regs { 31 /* Main processor registers. */ 32 unsigned long regs[32]; 33 34 /* Original syscall arg0. */ 35 unsigned long orig_a0; 36 37 /* Special CSR registers. */ 38 unsigned long csr_era; 39 unsigned long csr_badv; 40 unsigned long reserved[10]; 41 } __attribute__((aligned(8))); 42 43 struct user_fp_state { 44 uint64_t fpr[32]; 45 uint64_t fcc; 46 uint32_t fcsr; 47 }; 48 49 struct user_lsx_state { 50 /* 32 registers, 128 bits width per register. */ 51 uint64_t vregs[32*2]; 52 }; 53 54 struct user_lasx_state { 55 /* 32 registers, 256 bits width per register. */ 56 uint64_t vregs[32*4]; 57 }; 58 59 /* 60 * This structure definition saves the LBT data structure, 61 * the data comes from the task_struct structure, format is as follows: 62 * regs[0]: thread.lbt.scr0 63 * regs[1]: thread.lbt.scr1 64 * regs[2]: thread.lbt.scr2 65 * regs[3]: thread.lbt.scr3 66 * regs[4]: thread.lbt.eflags 67 * regs[5]: thread.fpu.ftop 68 */ 69 struct user_lbt_state { 70 uint64_t regs[6]; 71 }; 72 73 /* Read and write watchpoint registers. */ 74 #define NUM_WATCH_REGS 16 75 76 enum pt_watch_style { 77 pt_watch_style_la32, 78 pt_watch_style_la64 79 }; 80 81 struct la32_watch_regs { 82 uint32_t addr; 83 uint32_t mask; 84 /* irw/irwsta/irwmask I R W bits. 85 * bit 0 -- 1 if W bit is usable. 86 * bit 1 -- 1 if R bit is usable. 87 * bit 2 -- 1 if I bit is usable. 88 */ 89 uint8_t irw; 90 uint8_t irwstat; 91 uint8_t irwmask; 92 } __attribute__((aligned(8))); 93 94 struct la64_watch_regs { 95 uint64_t addr; 96 uint64_t mask; 97 /* irw/irwsta/irwmask I R W bits. 98 * bit 0 -- 1 if W bit is usable. 99 * bit 1 -- 1 if R bit is usable. 100 * bit 2 -- 1 if I bit is usable. 101 */ 102 uint8_t irw; 103 uint8_t irwstat; 104 uint8_t irwmask; 105 } __attribute__((aligned(8))); 106 107 struct pt_watch_regs { 108 int16_t max_valid; 109 int16_t num_valid; 110 enum pt_watch_style style; 111 union { 112 struct la32_watch_regs la32[NUM_WATCH_REGS]; 113 struct la64_watch_regs la64[NUM_WATCH_REGS]; 114 }; 115 }; 116 117 #define PTRACE_SYSEMU 0x1f 118 #define PTRACE_SYSEMU_SINGLESTEP 0x20 119 #define PTRACE_GET_WATCH_REGS 0xd0 120 #define PTRACE_SET_WATCH_REGS 0xd1 121 122 /* Watch irw/irwmask/irwstat bit definitions */ 123 #define LA_WATCH_W (1 << 0) 124 #define LA_WATCH_R (1 << 1) 125 #define LA_WATCH_I (1 << 2) 126 #define LA_WATCH_IRW (LA_WATCH_W | LA_WATCH_R | LA_WATCH_I) 127 128 #endif /* _UAPI_ASM_PTRACE_H */ 129