1Mesa 24.2.6 Release Notes / 2024-10-30 2====================================== 3 4Mesa 24.2.6 is a bug fix release which fixes bugs found since the 24.2.5 release. 5 6Mesa 24.2.6 implements the OpenGL 4.6 API, but the version reported by 7glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / 8glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. 9Some drivers don't support all the features required in OpenGL 4.6. OpenGL 104.6 is **only** available if requested at context creation. 11Compatibility contexts may report a lower version depending on each driver. 12 13Mesa 24.2.6 implements the Vulkan 1.3 API, but the version reported by 14the apiVersion property of the VkPhysicalDeviceProperties struct 15depends on the particular driver being used. 16 17SHA checksums 18------------- 19 20:: 21 22 SHA256: 2b68c4a6f204c1999815a457299f81c41ba7bf48c4674b0b2d1d8864f41f3709 mesa-24.2.6.tar.xz 23 SHA512: 830a40d38200ff8b2a6bd949e1ac3bf4edc887a10d9aa92285007d138079e1fafb3568f658e777e7894e95b5ce75d2bd6836b0473fa70d32270005e482b1a2da mesa-24.2.6.tar.xz 24 25 26New features 27------------ 28 29- None 30 31 32Bug fixes 33--------- 34 35- radv: wrong index value in radv_skip_graphics_pipeline_compile 36- Disk Cache DB file descriptors are not closed on exec 37- Shader cache takes too many fds 38- Shader cache takes too many fds 39- Disk Cache DB file descriptors are not closed on exec 40- radv: \`test_instruction_msad_dxil` from vkd3d-proton fails on hawaii 41- [vulkan-intel][regression] War Thunder causes GPU hang 42 43 44Changes 45------- 46 47Adam Jackson (1): 48 49- glx: Fix the GLX_EXT_swap_control_tear drawable attributes 50 51Alyssa Rosenzweig (1): 52 53- asahi: fix no16 flag 54 55Anil Hiranniah (1): 56 57- panfrost: Fix a memory leak in the CSF backend 58 59Chia-I Wu (1): 60 61- panvk: fix descriptor set layout hash 62 63Christian Gmeiner (1): 64 65- etnaviv: nir: Enforce stricter swizzle for virtual scalar x register 66 67Connor Abbott (3): 68 69- ir3: Increase compute const size on a7xx 70- freedreno: Add compute constlen quirk for X1-85 71- tu: Don't invalidate CS state for 3D blits 72 73Daniel Schürmann (2): 74 75- aco/spill: fix faulty assertions 76- aco: Respect addressible SGPR limit in VS prologs 77 78Danylo Piliaiev (1): 79 80- util/vma: Fix util_vma_heap_get_max_free_continuous_size calculation 81 82David Rosca (1): 83 84- frontends/va: Fix parsing leb128 when using more than 4 bytes 85 86Dmitry Osipenko (4): 87 88- util/mesa-db: Fix missing O_CLOEXEC 89- util/mesa-db-multipart: Open one cache part at a time 90- util/mesa-db: Open DB files during access time 91- util/mesa-db: Fix crash on compacting empty DB 92 93Eric Engestrom (6): 94 95- docs: add sha sum for 24.2.5 96- .pick_status.json: Update to 0bffe8ec053f2a43795515b0f9c64cf98b5bd8b7 97- .pick_status.json: Mark 1dc125338e19325b0926840303731ec00af83125 as denominated 98- .pick_status.json: Update to d5581b112452398e3e56ae0e9ab8f585b6374020 99- .pick_status.json: Update to 6775524c69c660a4585e3e5ed85f4d7b9129054f 100- .pick_status.json: Update to c245609b641ad914a931ad2b3fd930ed8d065e07 101 102Frank Binns (2): 103 104- pvr: fix image size calculation when mipLevels is 1 105- pvr: ensure stencil clear value fits TA_STATE_ISPA.sref field 106 107Georg Lehmann (2): 108 109- aco: fix 64bit extract_i8/extract_i16 110- radv: don't use v_mqsad_u32_u8 on gfx7 111 112Ian Romanick (1): 113 114- brw/copy: Don't remove instructions w/ conditional modifier 115 116Iliyan Dinev (1): 117 118- pvr: fix mipmap alignment for non-32bpp textures 119 120Iván Briano (1): 121 122- hasvk: fix non matching image/view format attachment resolve 123 124Job Noorman (1): 125 126- ir3: fix physical edges of predicated branches 127 128Jocelyn Falempe (3): 129 130- loader: Fix typo in __DRI_IMAGE_FORMAT_XBGR16161616 definition 131- gbm/dri: Use PIPE_FORMAT_* instead of using __DRI_IMAGE_* 132- gbm/dri: Fix color format for big endian. 133 134Jordan Justen (4): 135 136- intel/dev: Rework DEVINFO_HWCONFIG; add DEVINFO_HWCONFIG_KV macro 137- intel/dev: Simplify DEVINFO_HWCONFIG_KV by adding should_apply_hwconfig_item() 138- intel/dev: Allow specifying a version when to always use hwconfig 139- intel/dev: Use hwconfig for urb min/max entry values 140 141Karol Herbst (1): 142 143- radeonsi: move si_compute::global_buffers to si_context 144 145Lionel Landwerlin (3): 146 147- anv: use stage mask to deduce cs/pb-stall requirements 148- elk: Don't apply discard_if condition opt if it can change results 149- isl: fix range_B_tile end_tile_B value 150 151Lu Yao (1): 152 153- ac/radeonsi: compute htile for tile mode RADEON_SURF_MODE_1D on GFX6-8 154 155Luigi Santivetti (2): 156 157- pvr: fix calculation for textures z position fractional part 158- pvr: really free memory in subpass render init 159 160Matt Coster (2): 161 162- pvr: Fix ds subtile alignment NULL pointer dereference 163- pvr: Fix reordering of sub-cmds when performing ds subtile alignment 164 165Michel Dänzer (1): 166 167- util/mesa-db: Make mesa_db_lock robust against signals 168 169Mike Blumenkrantz (2): 170 171- va: fail context create if driver does not support video 172- vdpau: fail context create if driver does not support video 173 174Patrick Lerda (1): 175 176- r600: fix spec ext_packed_depth_stencil getteximage 177 178Paulo Zanoni (1): 179 180- anv/trtt: fix the creation of sparse buffers of size 2^32 on 32bit systems 181 182Pavel Ondračka (1): 183 184- nir/nir_group_loads: reduce chance of max_distance check overflow 185 186Pierre-Eric Pelloux-Prayer (3): 187 188- radeonsi/gfx12: fill missing dcc tiling info 189- radeonsi: fix radeon_canonicalize_bo_flags domain handling 190- ac/surface: fix determination of gfx12_enable_dcc 191 192Rhys Perry (3): 193 194- radv: fix output statistic for fragment shaders 195- nir: fix shfr constant folding with zero src2 196- nir/algebraic: fix shfr optimization with zero src2 197 198Rob Clark (3): 199 200- freedreno/ir3: Create UBO variables for driver-UBOs 201- nir/lower_amul: Fix ASAN error 202- freedreno/ir3: Do not propagate away a widening move 203 204Rohan Garg (1): 205 206- anv: Xe2+ doesn't need the special flush for sparse 207 208Samuel Pitoiset (4): 209 210- radv: fix initializing the HTILE buffer on transfer queue 211- radv: fix emitting NGG culling state for ESO 212- radv: fix considering NGG culling for depth-only rendering 213- radv: fix wrong index in radv_skip_graphics_pipeline_compile() 214 215Sviatoslav Peleshko (1): 216 217- intel/brw/gfx9: Implement WaClearArfDependenciesBeforeEot 218 219Tapani Pälli (2): 220 221- iris: implement VF_STATISTICS emit for Wa_16012775297 222- anv: implement VF_STATISTICS emit for Wa_16012775297 223 224Valentine Burley (1): 225 226- freedreno/devices: Unify magic_regs for A740 and A32 227 228Yao Zi (1): 229 230- panvk: Link with --build-id explicitly 231 232YaoBing Xiao (1): 233 234- vulkan/x11: use xcb_connection_has_error to check for failue 235 236Zan Dobersek (1): 237 238- zink: fix bo_export caching 239