1 /*
2 * Copyright © 2024 Igalia S.L.
3 * SPDX-License-Identifier: MIT
4 */
5
6 #include "etna_hwdb.h"
7
8 #include "etna_core_info.h"
9 #include "hwdb.h"
10
11 /* clang-format off */
12 #define ETNA_FEATURE(member, feature) \
13 if (db->member) \
14 etna_core_enable_feature(info, ETNA_FEATURE_##feature)
15 /* clang-format on */
16
17 bool
etna_query_feature_db(struct etna_core_info * info)18 etna_query_feature_db(struct etna_core_info *info)
19 {
20 uint32_t model = info->model;
21 uint32_t revision = info->revision;
22
23 /* More confusion due to NXP calling the GC3000 in the i.MX6QP a GC2000+:
24 * the kernel already fixes this up to the real model and revision, but
25 * to match the HWDB entry we must revert this fixup for the lookup. */
26 if (model == 0x3000 && revision == 0x5450) {
27 model = 0x2000;
28 revision = 0xffff5450;
29 }
30
31 gcsFEATURE_DATABASE *db = gcQueryFeatureDB(model, revision, info->product_id,
32 info->eco_id, info->customer_id);
33
34 if (!db)
35 return false;
36
37 if (db->NNCoreCount)
38 info->type = ETNA_CORE_NPU;
39 else
40 info->type = ETNA_CORE_GPU;
41
42 /* Features: */
43 ETNA_FEATURE(REG_FastClear, FAST_CLEAR);
44 ETNA_FEATURE(REG_Pipe3D, PIPE_3D);
45 ETNA_FEATURE(REG_FE20BitIndex, 32_BIT_INDICES);
46 ETNA_FEATURE(REG_MSAA, MSAA);
47 ETNA_FEATURE(REG_DXTTextureCompression, DXT_TEXTURE_COMPRESSION);
48 ETNA_FEATURE(REG_ETC1TextureCompression, ETC1_TEXTURE_COMPRESSION);
49 ETNA_FEATURE(REG_NoEZ, NO_EARLY_Z);
50
51 ETNA_FEATURE(REG_MC20, MC20);
52 ETNA_FEATURE(REG_Render8K, RENDERTARGET_8K);
53 ETNA_FEATURE(REG_Texture8K, TEXTURE_8K);
54 ETNA_FEATURE(REG_ExtraShaderInstructions0, HAS_SIGN_FLOOR_CEIL);
55 ETNA_FEATURE(REG_ExtraShaderInstructions1, HAS_SQRT_TRIG);
56 ETNA_FEATURE(REG_TileStatus2Bits, 2BITPERTILE);
57 ETNA_FEATURE(REG_SuperTiled32x32, SUPER_TILED);
58
59 ETNA_FEATURE(REG_CorrectAutoDisable1, AUTO_DISABLE);
60 ETNA_FEATURE(REG_TextureHorizontalAlignmentSelect, TEXTURE_HALIGN);
61 ETNA_FEATURE(REG_MMU, MMU_VERSION);
62 ETNA_FEATURE(REG_HalfFloatPipe, HALF_FLOAT);
63 ETNA_FEATURE(REG_WideLine, WIDE_LINE);
64 ETNA_FEATURE(REG_Halti0, HALTI0);
65 ETNA_FEATURE(REG_NonPowerOfTwo, NON_POWER_OF_TWO);
66 ETNA_FEATURE(REG_LinearTextureSupport, LINEAR_TEXTURE_SUPPORT);
67
68 ETNA_FEATURE(REG_LinearPE, LINEAR_PE);
69 ETNA_FEATURE(REG_SuperTiledTexture, SUPERTILED_TEXTURE);
70 ETNA_FEATURE(REG_LogicOp, LOGIC_OP);
71 ETNA_FEATURE(REG_Halti1, HALTI1);
72 ETNA_FEATURE(REG_SeamlessCubeMap, SEAMLESS_CUBE_MAP);
73 ETNA_FEATURE(REG_LineLoop, LINE_LOOP);
74 ETNA_FEATURE(REG_TextureTileStatus, TEXTURE_TILED_READ);
75 ETNA_FEATURE(REG_BugFixes8, BUG_FIXES8);
76
77 ETNA_FEATURE(REG_BugFixes15, PE_DITHER_FIX);
78 ETNA_FEATURE(REG_InstructionCache, INSTRUCTION_CACHE);
79 ETNA_FEATURE(REG_ExtraShaderInstructions2, HAS_FAST_TRANSCENDENTALS);
80
81 ETNA_FEATURE(REG_SmallMSAA, SMALL_MSAA);
82 ETNA_FEATURE(REG_BugFixes18, BUG_FIXES18);
83 ETNA_FEATURE(REG_TXEnhancements4, TEXTURE_ASTC);
84 ETNA_FEATURE(REG_PEEnhancements3, SINGLE_BUFFER);
85 ETNA_FEATURE(REG_Halti2, HALTI2);
86
87 ETNA_FEATURE(REG_BltEngine, BLT_ENGINE);
88 ETNA_FEATURE(REG_Halti3, HALTI3);
89 ETNA_FEATURE(REG_Halti4, HALTI4);
90 ETNA_FEATURE(REG_Halti5, HALTI5);
91 ETNA_FEATURE(REG_RAWriteDepth, RA_WRITE_DEPTH);
92
93 ETNA_FEATURE(CACHE128B256BPERLINE, CACHE128B256BPERLINE);
94 ETNA_FEATURE(NEW_GPIPE, NEW_GPIPE);
95 ETNA_FEATURE(NO_ASTC, NO_ASTC);
96 ETNA_FEATURE(V4Compression, V4_COMPRESSION);
97
98 ETNA_FEATURE(RS_NEW_BASEADDR, RS_NEW_BASEADDR);
99 ETNA_FEATURE(PE_NO_ALPHA_TEST, PE_NO_ALPHA_TEST);
100
101 ETNA_FEATURE(SH_NO_ONECONST_LIMIT, SH_NO_ONECONST_LIMIT);
102 ETNA_FEATURE(COMPUTE_ONLY, COMPUTE_ONLY);
103
104 ETNA_FEATURE(DEC400, DEC400);
105
106 ETNA_FEATURE(VIP_V7, VIP_V7);
107 ETNA_FEATURE(NN_XYDP0, NN_XYDP0);
108
109 /* Limits: */
110 if (info->type == ETNA_CORE_GPU) {
111 info->gpu.max_instructions = db->InstructionCount;
112 info->gpu.vertex_output_buffer_size = db->VertexOutputBufferSize;
113 info->gpu.vertex_cache_size = db->VertexCacheSize;
114 info->gpu.shader_core_count = db->NumShaderCores;
115 info->gpu.stream_count = db->Streams;
116 info->gpu.max_registers = db->TempRegisters;
117 info->gpu.pixel_pipes = db->NumPixelPipes;
118 info->gpu.max_varyings = db->VaryingCount;
119 info->gpu.num_constants = db->NumberOfConstants;
120 } else {
121 info->npu.nn_core_count = db->NNCoreCount;
122 info->npu.nn_mad_per_core = db->NNMadPerCore;
123 info->npu.tp_core_count = db->TPEngine_CoreCount;
124 info->npu.on_chip_sram_size = db->VIP_SRAM_SIZE;
125 info->npu.axi_sram_size = db->AXI_SRAM_SIZE;
126 info->npu.nn_zrl_bits = db->NN_ZRL_BITS;
127 info->npu.nn_accum_buffer_depth = db->NNAccumBufferDepth;
128 info->npu.nn_input_buffer_depth = db->NNInputBufferDepth;
129 }
130
131 return true;
132 }
133