1test: 50 2cmd: get_display:469: >>> eglInitialize(display, &egl_major, &egl_minor) 3cmd: eglInitialize(display, &egl_major, &egl_minor) 4gpu_id: 540 5cmd: get_display:469: <<< eglInitialize(display, &egl_major, &egl_minor): succeeded 6cmd: get_display:472: Using display 0x1 with EGL version 1.4 7cmd: get_display:474: EGL Version "1.4 Android META-EGL" 8cmd: get_display:475: EGL Vendor "Android" 9cmd: get_display:476: EGL Extensions "EGL_KHR_get_all_proc_addresses EGL_ANDROID_presentation_time EGL_KHR_swap_buffers_with_damage EGL_ANDROID_get_native_client_buffer EGL_ANDROID_front_buffer_auto_refresh EGL_ANDROID_get_frame_timestamps EGL_EXT_surface_SMPTE2086_metadata EGL_EXT_surface_CTA861_3_metadata EGL_EXT_gl_colorspace_scrgb EGL_EXT_gl_colorspace_scrgb_linear EGL_EXT_gl_colorspace_display_p3_linear EGL_EXT_gl_colorspace_display_p3 EGL_KHR_image EGL_KHR_image_base EGL_EXT_image_gl_colorspace EGL_KHR_lock_surface EGL_KHR_gl_colorspace EGL_KHR_gl_texture_2D_image EGL_KHR_gl_texture_3D_image EGL_KHR_gl_texture_cubemap_image EGL_KHR_gl_renderbuffer_image EGL_KHR_reusable_sync EGL_KHR_fence_sync EGL_KHR_create_context EGL_KHR_surfaceless_context EGL_EXT_create_context_robustness EGL_ANDROID_image_native_buffer EGL_KHR_wait_sync EGL_ANDROID_recordable EGL_KHR_partial_update EGL_EXT_pixel_format_float EGL_KHR_create_context_no_error EGL_KHR_mutable_render_buffer EGL_EXT_yuv_surface EGL_EXT_protected_content EGL_IMG_context_priority EGL_KHR_no_config_context " 10cmd: setup:425: >>> eglChooseConfig(display, config_attribute_list, &config, 1, &num_config) 11cmd: eglChooseConfig(display, config_attribute_list, &config, 1, &num_config) 12cmd: setup:425: <<< eglChooseConfig(display, config_attribute_list, &config, 1, &num_config): succeeded 13cmd: setup:426: num_config: 1 14cmd: setup:429: >>> context = eglCreateContext(display, config, EGL_NO_CONTEXT, context_attribute_list) 15cmd: context = eglCreateContext(display, config, EGL_NO_CONTEXT, context_attribute_list) 16cmd: setup:429: <<< context = eglCreateContext(display, config, EGL_NO_CONTEXT, context_attribute_list): succeeded 17cmd: setup:430: >>> surface = eglCreatePbufferSurface(display, config, pbuffer_attribute_list) 18cmd: surface = eglCreatePbufferSurface(display, config, pbuffer_attribute_list) 19cmd: setup:430: <<< surface = eglCreatePbufferSurface(display, config, pbuffer_attribute_list): succeeded 20cmd: setup:432: >>> eglQuerySurface(display, surface, EGL_WIDTH, &width) 21cmd: eglQuerySurface(display, surface, EGL_WIDTH, &width) 22cmd: setup:432: <<< eglQuerySurface(display, surface, EGL_WIDTH, &width): succeeded 23cmd: setup:433: >>> eglQuerySurface(display, surface, EGL_HEIGHT, &height) 24cmd: eglQuerySurface(display, surface, EGL_HEIGHT, &height) 25cmd: setup:433: <<< eglQuerySurface(display, surface, EGL_HEIGHT, &height): succeeded 26cmd: setup:435: PBuffer: 256x256 27cmd: setup:438: >>> eglMakeCurrent(display, surface, surface, context) 28cmd: eglMakeCurrent(display, surface, surface, context) 29cmd: setup:438: <<< eglMakeCurrent(display, surface, surface, context): succeeded 30cmd: setup:439: >>> glFlush() 31cmd: glFlush() 32cmd: setup:439: <<< glFlush(): succeeded 33cmd: get_compute_program:731: compute shader: 34#version 310 es 35precision highp float; 36precision highp int; 37 38layout(local_size_x=5, local_size_y=6, local_size_z=7) in; 39 40layout(binding = 1) buffer buffer_Out { 41 uint Out; 42}; 43 44shared uint a[64]; 45 46void main(void) { 47 a[0] = 0u; 48 a[uint(gl_LocalInvocationID.x)] = 1u; 49 50 Out = a[0]; 51} 52 53fragment shader: 54#version 310 es 55precision highp float; 56precision highp int; 57 58layout(local_size_x=5, local_size_y=6, local_size_z=7) in; 59 60layout(binding = 1) buffer buffer_Out { 61 uint Out; 62}; 63 64shared uint a[64]; 65 66void main(void) { 67 a[0] = 0u; 68 a[uint(gl_LocalInvocationID.x)] = 1u; 69 70 Out = a[0]; 71} 72 73cmd: get_shader:673: compute shader: 74#version 310 es 75precision highp float; 76precision highp int; 77 78layout(local_size_x=5, local_size_y=6, local_size_z=7) in; 79 80layout(binding = 1) buffer buffer_Out { 81 uint Out; 82}; 83 84shared uint a[64]; 85 86void main(void) { 87 a[0] = 0u; 88 a[uint(gl_LocalInvocationID.x)] = 1u; 89 90 Out = a[0]; 91} 92 93cmd: get_shader:675: >>> shader = glCreateShader(stage) 94cmd: shader = glCreateShader(stage) 95cmd: get_shader:675: <<< shader = glCreateShader(stage): succeeded 96cmd: get_shader:677: >>> glShaderSource(shader, 1, &source, NULL) 97cmd: glShaderSource(shader, 1, &source, NULL) 98cmd: get_shader:677: <<< glShaderSource(shader, 1, &source, NULL): succeeded 99cmd: get_shader:678: >>> glCompileShader(shader) 100cmd: glCompileShader(shader) 101cmd: get_shader:678: <<< glCompileShader(shader): succeeded 102cmd: get_shader:680: >>> glGetShaderiv(shader, GL_COMPILE_STATUS, &ret) 103cmd: glGetShaderiv(shader, GL_COMPILE_STATUS, &ret) 104cmd: get_shader:680: <<< glGetShaderiv(shader, GL_COMPILE_STATUS, &ret): succeeded 105cmd: get_shader:681: ret=1 106cmd: get_shader:696: compute shader compilation succeeded! 107cmd: get_compute_program:738: >>> program = glCreateProgram() 108cmd: program = glCreateProgram() 109cmd: get_compute_program:738: <<< program = glCreateProgram(): succeeded 110cmd: get_compute_program:739: >>> glAttachShader(program, shader) 111cmd: glAttachShader(program, shader) 112cmd: get_compute_program:739: <<< glAttachShader(program, shader): succeeded 113cmd: link_program:811: >>> glLinkProgram(program) 114cmd: glLinkProgram(program) 115cmd: link_program:811: <<< glLinkProgram(program): succeeded 116cmd: link_program:813: >>> glGetProgramiv(program, GL_LINK_STATUS, &ret) 117cmd: glGetProgramiv(program, GL_LINK_STATUS, &ret) 118cmd: link_program:813: <<< glGetProgramiv(program, GL_LINK_STATUS, &ret): succeeded 119cmd: link_program:828: program linking succeeded! 120cmd: link_program:830: >>> glUseProgram(program) 121cmd: glUseProgram(program) 122cmd: link_program:830: <<< glUseProgram(program): succeeded 123cmd: link_program:836: >>> glGetProgramiv(program, GL_PROGRAM_BINARY_LENGTH_OES, &len) 124cmd: glGetProgramiv(program, GL_PROGRAM_BINARY_LENGTH_OES, &len) 125cmd: link_program:836: <<< glGetProgramiv(program, GL_PROGRAM_BINARY_LENGTH_OES, &len): succeeded 126cmd: link_program:838: >>> glGetProgramBinaryOES(program, len, &ret, &binary_format, binary) 127cmd: glGetProgramBinaryOES(program, len, &ret, &binary_format, binary) 128cmd: link_program:838: <<< glGetProgramBinaryOES(program, len, &ret, &binary_format, binary): succeeded 129cmd: link_program:839: program dump: len=3336, actual len=3336 130cmd: test_compiler:341: >>> glFlush() 131cmd: glFlush() 132cmd: test_compiler:341: <<< glFlush(): succeeded 133cmd: setup_ssbo:266: SSBO: buffer_Out at 0 134cmd: test_compiler:379: >>> glDispatchCompute(1, 2, 3) 135cmd: glDispatchCompute(1, 2, 3) 136cmd: test_compiler:379: <<< glDispatchCompute(1, 2, 3): succeeded 137cmd: test_compiler:384: >>> eglSwapBuffers(display, surface) 138cmd: eglSwapBuffers(display, surface) 139############################################################ 140cmdstream[0]: 207 dwords 141 opcode: CP_SET_RENDER_MODE (6c) (9 dwords) 142 { MODE = BYPASS } 143 { ADDR_0_LO = 0x15000 } 144 { ADDR_0_HI = 0x5 } 145 { 0 } 146 { 4 = 0x3 } 147 { ADDR_1_LEN = 15 } 148 { ADDR_1_LO = 0x1f010 } 149 { ADDR_1_HI = 0x5 } 1500000000500015000: 0000: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 151* 152 addr: 0x000000050001f010 153 len: 0xf 154 write GRAS_LRZ_CNTL (e100) 155 GRAS_LRZ_CNTL: { 0x8 } 156000000050001f010: 0000: 48e10001 00000008 157 write CP_SCRATCH[0].REG (0b78) 158 CP_SCRATCH[0].REG: 1 159000000050001f018: 0000: 400b7801 00000001 160 opcode: CP_WAIT_MEM_WRITES (12) (1 dwords) 161000000050001f020: 0000: 70928000 162 opcode: (null) (74) (6 dwords) 163000000050001f024: 0000: 70f48005 c0000b78 00012c40 00000005 00015000 00000005 164 opcode: CP_MEM_WRITE (3d) (4 dwords) 165 { ADDR_LO = 0x11000 } 166 { ADDR_HI = 0x5 } 167 gpuaddr:0000000500011000 168000000050001f048: 0000: 00000001 169000000050001f03c: 0000: 703d8003 00011000 00000005 00000001 170000000050001f010: 0000: 48e10001 00000008 400b7801 00000001 70928000 70f48005 c0000b78 00012c40 171000000050001f030: 0020: 00000005 00015000 00000005 703d8003 00011000 00000005 00000001 1720000000500190000: 0000: 70ec0008 00000001 00015000 00000005 00000000 00000003 0000000f 0001f010 1730000000500190020: 0020: 00000005 174 opcode: CP_PREEMPT_ENABLE_LOCAL (6a) (2 dwords) 1750000000500190024: 0000: 70ea0001 00000001 176 write UCHE_CACHE_INVALIDATE_MIN_LO (0e91) 177 UCHE_CACHE_INVALIDATE_MIN_LO: 0 178 UCHE_CACHE_INVALIDATE_MIN_HI: 0 179 UCHE_CACHE_INVALIDATE_MAX_LO: 0 180 UCHE_CACHE_INVALIDATE_MAX_HI: 0 181 UCHE_CACHE_INVALIDATE: 0x12 182000000050019002c: 0000: 480e9185 00000000 00000000 00000000 00000000 00000012 183 opcode: CP_WAIT_FOR_IDLE (26) (1 dwords) 1840000000500190044: 0000: 70268000 185 write HLSQ_UPDATE_CNTL (e78a) 186 HLSQ_UPDATE_CNTL: 0xfffff 1870000000500190048: 0000: 40e78a01 000fffff 188 opcode: CP_PERFCOUNTER_ACTION (50) (4 dwords) 189 { 0 = 0 } 190 { ADDR_0_LO = 0x12000 } 191 { ADDR_0_HI = 0x5 } 1920000000500190050: 0000: 70d08003 00000000 00012000 00000005 193 opcode: CP_PERFCOUNTER_ACTION (50) (4 dwords) 194 { 0 = 0x10 } 195 { ADDR_0_LO = 0x13000 } 196 { ADDR_0_HI = 0x5 } 1970000000500190060: 0000: 70d08003 00000010 00013000 00000005 198 opcode: CP_WAIT_FOR_IDLE (26) (1 dwords) 1990000000500190070: 0000: 70268000 200 write PC_RESTART_INDEX (e38c) 201 PC_RESTART_INDEX: 0xffffffff 2020000000500190074: 0000: 48e38c01 ffffffff 203 write PC_RASTER_CNTL (e388) 204 PC_RASTER_CNTL: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 205000000050019007c: 0000: 40e38801 00000012 206 write GRAS_SU_POINT_MINMAX (e091) 207 GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1023.000000 } 208 GRAS_SU_POINT_SIZE: 0.500000 2090000000500190084: 0000: 48e09102 3ff00010 00000008 210 write GRAS_SU_CONSERVATIVE_RAS_CNTL (e099) 211 GRAS_SU_CONSERVATIVE_RAS_CNTL: 0 2120000000500190090: 0000: 40e09901 00000000 213 write GRAS_SC_SCREEN_SCISSOR_CNTL (e0a4) 214 GRAS_SC_SCREEN_SCISSOR_CNTL: 0 2150000000500190098: 0000: 48e0a401 00000000 216 write SP_VS_CONFIG_MAX_CONST (e58a) 217 SP_VS_CONFIG_MAX_CONST: 0 21800000005001900a0: 0000: 48e58a01 00000000 219 write SP_FS_CONFIG_MAX_CONST (e58b) 220 SP_FS_CONFIG_MAX_CONST: 0 22100000005001900a8: 0000: 40e58b01 00000000 222 write UNKNOWN_E292 (e292) 223 UNKNOWN_E292: 0 224 UNKNOWN_E293: 0 22500000005001900b0: 0000: 40e29202 00000000 00000000 226 write RB_MODE_CNTL (0cc6) 227 RB_MODE_CNTL: 0x44 22800000005001900bc: 0000: 480cc601 00000044 229 write RB_DBG_ECO_CNTL (0cc4) 230 RB_DBG_ECO_CNTL: 0x100000 23100000005001900c4: 0000: 400cc401 00100000 232 write VFD_MODE_CNTL (0e42) 233 VFD_MODE_CNTL: 0 23400000005001900cc: 0000: 400e4201 00000000 235 write PC_MODE_CNTL (0d02) 236 PC_MODE_CNTL: 0x1f 23700000005001900d4: 0000: 480d0201 0000001f 238 write SP_MODE_CNTL (0ec2) 239 SP_MODE_CNTL: 0x1e 24000000005001900dc: 0000: 480ec201 0000001e 241 write SP_DBG_ECO_CNTL (0ec0) 242 SP_DBG_ECO_CNTL: 0x800 24300000005001900e4: 0000: 400ec001 00000800 244 write TPL1_MODE_CNTL (0f02) 245 TPL1_MODE_CNTL: 0x544 24600000005001900ec: 0000: 400f0201 00000544 247 write HLSQ_TIMEOUT_THRESHOLD_0 (0e00) 248 HLSQ_TIMEOUT_THRESHOLD_0: 0x80 249 HLSQ_TIMEOUT_THRESHOLD_1: 0 25000000005001900f4: 0000: 400e0002 00000080 00000000 251 write VPC_DBG_ECO_CNTL (0e60) 252 VPC_DBG_ECO_CNTL: { ALLFLATOPTDIS } 2530000000500190100: 0000: 400e6001 00000400 254 write HLSQ_MODE_CNTL (0e06) 255 HLSQ_MODE_CNTL: 0x1 2560000000500190108: 0000: 400e0601 00000001 257 write VPC_MODE_CNTL (0e62) 258 VPC_MODE_CNTL: { 0 } 2590000000500190110: 0000: 480e6201 00000000 260 opcode: CP_MEM_TO_REG (42) (4 dwords) 261 { REG = 0xc10 | CNT = 16 } 262 { SRC = 0x14000 } 263 { SRC_HI = 0x5 } 264 base register: 0xc10 265 gpuaddr:0000000500014000 2660000000500014000: 0000: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 267* 2680000000500190118: 0000: 70c28003 00800c10 00014000 00000005 269 opcode: CP_WAIT_FOR_IDLE (26) (1 dwords) 2700000000500190128: 0000: 70268000 271 write PC_TESSFACTOR_ADDR_LO (0d08) 272 PC_TESSFACTOR_ADDR_LO: 0 273 PC_TESSFACTOR_ADDR_HI: 0 274000000050019012c: 0000: 480d0802 00000000 00000000 275 opcode: CP_SET_DRAW_STATE (43) (4 dwords) 276 { COUNT = 0 | DISABLE_ALL_GROUPS | GROUP_ID = 0 } 277 { ADDR_LO = 0 } 278 { ADDR_HI = 0 } 2790000000500190138: 0000: 70438003 00040000 00000000 00000000 280 write UNKNOWN_E7C0 (e7c0) 281 UNKNOWN_E7C0: 0 282 0xe7c1: 00000000 283 0xe7c2: 00000000 284 HLSQ_VS_CONSTLEN: 0 285 HLSQ_VS_INSTRLEN: 0 286 UNKNOWN_E7C5: 0 287 0xe7c6: 00000000 288 0xe7c7: 00000000 289 HLSQ_HS_CONSTLEN: 0 290 HLSQ_HS_INSTRLEN: 0 291 UNKNOWN_E7CA: 0 292 0xe7cb: 00000000 293 0xe7cc: 00000000 294 HLSQ_DS_CONSTLEN: 0 295 HLSQ_DS_INSTRLEN: 0 296 UNKNOWN_E7CF: 0 297 0xe7d0: 00000000 298 0xe7d1: 00000000 299 HLSQ_GS_CONSTLEN: 0 300 HLSQ_GS_INSTRLEN: 0 301 UNKNOWN_E7D4: 0 302 0xe7d5: 00000000 303 0xe7d6: 00000000 304 HLSQ_FS_CONSTLEN: 0 305 HLSQ_FS_INSTRLEN: 0 306 UNKNOWN_E7D9: 0 307 0xe7da: 00000000 308 0xe7db: 00000000 309 HLSQ_CS_CONSTLEN: 0 310 HLSQ_CS_INSTRLEN: 0 3110000000500190148: 0000: 48e7c09e 00000000 00000000 00000000 00000000 00000000 00000000 00000000 312* 313 write RB_CCU_CNTL (0cc7) 314 RB_CCU_CNTL: 0x7c13c080 31500000005001901c4: 0000: 400cc701 7c13c080 316 opcode: CP_PREEMPT_ENABLE_LOCAL (6a) (2 dwords) 31700000005001901cc: 0000: 70ea0001 00000001 318 opcode: CP_COMPUTE_CHECKPOINT (6e) (8 dwords) 319 { ADDR_0_LO = 0x15000 } 320 { ADDR_0_HI = 0x5 } 321 { 2 = 0x18 } 322 { 3 = 0x3 } 323 { ADDR_1_LEN = 15 } 324 { ADDR_1_LO = 0x1f010 } 325 { ADDR_1_HI = 0x5 } 326 addr: 0x000000050001f010 327 len: 0xf 328 write GRAS_LRZ_CNTL (e100) 329 GRAS_LRZ_CNTL: { 0x8 } 330000000050001f010: 0000: 48e10001 00000008 331 write CP_SCRATCH[0].REG (0b78) 332 CP_SCRATCH[0].REG: 1 333000000050001f018: 0000: 400b7801 00000001 334 opcode: CP_WAIT_MEM_WRITES (12) (1 dwords) 335000000050001f020: 0000: 70928000 336 opcode: (null) (74) (6 dwords) 337000000050001f024: 0000: 70f48005 c0000b78 00012c40 00000005 00015000 00000005 338 opcode: CP_MEM_WRITE (3d) (4 dwords) 339 { ADDR_LO = 0x11000 } 340 { ADDR_HI = 0x5 } 341 gpuaddr:0000000500011000 342000000050001f048: 0000: 00000001 343000000050001f03c: 0000: 703d8003 00011000 00000005 00000001 344000000050001f010: 0000: 48e10001 00000008 400b7801 00000001 70928000 70f48005 c0000b78 00012c40 345000000050001f030: 0020: 00000005 00015000 00000005 703d8003 00011000 00000005 00000001 34600000005001901d4: 0000: 706e0007 00015000 00000005 00000018 00000003 0000000f 0001f010 00000005 347 opcode: CP_SET_DRAW_STATE (43) (4 dwords) 348 { COUNT = 0 | DISABLE_ALL_GROUPS | GROUP_ID = 0 } 349 { ADDR_LO = 0 } 350 { ADDR_HI = 0 } 35100000005001901f4: 0000: 70438003 00040000 00000000 00000000 352 write RB_CNTL (e140) 353 RB_CNTL: { WIDTH = 0 | HEIGHT = 0 | BYPASS } 3540000000500190204: 0000: 40e14001 00020000 355 write GRAS_LRZ_CNTL (e100) 356 GRAS_LRZ_CNTL: { 0 } 357000000050019020c: 0000: 48e10001 00000000 358 opcode: CP_EVENT_WRITE (46) (2 dwords) 359 { EVENT = LRZ_FLUSH } 360 event LRZ_FLUSH 3610000000500190214: 0000: 70460001 00000026 362 opcode: CP_SKIP_IB2_ENABLE_GLOBAL (1d) (2 dwords) 363000000050019021c: 0000: 709d0001 00000000 364 opcode: CP_EVENT_WRITE (46) (2 dwords) 365 { EVENT = PC_CCU_INVALIDATE_COLOR } 366 event PC_CCU_INVALIDATE_COLOR 3670000000500190224: 0000: 70460001 00000019 368 opcode: CP_EVENT_WRITE (46) (2 dwords) 369 { EVENT = PC_CCU_INVALIDATE_DEPTH } 370 event PC_CCU_INVALIDATE_DEPTH 371000000050019022c: 0000: 70460001 00000018 372 write PC_POWER_CNTL (e3b0) 373 PC_POWER_CNTL: 0x3 3740000000500190234: 0000: 48e3b001 00000003 375 write VFD_POWER_CNTL (e4f0) 376 VFD_POWER_CNTL: 0x3 377000000050019023c: 0000: 48e4f001 00000003 378 opcode: CP_WAIT_FOR_IDLE (26) (1 dwords) 3790000000500190244: 0000: 70268000 380 write RB_CCU_CNTL (0cc7) 381 RB_CCU_CNTL: 0x10000000 3820000000500190248: 0000: 400cc701 10000000 383 write GRAS_SC_WINDOW_SCISSOR_TL (e0ea) 384 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 385 GRAS_SC_WINDOW_SCISSOR_BR: { X = 255 | Y = 255 } 3860000000500190250: 0000: 48e0ea02 00000000 00ff00ff 387 write RB_RESOLVE_CNTL_1 (e211) 388 RB_RESOLVE_CNTL_1: { X = 0 | Y = 0 } 389 RB_RESOLVE_CNTL_2: { X = 255 | Y = 255 } 390000000050019025c: 0000: 48e21102 00000000 00ff00ff 391 write RB_WINDOW_OFFSET (e1d0) 392 RB_WINDOW_OFFSET: { X = 0 | Y = 0 } 3930000000500190268: 0000: 40e1d001 00000000 394 write HLSQ_UPDATE_CNTL (e78a) 395 HLSQ_UPDATE_CNTL: 0x1f00000 3960000000500190270: 0000: 40e78a01 01f00000 397 opcode: CP_INDIRECT_BUFFER (3f) (4 dwords) 398 ibaddr:000000050001b000 399 ibsize:0000004b 400 opcode: CP_PERFCOUNTER_ACTION (50) (4 dwords) 401 { 0 = 0 } 402 { ADDR_0_LO = 0x12000 } 403 { ADDR_0_HI = 0x5 } 404000000050001b000: 0000: 70d08003 00000000 00012000 00000005 405 opcode: CP_PERFCOUNTER_ACTION (50) (4 dwords) 406 { 0 = 0x10 } 407 { ADDR_0_LO = 0x13000 } 408 { ADDR_0_HI = 0x5 } 409000000050001b010: 0000: 70d08003 00000010 00013000 00000005 410 write SP_SP_CNTL (e580) 411 SP_SP_CNTL: 0 412000000050001b020: 0000: 48e58001 00000000 413 write HLSQ_CONTROL_0_REG (e784) 414 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | CSTHREADSIZE = TWO_QUADS | 0x880 } 415000000050001b028: 0000: 48e78401 00000881 416 write SP_CS_CTRL_REG0 (e5f0) 417 SP_CS_CTRL_REG0: { BUFFER | THREADSIZE = TWO_QUADS | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 2 | BRANCHSTACK = 0 | 0x2 } 418000000050001b030: 0000: 40e5f001 00000806 419 write HLSQ_CS_CONFIG (e790) 420 HLSQ_CS_CONFIG: { ENABLED | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 421000000050001b038: 0000: 48e79001 00000001 422 write HLSQ_CS_CNTL (e796) 423 HLSQ_CS_CNTL: { SSBO_ENABLE | INSTRLEN = 1 } 424000000050001b040: 0000: 48e79601 00000003 425 write SP_CS_CONFIG (e589) 426 SP_CS_CONFIG: { ENABLED | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 427000000050001b048: 0000: 48e58901 00000001 428 write HLSQ_CS_CONSTLEN (e7dc) 429 HLSQ_CS_CONSTLEN: 48 430000000050001b050: 0000: 40e7dc01 00000030 431 write HLSQ_CS_INSTRLEN (e7dd) 432 HLSQ_CS_INSTRLEN: 1 433000000050001b058: 0000: 48e7dd01 00000001 434 write HLSQ_CS_NDRANGE_0 (e7b0) 435 HLSQ_CS_NDRANGE_0: { KERNELDIM = 3 | LOCALSIZEX = 4 | LOCALSIZEY = 5 | LOCALSIZEZ = 6 } 436000000050001b060: 0000: 40e7b001 01805013 437 write UNKNOWN_E5F2 (e5f2) 438 UNKNOWN_E5F2: 0 439 SP_CS_OBJ_START_LO: 0x18000 440 SP_CS_OBJ_START_HI: 0x5 base=500018000, offset=0, size=8192 4410000000500018000: 0000: 00000000 20554001 20020000 46d00000 00000001 20554002 00000000 00000000 4420000000500018020: 0020: 00000001 20154003 00010000 42300000 00000001 20154004 01800002 c1060300 4430000000500018040: 0040: 00000000 00000400 01800004 c1060100 01804001 c0460000 00000000 00001000 4440000000500018060: 0060: 01000601 c7260003 00000000 03000000 00000000 00000000 00000000 00000000 445* 446 :1:0000:0000[20554001x_00000000x] mov.s32s32 r0.y, 0 447 :2:0001:0001[46d00000x_20020000x] shl.b r0.x, r0.x, 2 448 :1:0002:0002[20554002x_00000001x] mov.s32s32 r0.z, 1 449 :0:0003:0003[00000000x_00000000x] nop 450 :1:0004:0004[20154003x_00000001x] mov.s32s32 r0.w, r0.y 451 :2:0005:0005[42300000x_00010000x] add.s r0.x, r0.x, r0.y 452 :1:0006:0006[20154004x_00000001x] mov.s32s32 r1.x, r0.y 453 :6:0007:0007[c1060300x_01800002x] stl.u32 l[r0.y], r0.y, 1 454 :0:0008:0008[00000400x_00000000x] (rpt4)nop 455 :6:0009:0013[c1060100x_01800004x] stl.u32 l[r0.x], r0.z, 1 456 :6:0010:0014[c0460000x_01804001x] ldl.u32 r0.x, l[r0.y], 1 457 :0:0011:0015[00001000x_00000000x] (ss)nop 458 :6:0012:0016[c7260003x_01000601x] stgb.untyped.4d.u32.1 g[0], r0.x, r0.y, r0.w 459 :0:0013:0017[03000000x_00000000x] end 460 :0:0014:0018[00000000x_00000000x] nop 461 :0:0015:0019[00000000x_00000000x] nop 462 :0:0016:0020[00000000x_00000000x] nop 463 :0:0017:0021[00000000x_00000000x] nop 464 Stats: 465 - shaderdb: 22 instr, 11 nops, 11 non-nops, 4 mov, 0 cov 466 - shaderdb: 0 last-baryf, 0 half, 1 full, 0 constlen 467 - shaderdb: 12 cat0, 4 cat1, 2 cat2, 0 cat3, 0 cat4, 0 cat5, 4 cat6, 0 cat7 468 - shaderdb: 0 sstall, 1 (ss), 0 (sy) 469000000050001b068: 0000: 48e5f283 00000000 00018000 00000005 470 write 0xe5f9 (e5f9) 471 0xe5f9: 0000001f 472000000050001b078: 0000: 40e5f901 0000001f 473 write HLSQ_CS_CNTL_0 (e7b7) 474 HLSQ_CS_CNTL_0: { WGIDCONSTID = r51.w | UNK0 = r48.x | UNK1 = r63.x | LOCALIDREGID = r0.x } 475 HLSQ_CS_CNTL_1: 0x1f 476000000050001b080: 0000: 48e7b702 00fcc0cf 0000001f 477 write HLSQ_CS_KERNEL_GROUP_X (e7b9) 478 HLSQ_CS_KERNEL_GROUP_X: 0x1 479 HLSQ_CS_KERNEL_GROUP_Y: 0x1 480 HLSQ_CS_KERNEL_GROUP_Z: 0x1 481000000050001b08c: 0000: 40e7b983 00000001 00000001 00000001 482 opcode: CP_LOAD_STATE4 (30) (4 dwords) 483 { DST_OFF = 0 | STATE_SRC = SS4_INDIRECT | STATE_BLOCK = SB4_CS_SHADER | NUM_UNIT = 1 } 484 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0x18000 } 485 { EXT_SRC_ADDR_HI = 0x5 } 486 :1:0000:0000[20554001x_00000000x] mov.s32s32 r0.y, 0 487 :2:0001:0001[46d00000x_20020000x] shl.b r0.x, r0.x, 2 488 :1:0002:0002[20554002x_00000001x] mov.s32s32 r0.z, 1 489 :0:0003:0003[00000000x_00000000x] nop 490 :1:0004:0004[20154003x_00000001x] mov.s32s32 r0.w, r0.y 491 :2:0005:0005[42300000x_00010000x] add.s r0.x, r0.x, r0.y 492 :1:0006:0006[20154004x_00000001x] mov.s32s32 r1.x, r0.y 493 :6:0007:0007[c1060300x_01800002x] stl.u32 l[r0.y], r0.y, 1 494 :0:0008:0008[00000400x_00000000x] (rpt4)nop 495 :6:0009:0013[c1060100x_01800004x] stl.u32 l[r0.x], r0.z, 1 496 :6:0010:0014[c0460000x_01804001x] ldl.u32 r0.x, l[r0.y], 1 497 :0:0011:0015[00001000x_00000000x] (ss)nop 498 :6:0012:0016[c7260003x_01000601x] stgb.untyped.4d.u32.1 g[0], r0.x, r0.y, r0.w 499 :0:0013:0017[03000000x_00000000x] end 500 :0:0014:0018[00000000x_00000000x] nop 501 :0:0015:0019[00000000x_00000000x] nop 502 Stats: 503 - shaderdb: 20 instr, 9 nops, 11 non-nops, 4 mov, 0 cov 504 - shaderdb: 0 last-baryf, 0 half, 1 full, 0 constlen 505 - shaderdb: 10 cat0, 4 cat1, 2 cat2, 0 cat3, 0 cat4, 0 cat5, 4 cat6, 0 cat7 506 - shaderdb: 0 sstall, 1 (ss), 0 (sy) 507000000050001b09c: 0000: 70b08003 00760000 00018000 00000005 508 write TPL1_VS_TEX_COUNT (e700) 509 TPL1_VS_TEX_COUNT: 0 510000000050001b0ac: 0000: 48e70001 00000000 511 write TPL1_HS_TEX_COUNT (e701) 512 TPL1_HS_TEX_COUNT: 0 513000000050001b0b4: 0000: 40e70101 00000000 514 write TPL1_DS_TEX_COUNT (e702) 515 TPL1_DS_TEX_COUNT: 0 516000000050001b0bc: 0000: 40e70201 00000000 517 write TPL1_GS_TEX_COUNT (e703) 518 TPL1_GS_TEX_COUNT: 0 519000000050001b0c4: 0000: 48e70301 00000000 520 write TPL1_FS_TEX_COUNT (e750) 521 TPL1_FS_TEX_COUNT: 0 522000000050001b0cc: 0000: 48e75001 00000000 523 write TPL1_CS_TEX_COUNT (e751) 524 TPL1_CS_TEX_COUNT: 0 525000000050001b0d4: 0000: 40e75101 00000000 526 opcode: CP_LOAD_STATE4 (30) (8 dwords) 527 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_CS_SSBO | NUM_UNIT = 1 } 528 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 529 { EXT_SRC_ADDR_HI = 0 } 530 { BASE_LO = 0 } 531 { PITCH = 0 } 532 { ARRAY_PITCH = 0 } 533 { CPP = 0 } 534000000050001b0ec: 0000: 00000000 00000000 00000000 00000000 535000000050001b0dc: 0000: 70b00007 007c0000 00000000 00000000 00000000 00000000 00000000 00000000 536 opcode: CP_LOAD_STATE4 (30) (6 dwords) 537 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_CS_SSBO | NUM_UNIT = 1 } 538 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 539 { EXT_SRC_ADDR_HI = 0 } 540 { FMT = 0 | WIDTH = 0 } 541 { HEIGHT = 0 | DEPTH = 0 } 542000000050001b10c: 0000: 00000000 00000000 543000000050001b0fc: 0000: 70b08005 007c0000 00000001 00000000 00000000 00000000 544 opcode: CP_LOAD_STATE4 (30) (6 dwords) 545 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_CS_SSBO | NUM_UNIT = 1 } 546 { STATE_TYPE = ST4_UBO | EXT_SRC_ADDR = 0 } 547 { EXT_SRC_ADDR_HI = 0 } 548 { BASE_LO = 0 } 549 { BASE_HI = 0 } 550000000050001b124: 0000: 00000000 00000000 551000000050001b114: 0000: 70b08005 007c0000 00000002 00000000 00000000 00000000 5520000000500190278: 0000: 70bf8003 0001b000 00000005 0000004b 553 write VPC_SO_OVERRIDE (e2a2) 554 VPC_SO_OVERRIDE: { SO_DISABLE } 5550000000500190288: 0000: 40e2a201 00000001 556 opcode: CP_SET_VISIBILITY_OVERRIDE (64) (2 dwords) 5570000000500190290: 0000: 70640001 00000001 558 opcode: CP_INDIRECT_BUFFER (3f) (4 dwords) 559 ibaddr:0000000500170000 560 ibsize:0000004f 561 write HLSQ_CONTROL_0_REG (e784) 562 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | CSTHREADSIZE = TWO_QUADS | 0x880 } 5630000000500170000: 0000: 48e78401 00000881 564 write SP_CS_CTRL_REG0 (e5f0) 565 SP_CS_CTRL_REG0: { BUFFER | THREADSIZE = TWO_QUADS | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 2 | BRANCHSTACK = 0 | 0x2 } 5660000000500170008: 0000: 40e5f001 00000806 567 write HLSQ_CS_CONFIG (e790) 568 HLSQ_CS_CONFIG: { ENABLED | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 5690000000500170010: 0000: 48e79001 00000001 570 write HLSQ_CS_CNTL (e796) 571 HLSQ_CS_CNTL: { SSBO_ENABLE | INSTRLEN = 1 } 5720000000500170018: 0000: 48e79601 00000003 573 write SP_CS_CONFIG (e589) 574 SP_CS_CONFIG: { ENABLED | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 5750000000500170020: 0000: 48e58901 00000001 576 write HLSQ_CS_CONSTLEN (e7dc) 577 HLSQ_CS_CONSTLEN: 48 5780000000500170028: 0000: 40e7dc01 00000030 579 write HLSQ_CS_INSTRLEN (e7dd) 580 HLSQ_CS_INSTRLEN: 1 5810000000500170030: 0000: 48e7dd01 00000001 582 write HLSQ_CS_NDRANGE_0 (e7b0) 583 HLSQ_CS_NDRANGE_0: { KERNELDIM = 3 | LOCALSIZEX = 4 | LOCALSIZEY = 5 | LOCALSIZEZ = 6 } 5840000000500170038: 0000: 40e7b001 01805013 585 write UNKNOWN_E5F2 (e5f2) 586 UNKNOWN_E5F2: 0 587 SP_CS_OBJ_START_LO: 0x18000 base=500018000, offset=0, size=8192 588 SP_CS_OBJ_START_HI: 0x5 base=500018000, offset=0, size=8192 5890000000500018000: 0000: 00000000 20554001 20020000 46d00000 00000001 20554002 00000000 00000000 5900000000500018020: 0020: 00000001 20154003 00010000 42300000 00000001 20154004 01800002 c1060300 5910000000500018040: 0040: 00000000 00000400 01800004 c1060100 01804001 c0460000 00000000 00001000 5920000000500018060: 0060: 01000601 c7260003 00000000 03000000 00000000 00000000 00000000 00000000 593* 594 :1:0000:0000[20554001x_00000000x] mov.s32s32 r0.y, 0 595 :2:0001:0001[46d00000x_20020000x] shl.b r0.x, r0.x, 2 596 :1:0002:0002[20554002x_00000001x] mov.s32s32 r0.z, 1 597 :0:0003:0003[00000000x_00000000x] nop 598 :1:0004:0004[20154003x_00000001x] mov.s32s32 r0.w, r0.y 599 :2:0005:0005[42300000x_00010000x] add.s r0.x, r0.x, r0.y 600 :1:0006:0006[20154004x_00000001x] mov.s32s32 r1.x, r0.y 601 :6:0007:0007[c1060300x_01800002x] stl.u32 l[r0.y], r0.y, 1 602 :0:0008:0008[00000400x_00000000x] (rpt4)nop 603 :6:0009:0013[c1060100x_01800004x] stl.u32 l[r0.x], r0.z, 1 604 :6:0010:0014[c0460000x_01804001x] ldl.u32 r0.x, l[r0.y], 1 605 :0:0011:0015[00001000x_00000000x] (ss)nop 606 :6:0012:0016[c7260003x_01000601x] stgb.untyped.4d.u32.1 g[0], r0.x, r0.y, r0.w 607 :0:0013:0017[03000000x_00000000x] end 608 :0:0014:0018[00000000x_00000000x] nop 609 :0:0015:0019[00000000x_00000000x] nop 610 :0:0016:0020[00000000x_00000000x] nop 611 :0:0017:0021[00000000x_00000000x] nop 612 Stats: 613 - shaderdb: 22 instr, 11 nops, 11 non-nops, 4 mov, 0 cov 614 - shaderdb: 0 last-baryf, 0 half, 1 full, 0 constlen 615 - shaderdb: 12 cat0, 4 cat1, 2 cat2, 0 cat3, 0 cat4, 0 cat5, 4 cat6, 0 cat7 616 - shaderdb: 0 sstall, 1 (ss), 0 (sy) 6170000000500170040: 0000: 48e5f283 00000000 00018000 00000005 618 write 0xe5f9 (e5f9) 619 0xe5f9: 0000001f 6200000000500170050: 0000: 40e5f901 0000001f 621 write HLSQ_CS_CNTL_0 (e7b7) 622 HLSQ_CS_CNTL_0: { WGIDCONSTID = r51.w | UNK0 = r48.x | UNK1 = r63.x | LOCALIDREGID = r0.x } 623 HLSQ_CS_CNTL_1: 0x1f 6240000000500170058: 0000: 48e7b702 00fcc0cf 0000001f 625 write HLSQ_CS_KERNEL_GROUP_X (e7b9) 626 HLSQ_CS_KERNEL_GROUP_X: 0x1 627 HLSQ_CS_KERNEL_GROUP_Y: 0x1 628 HLSQ_CS_KERNEL_GROUP_Z: 0x1 6290000000500170064: 0000: 40e7b983 00000001 00000001 00000001 630 opcode: CP_LOAD_STATE4 (30) (4 dwords) 631 { DST_OFF = 0 | STATE_SRC = SS4_INDIRECT | STATE_BLOCK = SB4_CS_SHADER | NUM_UNIT = 1 } 632 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0x18000 } 633 { EXT_SRC_ADDR_HI = 0x5 } 634 :1:0000:0000[20554001x_00000000x] mov.s32s32 r0.y, 0 635 :2:0001:0001[46d00000x_20020000x] shl.b r0.x, r0.x, 2 636 :1:0002:0002[20554002x_00000001x] mov.s32s32 r0.z, 1 637 :0:0003:0003[00000000x_00000000x] nop 638 :1:0004:0004[20154003x_00000001x] mov.s32s32 r0.w, r0.y 639 :2:0005:0005[42300000x_00010000x] add.s r0.x, r0.x, r0.y 640 :1:0006:0006[20154004x_00000001x] mov.s32s32 r1.x, r0.y 641 :6:0007:0007[c1060300x_01800002x] stl.u32 l[r0.y], r0.y, 1 642 :0:0008:0008[00000400x_00000000x] (rpt4)nop 643 :6:0009:0013[c1060100x_01800004x] stl.u32 l[r0.x], r0.z, 1 644 :6:0010:0014[c0460000x_01804001x] ldl.u32 r0.x, l[r0.y], 1 645 :0:0011:0015[00001000x_00000000x] (ss)nop 646 :6:0012:0016[c7260003x_01000601x] stgb.untyped.4d.u32.1 g[0], r0.x, r0.y, r0.w 647 :0:0013:0017[03000000x_00000000x] end 648 :0:0014:0018[00000000x_00000000x] nop 649 :0:0015:0019[00000000x_00000000x] nop 650 Stats: 651 - shaderdb: 20 instr, 9 nops, 11 non-nops, 4 mov, 0 cov 652 - shaderdb: 0 last-baryf, 0 half, 1 full, 0 constlen 653 - shaderdb: 10 cat0, 4 cat1, 2 cat2, 0 cat3, 0 cat4, 0 cat5, 4 cat6, 0 cat7 654 - shaderdb: 0 sstall, 1 (ss), 0 (sy) 6550000000500170074: 0000: 70b08003 00760000 00018000 00000005 656 opcode: CP_LOAD_STATE4 (30) (8 dwords) 657 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_CS_SSBO | NUM_UNIT = 1 } 658 { STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 } 659 { EXT_SRC_ADDR_HI = 0 } 660 { BASE_LO = 0 } 661 { PITCH = 0 } 662 { ARRAY_PITCH = 0 } 663 { CPP = 0 } 6640000000500170094: 0000: 00000000 00000000 00000000 00000000 6650000000500170084: 0000: 70b00007 007c0000 00000000 00000000 00000000 00000000 00000000 00000000 666 opcode: CP_LOAD_STATE4 (30) (6 dwords) 667 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_CS_SSBO | NUM_UNIT = 1 } 668 { STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 } 669 { EXT_SRC_ADDR_HI = 0 } 670 { FMT = 0 | WIDTH = 0 } 671 { HEIGHT = 0 | DEPTH = 0 } 67200000005001700b4: 0000: 00000000 00000000 67300000005001700a4: 0000: 70b08005 007c0000 00000001 00000000 00000000 00000000 674 opcode: CP_LOAD_STATE4 (30) (6 dwords) 675 { DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_CS_SSBO | NUM_UNIT = 1 } 676 { STATE_TYPE = ST4_UBO | EXT_SRC_ADDR = 0 } 677 { EXT_SRC_ADDR_HI = 0 } 678 { BASE_LO = 0 } 679 { BASE_HI = 0 } 68000000005001700cc: 0000: 00000000 00000000 68100000005001700bc: 0000: 70b08005 007c0000 00000002 00000000 00000000 00000000 682 write TPL1_VS_TEX_COUNT (e700) 683 TPL1_VS_TEX_COUNT: 0 68400000005001700d4: 0000: 48e70001 00000000 685 write TPL1_HS_TEX_COUNT (e701) 686 TPL1_HS_TEX_COUNT: 0 68700000005001700dc: 0000: 40e70101 00000000 688 write TPL1_DS_TEX_COUNT (e702) 689 TPL1_DS_TEX_COUNT: 0 69000000005001700e4: 0000: 40e70201 00000000 691 write TPL1_GS_TEX_COUNT (e703) 692 TPL1_GS_TEX_COUNT: 0 69300000005001700ec: 0000: 48e70301 00000000 694 write TPL1_FS_TEX_COUNT (e750) 695 TPL1_FS_TEX_COUNT: 0 69600000005001700f4: 0000: 48e75001 00000000 697 write TPL1_CS_TEX_COUNT (e751) 698 TPL1_CS_TEX_COUNT: 0 69900000005001700fc: 0000: 40e75101 00000000 700 write HLSQ_CS_NDRANGE_1 (e7b1) 701 HLSQ_CS_NDRANGE_1: { GLOBALSIZE_X = 5 } 702 HLSQ_CS_NDRANGE_2: { GLOBALOFF_X = 0 } 703 HLSQ_CS_NDRANGE_3: { GLOBALSIZE_Y = 12 } 704 HLSQ_CS_NDRANGE_4: { GLOBALOFF_Y = 0 } 705 HLSQ_CS_NDRANGE_5: { GLOBALSIZE_Z = 21 } 706 HLSQ_CS_NDRANGE_6: { GLOBALOFF_Z = 0 } 7070000000500170104: 0000: 48e7b186 00000005 00000000 0000000c 00000000 00000015 00000000 708 opcode: CP_EXEC_CS (33) (5 dwords) 709 { 0 = 0 } 710 { NGROUPS_X = 1 } 711 { NGROUPS_Y = 2 } 712 { NGROUPS_Z = 3 } 713 draw[0] register values 714!+ 00000001 CP_SCRATCH[0].REG: 1 715!+ 00100000 RB_DBG_ECO_CNTL: 0x100000 716!+ 00000044 RB_MODE_CNTL: 0x44 717!+ 10000000 RB_CCU_CNTL: 0x10000000 718!+ 0000001f PC_MODE_CNTL: 0x1f 719 + 00000000 PC_TESSFACTOR_ADDR_LO: 0 720 + 00000000 PC_TESSFACTOR_ADDR_HI: 0 721!+ 00000080 HLSQ_TIMEOUT_THRESHOLD_0: 0x80 722 + 00000000 HLSQ_TIMEOUT_THRESHOLD_1: 0 723!+ 00000001 HLSQ_MODE_CNTL: 0x1 724 + 00000000 VFD_MODE_CNTL: 0 725!+ 00000400 VPC_DBG_ECO_CNTL: { ALLFLATOPTDIS } 726 + 00000000 VPC_MODE_CNTL: { 0 } 727 + 00000000 UCHE_CACHE_INVALIDATE_MIN_LO: 0 728 + 00000000 UCHE_CACHE_INVALIDATE_MIN_HI: 0 729 + 00000000 UCHE_CACHE_INVALIDATE_MAX_LO: 0 730 + 00000000 UCHE_CACHE_INVALIDATE_MAX_HI: 0 731!+ 00000012 UCHE_CACHE_INVALIDATE: 0x12 732!+ 00000800 SP_DBG_ECO_CNTL: 0x800 733!+ 0000001e SP_MODE_CNTL: 0x1e 734!+ 00000544 TPL1_MODE_CNTL: 0x544 735!+ 3ff00010 GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1023.000000 } 736!+ 00000008 GRAS_SU_POINT_SIZE: 0.500000 737 + 00000000 GRAS_SU_CONSERVATIVE_RAS_CNTL: 0 738 + 00000000 GRAS_SC_SCREEN_SCISSOR_CNTL: 0 739 + 00000000 GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 } 740!+ 00ff00ff GRAS_SC_WINDOW_SCISSOR_BR: { X = 255 | Y = 255 } 741 + 00000000 GRAS_LRZ_CNTL: { 0 } 742!+ 00020000 RB_CNTL: { WIDTH = 0 | HEIGHT = 0 | BYPASS } 743 + 00000000 RB_WINDOW_OFFSET: { X = 0 | Y = 0 } 744 + 00000000 RB_RESOLVE_CNTL_1: { X = 0 | Y = 0 } 745!+ 00ff00ff RB_RESOLVE_CNTL_2: { X = 255 | Y = 255 } 746 + 00000000 UNKNOWN_E292: 0 747 + 00000000 UNKNOWN_E293: 0 748!+ 00000001 VPC_SO_OVERRIDE: { SO_DISABLE } 749!+ 00000012 PC_RASTER_CNTL: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES } 750!+ ffffffff PC_RESTART_INDEX: 0xffffffff 751!+ 00000003 PC_POWER_CNTL: 0x3 752!+ 00000003 VFD_POWER_CNTL: 0x3 753 + 00000000 SP_SP_CNTL: 0 754!+ 00000001 SP_CS_CONFIG: { ENABLED | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 755 + 00000000 SP_VS_CONFIG_MAX_CONST: 0 756 + 00000000 SP_FS_CONFIG_MAX_CONST: 0 757!+ 00000806 SP_CS_CTRL_REG0: { BUFFER | THREADSIZE = TWO_QUADS | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 2 | BRANCHSTACK = 0 | 0x2 } 758 + 00000000 UNKNOWN_E5F2: 0 759!+ 00018000 SP_CS_OBJ_START_LO: 0x18000 base=500018000, offset=0, size=8192 760!+ 00000005 SP_CS_OBJ_START_HI: 0x5 base=500018000, offset=0, size=8192 7610000000500018000: 0000: 00000000 20554001 20020000 46d00000 00000001 20554002 00000000 00000000 7620000000500018020: 0020: 00000001 20154003 00010000 42300000 00000001 20154004 01800002 c1060300 7630000000500018040: 0040: 00000000 00000400 01800004 c1060100 01804001 c0460000 00000000 00001000 7640000000500018060: 0060: 01000601 c7260003 00000000 03000000 00000000 00000000 00000000 00000000 765* 766 :1:0000:0000[20554001x_00000000x] mov.s32s32 r0.y, 0 767 :2:0001:0001[46d00000x_20020000x] shl.b r0.x, r0.x, 2 768 :1:0002:0002[20554002x_00000001x] mov.s32s32 r0.z, 1 769 :0:0003:0003[00000000x_00000000x] nop 770 :1:0004:0004[20154003x_00000001x] mov.s32s32 r0.w, r0.y 771 :2:0005:0005[42300000x_00010000x] add.s r0.x, r0.x, r0.y 772 :1:0006:0006[20154004x_00000001x] mov.s32s32 r1.x, r0.y 773 :6:0007:0007[c1060300x_01800002x] stl.u32 l[r0.y], r0.y, 1 774 :0:0008:0008[00000400x_00000000x] (rpt4)nop 775 :6:0009:0013[c1060100x_01800004x] stl.u32 l[r0.x], r0.z, 1 776 :6:0010:0014[c0460000x_01804001x] ldl.u32 r0.x, l[r0.y], 1 777 :0:0011:0015[00001000x_00000000x] (ss)nop 778 :6:0012:0016[c7260003x_01000601x] stgb.untyped.4d.u32.1 g[0], r0.x, r0.y, r0.w 779 :0:0013:0017[03000000x_00000000x] end 780 :0:0014:0018[00000000x_00000000x] nop 781 :0:0015:0019[00000000x_00000000x] nop 782 :0:0016:0020[00000000x_00000000x] nop 783 :0:0017:0021[00000000x_00000000x] nop 784 Stats: 785 - shaderdb: 22 instr, 11 nops, 11 non-nops, 4 mov, 0 cov 786 - shaderdb: 0 last-baryf, 0 half, 1 full, 0 constlen 787 - shaderdb: 12 cat0, 4 cat1, 2 cat2, 0 cat3, 0 cat4, 0 cat5, 4 cat6, 0 cat7 788 - shaderdb: 0 sstall, 1 (ss), 0 (sy) 789!+ 0000001f 0xe5f9: 0000001f 790 + 00000000 TPL1_VS_TEX_COUNT: 0 791 + 00000000 TPL1_HS_TEX_COUNT: 0 792 + 00000000 TPL1_DS_TEX_COUNT: 0 793 + 00000000 TPL1_GS_TEX_COUNT: 0 794 + 00000000 TPL1_FS_TEX_COUNT: 0 795 + 00000000 TPL1_CS_TEX_COUNT: 0 796!+ 00000881 HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | CSTHREADSIZE = TWO_QUADS | 0x880 } 797!+ 01f00000 HLSQ_UPDATE_CNTL: 0x1f00000 798!+ 00000001 HLSQ_CS_CONFIG: { ENABLED | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 } 799!+ 00000003 HLSQ_CS_CNTL: { SSBO_ENABLE | INSTRLEN = 1 } 800!+ 01805013 HLSQ_CS_NDRANGE_0: { KERNELDIM = 3 | LOCALSIZEX = 4 | LOCALSIZEY = 5 | LOCALSIZEZ = 6 } 801!+ 00000005 HLSQ_CS_NDRANGE_1: { GLOBALSIZE_X = 5 } 802 + 00000000 HLSQ_CS_NDRANGE_2: { GLOBALOFF_X = 0 } 803!+ 0000000c HLSQ_CS_NDRANGE_3: { GLOBALSIZE_Y = 12 } 804 + 00000000 HLSQ_CS_NDRANGE_4: { GLOBALOFF_Y = 0 } 805!+ 00000015 HLSQ_CS_NDRANGE_5: { GLOBALSIZE_Z = 21 } 806 + 00000000 HLSQ_CS_NDRANGE_6: { GLOBALOFF_Z = 0 } 807!+ 00fcc0cf HLSQ_CS_CNTL_0: { WGIDCONSTID = r51.w | UNK0 = r48.x | UNK1 = r63.x | LOCALIDREGID = r0.x } 808!+ 0000001f HLSQ_CS_CNTL_1: 0x1f 809!+ 00000001 HLSQ_CS_KERNEL_GROUP_X: 0x1 810!+ 00000001 HLSQ_CS_KERNEL_GROUP_Y: 0x1 811!+ 00000001 HLSQ_CS_KERNEL_GROUP_Z: 0x1 812 + 00000000 UNKNOWN_E7C0: 0 813 + 00000000 0xe7c1: 00000000 814 + 00000000 0xe7c2: 00000000 815 + 00000000 HLSQ_VS_CONSTLEN: 0 816 + 00000000 HLSQ_VS_INSTRLEN: 0 817 + 00000000 UNKNOWN_E7C5: 0 818 + 00000000 0xe7c6: 00000000 819 + 00000000 0xe7c7: 00000000 820 + 00000000 HLSQ_HS_CONSTLEN: 0 821 + 00000000 HLSQ_HS_INSTRLEN: 0 822 + 00000000 UNKNOWN_E7CA: 0 823 + 00000000 0xe7cb: 00000000 824 + 00000000 0xe7cc: 00000000 825 + 00000000 HLSQ_DS_CONSTLEN: 0 826 + 00000000 HLSQ_DS_INSTRLEN: 0 827 + 00000000 UNKNOWN_E7CF: 0 828 + 00000000 0xe7d0: 00000000 829 + 00000000 0xe7d1: 00000000 830 + 00000000 HLSQ_GS_CONSTLEN: 0 831 + 00000000 HLSQ_GS_INSTRLEN: 0 832 + 00000000 UNKNOWN_E7D4: 0 833 + 00000000 0xe7d5: 00000000 834 + 00000000 0xe7d6: 00000000 835 + 00000000 HLSQ_FS_CONSTLEN: 0 836 + 00000000 HLSQ_FS_INSTRLEN: 0 837 + 00000000 UNKNOWN_E7D9: 0 838 + 00000000 0xe7da: 00000000 839 + 00000000 0xe7db: 00000000 840!+ 00000030 HLSQ_CS_CONSTLEN: 48 841!+ 00000001 HLSQ_CS_INSTRLEN: 1 8420000000500170120: 0000: 70b30004 00000000 00000001 00000002 00000003 843 write VPC_CNTL_0 (e280) 844 VPC_CNTL_0: { STRIDE_IN_VPC = 0 } 8450000000500170134: 0000: 40e28001 00000000 8460000000500190298: 0000: 70bf8003 00170000 00000005 0000004f 847 opcode: CP_SET_DRAW_STATE (43) (4 dwords) 848 { COUNT = 0 | DISABLE_ALL_GROUPS | GROUP_ID = 0 } 849 { ADDR_LO = 0 } 850 { ADDR_HI = 0 } 85100000005001902a8: 0000: 70438003 00040000 00000000 00000000 852 opcode: CP_SKIP_IB2_ENABLE_LOCAL (23) (2 dwords) 85300000005001902b8: 0000: 70230001 00000000 854 opcode: CP_SKIP_IB2_ENABLE_GLOBAL (1d) (2 dwords) 85500000005001902c0: 0000: 709d0001 00000000 856 write GRAS_LRZ_CNTL (e100) 857 GRAS_LRZ_CNTL: { 0x8 } 85800000005001902c8: 0000: 48e10001 00000008 859 opcode: CP_EVENT_WRITE (46) (2 dwords) 860 { EVENT = LRZ_FLUSH } 861 event LRZ_FLUSH 86200000005001902d0: 0000: 70460001 00000026 863 opcode: CP_EVENT_WRITE (46) (5 dwords) 864 { EVENT = CACHE_FLUSH_TS } 865 { ADDR_0_LO = 0x10000 } 866 { ADDR_0_HI = 0x5 } 867 { 3 = 0 } 868 event CACHE_FLUSH_TS 86900000005001902d8: 0000: 70460004 00000004 00010000 00000005 00000000 870 opcode: CP_SET_RENDER_MODE (6c) (9 dwords) 871 { MODE = BYPASS } 872 { ADDR_0_LO = 0x15000 } 873 { ADDR_0_HI = 0x5 } 874 { 0 } 875 { 4 = 0x3 } 876 { ADDR_1_LEN = 15 } 877 { ADDR_1_LO = 0x1f010 } 878 { ADDR_1_HI = 0x5 } 8790000000500015000: 0000: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 880* 881 addr: 0x000000050001f010 882 len: 0xf 883 write GRAS_LRZ_CNTL (e100) 884 GRAS_LRZ_CNTL: { 0x8 } 885000000050001f010: 0000: 48e10001 00000008 886 write CP_SCRATCH[0].REG (0b78) 887 CP_SCRATCH[0].REG: 1 888000000050001f018: 0000: 400b7801 00000001 889 opcode: CP_WAIT_MEM_WRITES (12) (1 dwords) 890000000050001f020: 0000: 70928000 891 opcode: (null) (74) (6 dwords) 892000000050001f024: 0000: 70f48005 c0000b78 00012c40 00000005 00015000 00000005 893 opcode: CP_MEM_WRITE (3d) (4 dwords) 894 { ADDR_LO = 0x11000 } 895 { ADDR_HI = 0x5 } 896 gpuaddr:0000000500011000 897000000050001f048: 0000: 00000001 898000000050001f03c: 0000: 703d8003 00011000 00000005 00000001 899000000050001f010: 0000: 48e10001 00000008 400b7801 00000001 70928000 70f48005 c0000b78 00012c40 900000000050001f030: 0020: 00000005 00015000 00000005 703d8003 00011000 00000005 00000001 90100000005001902ec: 0000: 70ec0008 00000001 00015000 00000005 00000000 00000003 0000000f 0001f010 902000000050019030c: 0020: 00000005 903 opcode: CP_PREEMPT_ENABLE_LOCAL (6a) (2 dwords) 9040000000500190310: 0000: 70ea0001 00000001 905 opcode: CP_SET_RENDER_MODE (6c) (9 dwords) 906 { MODE = BYPASS } 907 { ADDR_0_LO = 0x15000 } 908 { ADDR_0_HI = 0x5 } 909 { 0 } 910 { 4 = 0x3 } 911 { ADDR_1_LEN = 15 } 912 { ADDR_1_LO = 0x1f010 } 913 { ADDR_1_HI = 0x5 } 9140000000500015000: 0000: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 915* 916 addr: 0x000000050001f010 917 len: 0xf 918 write GRAS_LRZ_CNTL (e100) 919 GRAS_LRZ_CNTL: { 0x8 } 920000000050001f010: 0000: 48e10001 00000008 921 write CP_SCRATCH[0].REG (0b78) 922 CP_SCRATCH[0].REG: 1 923000000050001f018: 0000: 400b7801 00000001 924 opcode: CP_WAIT_MEM_WRITES (12) (1 dwords) 925000000050001f020: 0000: 70928000 926 opcode: (null) (74) (6 dwords) 927000000050001f024: 0000: 70f48005 c0000b78 00012c40 00000005 00015000 00000005 928 opcode: CP_MEM_WRITE (3d) (4 dwords) 929 { ADDR_LO = 0x11000 } 930 { ADDR_HI = 0x5 } 931 gpuaddr:0000000500011000 932000000050001f048: 0000: 00000001 933000000050001f03c: 0000: 703d8003 00011000 00000005 00000001 934000000050001f010: 0000: 48e10001 00000008 400b7801 00000001 70928000 70f48005 c0000b78 00012c40 935000000050001f030: 0020: 00000005 00015000 00000005 703d8003 00011000 00000005 00000001 9360000000500190318: 0000: 70ec0008 00000001 00015000 00000005 00000000 00000003 0000000f 0001f010 9370000000500190338: 0020: 00000005 938############################################################ 939vertices: 0 940cmd: test_compiler:384: <<< eglSwapBuffers(display, surface): succeeded 941cmd: test_compiler:385: >>> glFlush() 942cmd: glFlush() 943cmd: test_compiler:385: <<< glFlush(): succeeded 944cmd: test_compiler:387: >>> eglDestroySurface(display, surface) 945cmd: eglDestroySurface(display, surface) 946cmd: test_compiler:387: <<< eglDestroySurface(display, surface): succeeded 947cmd: test_compiler:388: >>> eglTerminate(display) 948cmd: eglTerminate(display) 949############################################################ 950cmdstream[1]: 11 dwords 951 opcode: CP_SET_RENDER_MODE (6c) (9 dwords) 952 { MODE = BYPASS } 953 { ADDR_0_LO = 0x15000 } 954 { ADDR_0_HI = 0x5 } 955 { 0 } 956 { 4 = 0x3 } 957 { ADDR_1_LEN = 15 } 958 { ADDR_1_LO = 0x1f010 } 959 { ADDR_1_HI = 0x5 } 9600000000500015000: 0000: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 961* 962 addr: 0x000000050001f010 963 len: 0xf 964 write GRAS_LRZ_CNTL (e100) 965 GRAS_LRZ_CNTL: { 0x8 } 966000000050001f010: 0000: 48e10001 00000008 967 write CP_SCRATCH[0].REG (0b78) 968 CP_SCRATCH[0].REG: 1 969000000050001f018: 0000: 400b7801 00000001 970 opcode: CP_WAIT_MEM_WRITES (12) (1 dwords) 971000000050001f020: 0000: 70928000 972 opcode: (null) (74) (6 dwords) 973000000050001f024: 0000: 70f48005 c0000b78 00012c40 00000005 00015000 00000005 974 opcode: CP_MEM_WRITE (3d) (4 dwords) 975 { ADDR_LO = 0x11000 } 976 { ADDR_HI = 0x5 } 977 gpuaddr:0000000500011000 978000000050001f048: 0000: 00000001 979000000050001f03c: 0000: 703d8003 00011000 00000005 00000001 980000000050001f010: 0000: 48e10001 00000008 400b7801 00000001 70928000 70f48005 c0000b78 00012c40 981000000050001f030: 0020: 00000005 00015000 00000005 703d8003 00011000 00000005 00000001 982000000050019033c: 0000: 70ec0008 00000001 00015000 00000005 00000000 00000003 0000000f 0001f010 983000000050019035c: 0020: 00000005 984 opcode: CP_NOP (10) (2 dwords) 9850000000500190360: 0000: 70100001 00000000 986############################################################ 987vertices: 0 988############################################################ 989cmdstream[2]: 2 dwords 990 opcode: CP_NOP (10) (2 dwords) 991000000050000c000: 0000: 70100001 00000000 992############################################################ 993vertices: 0 994cmd: test_compiler:388: <<< eglTerminate(display): succeeded 995