1 /* 2 * Copyright © 2023 Igalia S.L. 3 * SPDX-License-Identifier: MIT 4 */ 5 6 #ifndef __FREEDRENO_GPU_EVENT_H__ 7 #define __FREEDRENO_GPU_EVENT_H__ 8 9 #include "adreno_pm4.xml.h" 10 11 /* On terminology: 12 * - CLEAN events write dirty cache lines to memory. 13 * - INVALIDATE events cause subsequent reads to read the cache line from 14 * memory. 15 * 16 * Prior to a7xx CLEAN was instead called FLUSH. On a7xx FLUSH events do a 17 * clean and invalidate. We stick to the a7xx terminology in fd_gpu_event, and 18 * map FD_*_CLEAN events to the corresponding FLUSH events on a6xx. Note 19 * however that FLUSH_SO_* events, which write streamout counters to memory 20 * and also do a CACHE_CLEAN, haven't changed their names on a7xx. 21 */ 22 23 enum fd_gpu_event : uint32_t { 24 FD_WRITE_PRIMITIVE_COUNTS = 0, 25 FD_START_PRIMITIVE_CTRS, 26 FD_STOP_PRIMITIVE_CTRS, 27 FD_START_FRAGMENT_CTRS, 28 FD_STOP_FRAGMENT_CTRS, 29 FD_START_COMPUTE_CTRS, 30 FD_STOP_COMPUTE_CTRS, 31 FD_ZPASS_DONE, 32 FD_RB_DONE, 33 FD_FLUSH_SO_0, 34 FD_FLUSH_SO_1, 35 FD_FLUSH_SO_2, 36 FD_FLUSH_SO_3, 37 FD_CACHE_CLEAN, 38 FD_CACHE_INVALIDATE, 39 FD_CCU_INVALIDATE_DEPTH, 40 FD_CCU_INVALIDATE_COLOR, 41 FD_CCU_CLEAN_BLIT_CACHE, 42 FD_CCU_CLEAN_DEPTH, 43 FD_CCU_CLEAN_COLOR, 44 FD_LRZ_CLEAR, 45 FD_LRZ_FLUSH, 46 FD_BLIT, 47 FD_LABEL, 48 FD_DUMMY_EVENT, 49 50 FD_GPU_EVENT_MAX, 51 }; 52 53 struct fd_gpu_event_info { 54 enum vgt_event_type raw_event; 55 bool needs_seqno; 56 }; 57 58 template <chip CHIP> 59 constexpr struct fd_gpu_event_info fd_gpu_events[FD_GPU_EVENT_MAX] = {}; 60 61 template <> 62 constexpr inline struct fd_gpu_event_info fd_gpu_events<A6XX>[FD_GPU_EVENT_MAX] = { 63 {WRITE_PRIMITIVE_COUNTS, false}, /* FD_WRITE_PRIMITIVE_COUNTS */ 64 {START_PRIMITIVE_CTRS, false}, /* FD_START_PRIMITIVE_CTRS */ 65 {STOP_PRIMITIVE_CTRS, false}, /* FD_STOP_PRIMITIVE_CTRS */ 66 {START_FRAGMENT_CTRS, false}, /* FD_START_FRAGMENT_CTRS */ 67 {STOP_FRAGMENT_CTRS, false}, /* FD_STOP_FRAGMENT_CTRS */ 68 {START_COMPUTE_CTRS, false}, /* FD_START_COMPUTE_CTRS */ 69 {STOP_COMPUTE_CTRS, false}, /* FD_STOP_COMPUTE_CTRS */ 70 {ZPASS_DONE, false}, /* FD_ZPASS_DONE */ 71 {RB_DONE_TS, true}, /* FD_RB_DONE */ 72 {FLUSH_SO_0, false}, /* FD_FLUSH_SO_0 */ 73 {FLUSH_SO_1, false}, /* FD_FLUSH_SO_1 */ 74 {FLUSH_SO_2, false}, /* FD_FLUSH_SO_2 */ 75 {FLUSH_SO_3, false}, /* FD_FLUSH_SO_3 */ 76 {CACHE_FLUSH_TS, true}, /* FD_CACHE_CLEAN */ 77 {CACHE_INVALIDATE, false}, /* FD_CACHE_INVALIDATE */ 78 {PC_CCU_INVALIDATE_DEPTH, false}, /* FD_CCU_INVALIDATE_DEPTH */ 79 {PC_CCU_INVALIDATE_COLOR, false}, /* FD_CCU_INVALIDATE_COLOR */ 80 {PC_CCU_RESOLVE_TS, true}, /* FD_CCU_CLEAN_BLIT_CACHE */ 81 {PC_CCU_FLUSH_DEPTH_TS, true}, /* FD_CCU_CLEAN_DEPTH */ 82 {PC_CCU_FLUSH_COLOR_TS, true}, /* FD_CCU_CLEAN_COLOR */ 83 {LRZ_CLEAR, false}, /* FD_LRZ_CLEAR */ 84 {LRZ_FLUSH, false}, /* FD_LRZ_FLUSH */ 85 {BLIT, false}, /* FD_BLIT */ 86 {LABEL, false}, /* FD_LABEL */ 87 }; 88 89 template <> 90 constexpr inline struct fd_gpu_event_info fd_gpu_events<A7XX>[FD_GPU_EVENT_MAX] = { 91 {WRITE_PRIMITIVE_COUNTS, false}, /* FD_WRITE_PRIMITIVE_COUNTS */ 92 {START_PRIMITIVE_CTRS, false}, /* FD_START_PRIMITIVE_CTRS */ 93 {STOP_PRIMITIVE_CTRS, false}, /* FD_STOP_PRIMITIVE_CTRS */ 94 {START_FRAGMENT_CTRS, false}, /* FD_START_FRAGMENT_CTRS */ 95 {STOP_FRAGMENT_CTRS, false}, /* FD_STOP_FRAGMENT_CTRS */ 96 {START_COMPUTE_CTRS, false}, /* FD_START_COMPUTE_CTRS */ 97 {STOP_COMPUTE_CTRS, false}, /* FD_STOP_COMPUTE_CTRS */ 98 {ZPASS_DONE, false}, /* FD_ZPASS_DONE */ 99 {RB_DONE_TS, true}, /* FD_RB_DONE */ 100 {FLUSH_SO_0, false}, /* FD_FLUSH_SO_0 */ 101 {FLUSH_SO_1, false}, /* FD_FLUSH_SO_1 */ 102 {FLUSH_SO_2, false}, /* FD_FLUSH_SO_2 */ 103 {FLUSH_SO_3, false}, /* FD_FLUSH_SO_3 */ 104 {CACHE_CLEAN, false}, /* FD_CACHE_CLEAN */ 105 {CACHE_INVALIDATE7, false}, /* FD_CACHE_INVALIDATE */ 106 {CCU_INVALIDATE_DEPTH, false}, /* FD_CCU_INVALIDATE_DEPTH */ 107 {CCU_INVALIDATE_COLOR, false}, /* FD_CCU_INVALIDATE_COLOR */ 108 {CCU_RESOLVE_CLEAN, false}, /* FD_CCU_CLEAN_BLIT_CACHE */ 109 {CCU_CLEAN_DEPTH, false}, /* FD_CCU_CLEAN_DEPTH */ 110 {CCU_CLEAN_COLOR, false}, /* FD_CCU_CLEAN_COLOR */ 111 {LRZ_CLEAR, false}, /* FD_LRZ_CLEAR */ 112 {LRZ_FLUSH, false}, /* FD_LRZ_FLUSH */ 113 {BLIT, false}, /* FD_BLIT */ 114 {LABEL, false}, /* FD_LABEL */ 115 {DUMMY_EVENT, false}, /* FD_DUMMY_EVENT */ 116 }; 117 118 #endif 119